Datasheet ADG774ABRQ Datasheet (Analog Devices)

Low Voltage 400 MHz Quad 2:1 Mux

1 OF 2

DECODER

ADG774A

EN

IN

S1A

S1B

S2A

S2B

S3A

S3B

S4A

S4B

D1

D2

D3

D4

a

FEATURES Bandwidth >400 MHz Low Insertion Loss and On Resistance: 2.2  Typical On-Resistance Flatness 0.3  Typical Single 3 V/5 V Supply Operation Very Low Distortion: <0.3% Low Quiescent Supply Current (1 nA Typical) Fast Switching Times

6 ns

t

ON

3 ns

t

OFF

TTL/CMOS Compatible

GENERAL DESCRIPTION

The ADG774A is a monolithic CMOS device comprising four 2:1 multiplexer/demultiplexers with high impedance outputs. The CMOS process provides low power dissipation yet gives high switching speed and low on resistance. The on-resistance variation is typically less than 0.5 Ω over the input signal range.

The bandwidth of the ADG774A is typically 400 MHz and this, coupled with low distortion (typically 0.3%), makes the part suitable for switching of high-speed data signals.

The on-resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion. CMOS construction ensures ultralow power dissipation.

The ADG774A operates from a single 3.3 V/5 V supply and is TTL logic compatible. The control logic for each switch is shown in the Truth Table.

These switches conduct equally well in both directions when ON. In the OFF condition, signal levels up to the supplies are blocked. The ADG774A switches exhibit break-before-make switching action.

with 3 ns Switching Time

ADG774A

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

1. Wide bandwidth data rates >400 MHz.

2. Ultralow Power Dissipation.

3. Low leakage over temperature.

4. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer.

5. Crosstalk is typically –70 dB @ 10 MHz.

6. Off isolation is typically –65 dB @ 10 MHz.

REV. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001

ADG774A–SPECIFICATIONS

1

SINGLE SUPPLY

(VDD = 5 V  10%, GND = 0 V. All specifications T

B Version

to

T

Parameter 25CT

MIN

MAX

ANALOG SWITCH

Analog Signal Range 0 to 2.5 V On Resistance (R

) 2.2 Ω typ VD = 0 V to 1 V; IS = –10 mA

ON

3.5 4 Ω max

On Resistance Match Between

Channels (∆R

)0.15 Ω typ VD = 0 V to 1 V; IS = –10 mA

ON

0.5 Ω max

On Resistance Flatness (R

FLAT(ON)

) 0.3 Ω typ VD = 0 V to 1 V; IS = –10 mA

0.6 Ω max

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF) ± 0.001 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

± 0.1 ± 0.25 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.001 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

D

± 0.1 ± 0.25 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ±0.001 nA typ VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3

D

± 0.1 ± 0.25 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V

INL

INH

2.4 V min

0.8 V max

Input Current

I

INL

or I

INH

0.001 µA typ VIN = V ± 0.1 µA max

CIN, Digital Input Capacitance 3 pF typ

DYNAMIC CHARACTERISTICS

2

tON, tON (EN) 6 ns typ CL = 35 pF, RL = 50 Ω;

12 ns max V

, t

t

OFF

(EN) 3 ns typ CL = 35 pF, RL = 50 Ω;

OFF

6 ns max V

Break-Before-Make Time Delay, t

D

3 ns typ CL = 35 pF, RL = 50 Ω; 1 ns min V

Off Isolation –65 dB typ f = 10 MHz; R Channel-to-Channel Crosstalk –70 dB typ f = 10 MHz; R Bandwidth –3 dB 400 MHz typ Test Circuit 6, R Distortion 0.3 % typ R Charge Injection 6 pC typ C

(OFF) 5 pF typ

C

S

C

(OFF) 7.5 pF typ

D

CD, CS (ON) 12 pF typ

POWER REQUIREMENTS V

I

DD

1 µA max

0.001 µA typ

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

to T

MIN

unless otherwise noted.)

MAX

Unit Test Conditions/Comments

or V

INL

= 2 V; Test Circuit 4

S

= 2 V; Test Circuit 4

S

= VS2 = 2 V; Test Circuit 5

S1

= 100 Ω

L

= 1 nF; Test Circuit 9, VS = 0 V

L

= 5.5 V

DD

Digital Inputs = 0 V or V

INH

= 50 Ω; Test Circuit 7

L

= 50 Ω; Test Circuit 8

L

= 50 Ω;

L

DD

–2–

REV. 0

SINGLE SUPPLY

(VDD = 3 V  10%, GND = 0 V. All specifications T

MIN

to T

unless otherwise noted.)

MAX

1

B Version

T

to

Parameter 25CT

MIN

MAX

Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 to 1.5 V On Resistance (R

)4 Ω typ VD = 0 V to 1 V; IS = –10 mA

ON

67 Ω max

On Resistance Match Between

Channels (∆R

)0.15 Ω typ VD = 0 V to 1 V; IS = –10 mA

ON

0.5 Ω max

On Resistance Flatness (R

FLAT(ON)

) 1.5 Ω typ VD = 0 V to 1 V; IS = –10 mA

3 Ω max

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF) ± 0.001 nA typ VD = 2 V, VS = 1 V; VD = 1 V, VS = 2 V;

± 0.1 ± 0.25 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.001 nA typ VD = 2 V, VS = 1 V; VD = 1 V, VS = 2 V;

D

± 0.1 ± 0.25 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ±0.001 nA typ VD = VS = 2 V; VD = VS = 1 V; Test Circuit 3

D

± 0.1 ± 0.25 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V

INL

INH

2.0 V min

0.4 V max

Input Current

I

INL

or I

INH

0.001 µA typ VIN = V

INL

or V

INH

± 0.1 µA max

CIN, Digital Input Capacitance 3 pF typ

DYNAMIC CHARACTERISTICS

2

tON, tON (EN) 7 ns typ CL = 35 pF, RL = 50 Ω;

14 ns max V

t

, t

OFF

(EN) 4 ns typ CL = 35 pF, RL = 50 Ω;

OFF

8 ns max V

Break-Before-Make Time Delay, t

D

3 ns typ CL = 35 pF, RL = 50 Ω;

1 ns min V Off Isolation –65 dB typ f = 10 MHz; R Channel-to-Channel Crosstalk –70 dB typ f = 10 MHz; R Bandwidth –3 dB 400 MHz typ Test Circuit 6; R Distortion 1.5 % typ R Charge Injection 4 pC typ C C

(OFF) 5 pF typ

S

(OFF) 7.5 pF typ

C

D

= 1.5 V; Test Circuit 4

S

= 1.5 V; Test Circuit 4

S

= VS2 = 1.5 V; Test Circuit 5

S1

= 100 Ω

L

= 1 nF; Test Circuit 9, VS = 0 V

L

= 50 Ω, Test Circuit 7

L

= 50 Ω, Test Circuit 8

L

= 50 Ω

L

CD, CS (ON) 12 pF typ

POWER REQUIREMENTS V

I

DD

1 µA max

= 3.3 V

DD

Digital Inputs = 0 V or V

DD

0.001 µA typ

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

ADG774A

Table I. Truth Table

EN IN D1 D2 D3 D4 Function

1 X Hi-Z Hi-Z Hi-Z Hi-Z DISABLE 0 0 S1A S2A S3A S4A IN = 0 0 1 S1B S2B S3B S4B IN = 1

–3–REV. 0

ADG774A

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C unless otherwise noted)

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

Analog, Digital Inputs

2

. . . . . . . . . . . –0.3 V to VDD + 0.3 V or

1

. . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

QSOP Package, Power Dissipation . . . . . . . . . . . . . . 566 mW

Thermal Impedance . . . . . . . . . . . . . . . . . . 149.97°C/W

θ

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.

2

Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.

PIN CONFIGURATION

(QSOP)

16

V

DD

15

EN

14

S4A

13

S4B

12

D4

11

S3A

10

S3B

9

D3

S1A

S1B

S2A

S2B

GND

IN

D1

D2

1

2

3

4

ADG774A

TOP VIEW

5

(Not to Scale)

6

7

8

TERMINOLOGY

V

DD

Most Positive Power Supply Potential. GND Ground (0 V) Reference. S Source Terminal. May be an input or output. D Drain Terminal. May be an input or output. IN Logic Control Input. EN Logic Control Input. R

ON

∆R

ON

R

FLAT(ON)

Ohmic resistance between D and S.

On Resistance match between any two channels

i.e., R

max – R

ON

min.

Flatness is defined as the difference between the

maximum and minimum value of on resistance

as measured over the specified analog signal

range.

(OFF) Source Leakage Current with the switch “OFF.”

I

S

ID (OFF) Drain Leakage Current with the switch “OFF.” I

, IS (ON) Channel Leakage Current with the switch “ON.”

D

V

) Analog Voltage on Terminals D, S.

D (VS

C

(OFF) “OFF” Switch Source Capacitance.

S

C

(OFF) “OFF” Switch Drain Capacitance.

D

C

, CS (ON) “ON” Switch Capacitance.

D

t

ON

Delay between applying the digital control input

and the output switching on. See Test Circuit 4. t

OFF

Delay between applying the digital control input

and the output switching Off. t

D

“OFF” time or “ON” time measured between

the 90% points of both switches, when switching

from one address state to another. See Test

Circuit 5. Crosstalk A measure of unwanted signal that is coupled

through from one channel to another as a result

of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an

“OFF” switch. Bandwidth Frequency response of the switch in the ON

state measured at 3 dB down. Distortion R

FLAT(ON)/RL

ORDERING GUIDE

Model Temperature Range Package Descriptions Package Options

ADG774ABRQ –40°C to +85°C RQ = 0.15" Quarter Size Outline Package (QSOP) RQ-16

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG774A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

–4–

REV. 0

Typical Performance Characteristics–ADG774A

VDD = 3.0V V

SS

= 0V

TEMP = 25

C

–0.020

CURRENT – nA

–0.015

–0.010

–0.005

0

0.010

0.015

0.020

0.025

0.005

–0.025

V

S

– V(VD = VDD – VS)

0 1.0 1.5

2.5 3.0

V

S

0.5

2.0

ID, IS (ON)

IS (OFF)

ID (OFF)

20

TA = 25 C

16

12

– 

ON

R

8

4

0

01 VS OR VD OR DRAIN SOURCE VOLTAGE – V

VDD = 5.0V

VDD = 4.5V

VDD = 5.5V

2345

TPC 1. On Resistance as a Function of V

(VS) for Various Single Supplies

D

20

VDD = 3V

15

– 

10

ON

R

5

0

0 0.5 VS OR VD OR DRAIN SOURCE VOLTAGE – V

+85 C

+25 C

–40

C

1.0 1.5 2.0 2.5 3.0

TPC 4. On Resistance as a Function

(VS) for Different Temperatures

of V

D

with 3 V Single Supplies

20

TA = 25 C

16

12

– 

ON

R

8

4

0

VDD = 3.0V

VDD = 2.7V

VDD = 3.3V

00.5 VS OR VD OR DRAIN SOURCE VOLTAGE – V

1.0 1.5 2.0 2.5 3.0

TPC 2. On Resistance as a Function

(VS) for Various Single Supplies

of V

D

0.025 VDD = 5.0V

–0.005

CURRENT – nA

–0.010

–0.015

–0.020

–0.025

0.020

0.015

0.010

0.005

V

= 0V

V

SS

TEMP = 25

ID (OFF)

0

IS (OFF)

01

S

V

C

2

– V(VD = VDD – VS)

S

IS, ID (ON)

3

TPC 5. Leakage Current as a Function of V

(VS)

D

20

VDD = 5V

15

– 

10

ON

R

+85

C

5

0

012345 VS OR VD OR DRAIN SOURCE VOLTAGE – V

+25 C

TPC 3. On Resistance as a Function

(VS) for Different Temperatures

of V

D

with 5 V Single Supplies

4

TPC 6. Leakage Current as a Function of V

(VS)

D

–40 C

0.05 VDD = 5.0V

0.04

= 0V

V

SS

C

= 3V/1V

D

= 1V/3V

S

ID, IS (ON)

ID (OFF)

25 35 45 55 65 75 85

TEMPERATURE –

IS (OFF)

C

CURRENT – nA

0.03

0.02

0.01

–0.01

–0.02

–0.03

–0.04

–0.05

TEMP = 25 V V

0

515

TPC 7. Leakage Current as a Function of Temperature

REV. 0

0.05

VDD = 3.0V

CURRENT – nA

0.04

0.03

0.02

0.01

–0.01

–0.02

–0.03

–0.04

–0.05

V

SS

TEMP = 25 V

D

V

S

0

ID (OFF)

515

= 0V

C

= 2V/1V

= 1V/2V

25 35 45 55 65 75 85

TEMPERATURE –

ID, IS (ON)

IS (OFF)

TPC 8. Leakage Current as a Function of Temperature

–5–

0

–20

–40

–60

ATTENUATION – dB

–80

–100

0.3

0.1 1 10 100 1000

C

FREQUENCY – MHz

TPC 9. Off Isolation vs. Frequency

ADG774A

0

–20

–40

–60

ATTENUATION – dB

–80

–100

0.3

0.1 1 10 100 1000 FREQUENCY – MHz

TPC 10. Crosstalk vs. Frequency

10 BASE TX+

10 BASE TX–

100 BASE TX+

100 BASE TX–

10 BASE TX+

10 BASE TX–

100 BASE TX+

100 BASE TX–

TX1

TX2

RX1

RX2

ON RESPONSE – dB

0

–5

–10

–15

0.3

0.1 1 10 100 1000 FREQUENCY – MHz

TPC 11. Bandwidth

ADG774A

TRANSFORMER

0

–1

– pC

INJ

Q

–2

–3

–4

–5

–6

–7

0

VDD = 3V

V

= 5V

DD

0.5 1.0 1.5 2.0 2.5 VOLTAGE – V

TPC 12. Charge Injection vs. Source Voltage

RJ45

TX1

RX1

Figure 2. Loop Back

10 BASE TX

100 BASE TX

Figure 1. Full Duplex Transceiver

120 100

Figure 3. Line Termination

Figure 4. Line Clamp

–6–

REV. 0

Test Circuits

ADG774A

I

DS

V1

SD

V

S

RON = V1/I

DS

Test Circuit 1. On Resistance

V

S

5V

0.1F

V

DD

SD

IN

GND

EN

5V

0.1F

IS (OFF) ID (OFF)

SD

A A

V

S

V

D

Test Circuit 2. Off Leakage

3V

V

IN

V

OUT

R 100

C

L

35pF

V

OUT

Test Circuit 4. Switching Times

50% 50%

90% 90%

t

ON

NC

SD

NC = NO CONNECT

ID (ON)

A

V

D

Test Circuit 3. On Leakage

t

OFF

V

DD

S1A

V

S1B

S

V

EN

S

DECODER

GND

D1

R

L

100

V

C

L

35pF

OUT

3V

V

IN

0V

V

OUT

V

S

50% 50%

t

D

t

D

Test Circuit 5. Break-Before-Make Time Delay

V

DD

0.1F

ADG774A

S1A

IN

V

IN

EN

D1

GND

NETWORK

ANALYZER

50

V

S

V

50

OUT

IN

V

IN

V

DD

0.1F

ADG774A

EN

GND

S1A

D1

50

NETWORK ANALYZER

50

V

S

V

50

OUT

Test Circuit 6. Bandwidth

Test Circuit 7. Off Isolation

–7–REV. 0

ADG774A

IN

V

DD

0.1F

ADG774A

S1A

S2A

NETWORK ANALYZER

50

V

S

V

OUT

R

L

50

GND

D2

D1

50

V

IN

EN

C02373–1.5–6/01(0)

Test Circuit 8. Channel-to-Channel Crosstalk

5V

V

DD

R

S

V

S

S1A

S1B

S2A

S2B

S3A

S3B

S4A

S4B

ADG774A

1 OF 2

DECODER

EN

D1 V

D2 V

D3 V

D4 V

OUT

C

L

1nF

C

L

1nF

C

L

1nF

C

L

1nF

IN

3V

V

IN

V

OUT

Q

INJ

= CL  V

OUT

V

OUT

Test Circuit 9. Charge Injection

0.157 (3.99)

0.150 (3.81)

0.059 (1.50) MAX

0.010 (0.25)

0.004 (0.10)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

16-Lead QSOP

(RQ-16)

0.197 (5.00)

0.189 (4.80)

16

1

PIN 1

0.025 (0.64)

BSC

9

8

0.069 (1.75)

0.053 (1.35)

0.012 (0.30)

0.008 (0.20)

0.244 (6.20)

0.228 (5.79)

SEATING PLANE

0.010 (0.20)

0.007 (0.18)

–8–

PRINTED IN U.S.A.

8 0

0.050 (1.27)

0.016 (0.41)

REV. 0