Datasheet ADG759BCP, ADG758BCP Datasheet (Analog Devices)

3 , 4-/8-Channel Multiplexers

a

FEATURES

1.8 V to 5.5 V Single Supply
2.5 V Dual Supply
3  ON Resistance

0.75  ON Resistance Flatness
100 pA Leakage Currents
14 ns Switching Times
Single 8-to-1 Multiplexer ADG758
Differential 4-to-1 Multiplexer ADG759
20-Lead 4 mm  4 mm Chip Scale Package
Low Power Consumption
TTL-/CMOS-Compatible Inputs
For Functionally Equivalent Devices in 16-Lead TSSOP

Package, See ADG708/ADG709

APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems

in Chip Scale Package

ADG758/ADG759

FUNCTIONAL BLOCK DIAGRAMS

ADG758

S1

S8

1 OF 8

DECODER

A0DA1 A2

EN

S1A

S4A

S1B

S4B

ADG759

1 OF 4

DECODER

A0

A1

DA

DB

EN

GENERAL DESCRIPTION

The ADG758 and ADG759 are low voltage, CMOS analog
multiplexers comprising eight single channels and four differential
channels, respectively. The ADG758 switches one of eight inputs
(S1–S8) to a common output, D, as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG759 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device. When
disabled, all channels are switched OFF.

Low power consumption and an operating supply range of 1.8 V to

5.5 V make the ADG758 and ADG759 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switch­ing channels.

These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low ON resistance and leakage currents. ON resistance
is in the region of a few ohms and is closely matched between
switches and very flat over the full signal range. These parts can
operate equally well as either multiplexers or demultiplexers
and have an input signal range that extends to the supplies.

The ADG758 and ADG759 are available in 20-lead chip
scale packages.

PRODUCT HIGHLIGHTS

1. Small 20-Lead 4 mm × 4 mm Chip Scale Packages (CSP).

2. Single/Dual Supply Operation. The ADG758 and ADG759
are fully specified and guaranteed with 3 V and 5 V single­supply and ±2.5 V dual-supply rails.

3. Low R

(3 Ω Typical).

ON

4. Low Power Consumption (<0.01 µW).

5. Guaranteed Break-Before-Make Switching Action.

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]www.analog.com
Fax: [phone] © Analog Devices, Inc., 2002

1

ADG758/ADG759–SPECIFICATIONS

B Version

–40C

Parameter +25C to +85C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
ON Resistance (R

ON Resistance Match Between 0.4 Ω typ

Channels (∆R

ON Resistance Flatness (R

LEAKAGE CURRENTS V

Source OFF Leakage I

Drain OFF Leakage I

Channel ON Leakage I

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

or I

I

INL

INH

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

TRANSITION

Break-Before-Make Time Delay, t

t

(EN) 14 ns typ RL = 300 Ω, CL = 35 pF

ON

(EN) 7 ns typ RL = 300 Ω, CL = 35 pF

t

OFF

Charge Injection ± 3pC typ V

Off Isolation –60 dB typ R

Channel-to-Channel Crosstalk –60 dB typ R

–3 dB Bandwidth 55 MHz typ R
C

(OFF) 13 pF typ f = 1 MHz

S

(OFF)

C

D

ADG758 85 pF typ f = 1 MHz
ADG759 42 pF typ f = 1 MHz

, CS (ON)

C

D

ADG758 96 pF typ f = 1 MHz
ADG759 48 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

NOTES

1

Temperature range is as follows: B Version: –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

)3 Ω typ VS = 0 V to VDD, IDS = 10 mA;

ON

4.5 5 Ω max Test Circuit 1

) 0.8 Ω max VS = 0 V to VDD, IDS = 10 mA

ON

FLAT(ON)

)0.75 Ω typ VS = 0 V to VDD, IDS = 10 mA

1.2 Ω max

(OFF) ±0.01 nA typ VD = 4.5 V/1 V, VS = 1 V/4.5 V;

S

± 0.1 ±0.3 nA max Test Circuit 2

(OFF) ± 0.01 nA typ VD = 4.5 V/1 V, VS = 1 V/4.5 V;

D

± 0.1 ±0.75 nA max Test Circuit 3

, IS (ON) ± 0.01 nA typ VD = VS = 1 V, or 4.5 V, Test Circuit 4

D

± 0.1 ±0.75 nA max

INH

INL

2.4 V min

0.8 V max

0.005 µA typ VIN = V
± 0.1 µA max

2

14 ns typ RL = 300 Ω, CL = 35 pF; Test Circuit 5

25 ns max V

8 ns typ RL = 300 Ω, CL = 35 pF

D

1 ns min V

25 ns max V

12 ns max V

–80 dB typ R

–80 dB typ R

0.001 µA typ Digital Inputs = 0 V or 5.5 V

1.0 µA max

(VDD = 5 V  10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)

DD

V

= 5.5 V

DD

or V

INL

= 3 V/0 V, VS8 = 0 V/3 V

S1

= 3 V; Test Circuit 6

S

= 3 V; Test Circuit 7

S

= 3 V; Test Circuit 7

S

= 2.5 V, RS = 0 Ω, CL = 1 nF;

S

INH

Test Circuit 8

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

Test Circuit 9

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

Test Circuit 10

= 50 Ω, CL = 5 pF; Test Circuit 11

L

= 5.5 V

DD

–2–

REV. A

ADG758/ADG759

1

SPECIFICATIONS

Parameter +25C to +85C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
ON Resistance (R

ON Resistance Match Between 0.4 Ω typ V

Channels (∆RON) 1.2 Ω max

LEAKAGE CURRENTS V

Source OFF Leakage I

Drain OFF Leakage I

Channel ON Leakage I

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

or I

I

INL

INH

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

TRANSITION

Break-Before-Make Time Delay, t

t

(EN) 18 ns typ RL = 300 Ω, CL = 35 pF

ON

t

(EN) 8 ns typ RL = 300 Ω, CL = 35 pF

OFF

Charge Injection ± 3pC typ V

Off Isolation –60 dB typ R

Channel-to-Channel Crosstalk –60 dB typ R

–3 dB Bandwidth 55 MHz typ R

(OFF) 13 pF typ f = 1 MHz

C

S

C

(OFF)

D

ADG758 85 pF typ f = 1 MHz
ADG759 42 pF typ f = 1 MHz

, CS (ON)

C

D

ADG758 96 pF typ f = 1 MHz
ADG759 48 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

NOTES

1

Temperature ranges are as follows: B Version: –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

)8 Ω typ VS = 0 V to VDD, IDS = 10 mA;

ON

(OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;

S

(OFF) ± 0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;

D

, IS (ON) ± 0.01 nA typ VS = VD = 1 V or 3 V; Test Circuit 4

D

INH

INL

(VDD = 3 V  10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)

B Version

–40C

DD

V

11 12 Ω max Test Circuit 1

± 0.1 ±0.3 nA max Test Circuit 2

± 0.1 ±0.75 nA max Test Circuit 3

± 0.1 ±0.75 nA max

2.0 V min

0.8 V max

0.005 µA typ VIN = V
± 0.1 µA max

2

18 ns typ RL = 300 Ω, CL = 35 pF; Test Circuit 5

30 ns max V

D

8 ns typ RL = 300 Ω, CL = 35 pF

1 ns min V

30 ns max V

15 ns max V

Test Circuit 8

–80 dB typ R

Test Circuit 9

–80 dB typ R

Test Circuit 10

0.001 µA typ Digital Inputs = 0 V or 3.3 V

1.0 µA max

= 0 V to VDD, IDS = 10 mA

S

= 3.3 V

DD

or V

INL

= 2 V/0 V, VS2 = 0 V/2 V

S1

= 2 V; Test Circuit 6

S

= 2 V; Test Circuit 7

S

= 2 V; Test Circuit 7

S

= 1.5 V, RS = 0 Ω, CL = 1 nF;

S

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

= 50 Ω, CL = 5 pF; Test Circuit 11

L

= 3.3 V

DD

INH

REV. A

–3–

ADG758/ADG759–SPECIFICATIONS

1

DUAL SUPPLY

(VDD = +2.5 V  10%, VSS = –2.5 V  10%, GND = 0 V, unless otherwise noted.)

B Version

–40C

Parameter +25C to +85C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range V
ON Resistance (R

) 2.5 Ω typ VS = VSS to VDD, IDS = 10 mA;

ON

SS

to V

DD

V

4.5 5 Ω max Test Circuit 1

ON Resistance Match Between 0.4 Ω typ

Channels (∆R

ON Resistance Flatness (R

) 0.8 Ω max VS = VSS to VDD, IDS = 10 mA

ON

FLAT(ON)

) 0.6 Ω typ VS = VSS to VDD, IDS = 10 mA

1.0 Ω max

LEAKAGE CURRENTS V

Source OFF Leakage I

(OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;

S

= +2.75 V, VSS = –2.75 V

DD

± 0.1 ±0.3 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;

D

± 0.1 ±0.75 nA max Test Circuit 3

Channel ON Leakage I

, IS (ON) ± 0.01 nA typ VS = VD = +2.25 V/–1.25 V; Test Circuit 4

D

± 0.1 ±0.75 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

1.7 V min

0.7 V max

Input Current

I

INL

or I

INH

0.005 µA typ VIN = V

INL

or V

INH

± 0.1 µA max

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

TRANSITION

Break-Before-Make Time Delay, t

t

(EN) 14 ns typ RL = 300 Ω, CL = 35 pF

ON

t

(EN) 8 ns typ RL = 300 Ω, CL = 35 pF

OFF

Charge Injection ± 3pC typ V

2

14 ns typ RL = 300 Ω, CL = 35 pF; Test Circuit 5

25 ns max V

D

8 ns typ RL = 300 Ω, CL = 35 pF

1 ns min V

25 ns max V

15 ns max V

= 1.5 V/0 V; Test Circuit 5

S

= 1.5 V; Test Circuit 6

S

= 1.5 V; Test Circuit 7

S

= 1.5 V; Test Circuit 7

S

= 0 V, RS = 0 Ω, CL = 1 nF;

S

Test Circuit 8

Off Isolation –60 dB typ R

–80 dB typ R

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

Test Circuit 9

Channel-to-Channel Crosstalk –60 dB typ R

–80 dB typ R

= 50 Ω, CL = 5 pF, f = 10 MHz

L

= 50 Ω, CL = 5 pF, f = 1 MHz;

L

Test Circuit 10

–3 dB Bandwidth 55 MHz typ R

(OFF) 13 pF typ f = 1 MHz

C

S

(OFF)

C

D

= 50 Ω, CL = 5 pF; Test Circuit 11

L

ADG758 85 pF typ f = 1 MHz
ADG759 42 pF typ f = 1 MHz

C

, CS (ON)

D

ADG758 96 pF typ f = 1 MHz
ADG759 48 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

0.001 µA typ Digital Inputs = 0 V or 2.75 V

= +2.75 V

DD

1.0 µA max

I

SS

0.001 µA typ VSS = –2.75 V

1.0 µA max Digital Inputs = 0 V or 2.75 V

NOTES

1

Temperature range is as follows: B Version: –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

–4–

REV. A

ADG758/ADG759

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C, unless otherwise noted.)

VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DD

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –3.5 V

V

SS

Analog Inputs

Digital Inputs

2

. . . . . . . . . . . . . . VSS – 0.3 V to VDD +0.3 V or

2

. . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V or

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA

Operating Temperature Range

1

30 mA, Whichever Occurs First

30 mA, Whichever Occurs First

Chip Scale Package,

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 32°C/W

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.

2

Overvoltages at EN, A, S, or D will be clamped by internal diodes. Current should

be limited to the maximum ratings given.

Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG758/ADG759 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

Table I. ADG758 Truth Table

PIN CONFIGURATIONS

A2 A1 A0 EN Switch Condition

X XX0 NONE
0 0011
0 0112
0 1013
0 1114
1 0015
1 0116
1 1017
1 1118

X = Don’t Care

Table II. ADG759 Truth Table

A1 A0 EN ON Switch Pair

XX0NONE
0011
0112
1013
1114

X = Don’t Care

NCA0A1A2NC

20

PIN 1

1

2

3

4

5

1

2

SS

3

4

5

IDENTIFIER

ADG758

TOP VIEW

(Not to Scale)

678910

S4

NCA0NCA1NC

PIN 1
IDENTIFIER

ADG759

TOP VIEW

(Not to Scale)

6

78

S4A

EN

V

SS

S1

S2

S3

NC = NO CONNECT
EXPOSED PAD TIED TO SUBSTRATE, V

EN

V

S1A

S2A

S3A

NC = NO CONNECT
EXPOSED PAD TIED TO SUBSTRATE, V

D

NC

DANCDB

16171819

S8

NC

1617181920

910

S4B

15

14

13

12

11

15

14

13

12

11

GND

V

DD

S5

S6

S7

GND

V

DD

S1B

S2B

S3B

SS

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADG758BCP –40°C to +85°C 20-Lead Chip Scale Package (CSP) CP-20
ADG759BCP –40°C to +85°C 20-Lead Chip Scale Package (CSP) CP-20

REV. A

–5–

ADG758/ADG759

TERMINOLOGY

V

DD

V

SS

Most Positive Power Supply Potential
Most Negative Power Supply in a dual-supply application. In single-supply applications, this should be tied to

ground at the device.
GND Ground (0 V) Reference
S Source Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
IN Logic Control Input
R

ON

R

FLAT(ON)

Ohmic Resistance between D and S

Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over

the specified analog signal range.
I

(OFF) Source Leakage Current with the Switch OFF

S

I

(OFF) Drain leakage Current with the Switch OFF

D

I

, IS (ON) Channel Leakage current with the Switch ON

D

V

)Analog Voltage on Terminals D, S

D (VS

C

(OFF) OFF Switch Source Capacitance. Measured with reference to ground.

S

C

(OFF) OFF Switch Drain Capacitance. Measured with reference to ground.

D

C

, CS (ON) ON Switch Capacitance. Measured with reference to ground.

D

C

IN

t

TRANSITION

Digital Input Capacitance

Delay Time measured between the 50% and 90% points of the digital inputs and the switch ON condition when

switching from one address state to another.
t

(EN) Delay Time between the 50% and 90% points of the EN digital input and the switch ON condition.

ON

t

(EN) Delay Time between the 50% and 90% points of the EN digital input and the switch OFF condition.

OFF

t

OPEN

OFF Time measured between the 80% points of both switches when switching from one address state to another.
Off Isolation A measure of unwanted signal coupling through an OFF switch.
Crosstalk A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
Charge A measure of the glitch impulse transferred from the digital input to the analog output during switching.

Injection
On Response The Frequency Response of the ON Switch.
On Loss The Loss Due to the ON Resistance of the Switch
V
V
I
I
I

INL

INH

INL

DD

SS

(I

INH

Maximum Input Voltage for Logic “0”

Minimum Input Voltage for Logic “1”

) Input Current of the Digital Input

Positive Supply Current

Negative Supply Current

–6–

REV. A

Typical Performance Characteristics–

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

0 0.5

7

6

5

4

3

2

1

0

ON RESISTANCE – 

1.0 1.5 2.0 2.5 3.0

–40C

+25C

+85C

8

VDD = 3V
V

SS

= 0V

VS, (VD = V

DD

– VS) – V

01

0.12

CURRENT – nA

2345

VDD = 5V
V

SS

= 0V

T

A

= 25C

0.08

0.04

0.00

–0.04

–0.08

–0.12

ID (ON), VS = V

D

IS (OFF)

ID (OFF)

ADG758/ADG759

8

7

6

5

4

3

ON RESISTANCE – 

2

1

0

012345

VD, VS, DRAIN OR SOURCE VOLTAGE – V

VDD = 2.7V

VDD = 3.3V

VDD = 4.5V

TA = 25C
V

= 0V

SS

VDD = 5.5V

TPC 1. ON Resistance as a Function of VD (VS) for Single
Supply

8

7

6

5

4

3

ON RESISTANCE – 

2

1

0

–2.0

–3.0

–2.5

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

–1.5

VDD = +2.25V

V

–1.0

–0.5

= –2.25V

SS

VDD = +2.75V

= –2.75V

V

SS

0.50

1.0

1.5

TA = 25C

2.0

2.5

3.0

TPC 4. ON Resistance as a Function of VD (VS) for
Different Temperatures, Single Supply

8

7

6

5

4

3

ON RESISTANCE – 

2

1

0
–3.0 –2.5 –2.0

+85C

–40C

–1.5

–1.0 1.0 1.5 2.0 2.50.50

–0.5

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

VDD = +2.5V

= –2.5V

V

SS

+25C

3.0

TPC 2. ON Resistance as a Function of VD (VS) for Dual
Supply

8

+25C

VDD = 5V

= 0V

V

SS

7

6

5

4

3

ON RESISTANCE – 

2

1

0

012345

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

+85C

–40C

TPC 3. ON Resistance as a Function of VD (VS) for Different
Temperatures, Single Supply

REV. A

TPC 5. ON Resistance as a Function of VD (VS) for
Different Temperatures, Dual Supply

TPC 6. Leakage Currents as a Function of VD (VS)

–7–

ADG758/ADG759

0.12

0.08

0.04

0.00

CURRENT – nA

–0.04

–0.08

–0.12

0 0.5

IS (OFF)

1.0 1.5 2.0 3.0
VS, (VD = V

DD

– VS) – V

(ON), VS = V

I

D

ID (OFF)

VDD = 3V

= 0V

V

SS

= 25C

T

A

2.5

D

TPC 7. Leakage Currents as a Function of VD (VS)

0.12

0.08

0.04

0.00

CURRENT – nA

–0.04

–0.08

I

IS (OFF)

(ON), VS = V

D

VDD = +2.5V

= –2.5V

V

SS

= 25C

T

A

D

ID (OFF)

0.35

0.30

0.25

0.20

0.15

0.10

CURRENT – nA

0.05

0.00

–0.05

15

ID (OFF)

IS (OFF)

25 35 45 55 65 75 85

TEMPERATURE – C

VDD = 3V
V

= 0V

SS

ID (ON)

TPC 10. Leakage Currents as a Function of Temperature

10m

TA = 25C

1m

V

= +2.5V

100

10

1

CURRENT – A

100n

10n

DD

V

SS

= –2.5V

VDD = +5V

VDD = +3V

–0.12

–3.0

–2.5 –2.0 –1.5 –1.0 0 0.5 1.0 1.5 2.0 2.5

–0.5 3.0

V

, (VD = V

S

DD

– VS) – V

TPC 8. Leakage Currents as a Function of VD (VS)

0.35

0.30

0.25

0.20

0.15

0.10

CURRENT – nA

0.05

0.00

–0.05

15

25 35 45 55 65 75 85

TEMPERATURE – C

VDD = 5V, VSS = 0V

= +2.5V, VSS = –2.5V

V

DD

ID (OFF)

ID (ON)

IS (OFF)

TPC 9. Leakage Currents as a Function of Temperature

1n

10

100 1k 10k 100k 1M 10M

FREQUENCY – Hz

TPC 11. Supply Current vs. Input Switching Frequency

0

–20

–40

–60

–80

ATTENUATION – dB

–100

–120

100k 1M 10M 100M

30k

FREQUENCY – Hz

VDD = 5V

= 25C

T

A

TPC 12. OFF Isolation vs. Frequency

–8–

REV. A

ADG758/ADG759

VOLTAGE – V

–3 –2

20

Q

INJ

– pC

–1 1 2 5

TA = 25C

10

0

–10

–20

–40

3

–30

04

VDD = 3V
V

SS

= 0V

VDD = +2.5V
V

SS

= –2.5V

VDD = 5V
V

SS

= 0V

0

–20

–40

–60

–80

ATTENUATION – dB

–100

–120

100k 1M 10M 100M

30k

TPC 13. Crosstalk vs. Frequency

0

VDD = 5V

= 25C

T

A

–5

–10

FREQUENCY – Hz

VDD = 5V

= 25C

T

A

TPC 15. Charge Injection vs. Source Voltage

ATTENUATION – dB

–15

–20

100k 1M 10M 100M

30k

FREQUENCY – Hz

TPC 14. ON Response vs. Frequency

REV. A

–9–

ADG758/ADG759

Test Circuits

I

DS

V

V

DD

SS

V1

S

V

S

RON = V1/I

Test Circuit 1. ON Resistance

V

DD

V

I

V

(OFF)

S

S

A

V

D

DD

S1

S2

S8

GND

Test Circuit 2. IS (OFF)

V

DD

V

DD

V

IN

50

2.4V

A2

A1

S2 THRU S7

A0

ADG758

EN

GND

*SIMILAR CONNECTION FOR ADG759

D

V

S

DS

V

SS

V

SS

3V

)

0V

V

S1

V

S8

NC

NC

NC = NO CONNECT

D

0.8V

EN

V

SS

V

SS

*

V

S1

S8

S1

V

S8

D

R
300

C

L

L

35pF

ADDRESS
DRIVE (V

IN

V

OUT

V

OUT

Test Circuit 5. Switching Time of Multiplexer, t

V

DD

S1

S2

S8

GND

V

SS

D

0.8V

EN

Test Circuit 3. ID (OFF)

V

DD

V

S1

S8

V

SS

V

GND

SS

D

2.4V

EN

DD

Test Circuit 4. ID (ON)

50%

t

TRANSITION

TRANSITION

90%

50%

ID (OFF)

A

(ON)

I

D

A

t

TRANSITION

90%

V

D

V

D

DD

DD

S2 THRU S7

ADG758

GND

V

SS

V

SS

S1

S8

*

D

R

L

300

V

S

V

OUT

C

L

35pF

ADDRESS

DRIVE (V

Test Circuit 6. Break-Before-Make Delay, t

–10–

3V

)

IN

0V

V

OUT

80%

t

80%

OPEN

OPEN

REV. A

V

V

A2

V

IN

50

2.4V

A1

A0

EN

*SIMILAR CONNECTION FOR ADG759

ADG758/ADG759

V

S

V

OUT

50

NETWORK
ANALYZER

R

L

50

GND

S

D

V

OUT

WITH SWITCH

V

OUT

WITHOUT SWITCH

INSERTION LOSS = 20 LOG

0.1F

V

DD

A2

A1

A0

EN

2.4V

0.1F

V

SS

V

DDVSS

DD

DD

S2 THRU S8

ADG758*

GND

V

DD

V

DD

A2

A1

ADG758

A0

S

EN

V

SS

V

SS

V

S1

S

D

R

L

300

C

L

35pF

V

OUT

Test Circuit 7. Enable Delay, t

V

SS

LOGIC INPUT

OUT

GND

V

SS

*

D

V

C

L

1nF

DRIVE (V

)

(V

IN

V

ENABLE

OUTPUT

3V

0V

OUT

3V

IN

0V

V

0V

)

0

ON

(EN), t

OFF

50%

(EN)

Q

INJ

0.9V

t

ON

= CL  V

0

(EN)

OUT

50%

V

OUT

0.9V

t

OFF

(EN)

0

V

V

A2

A1

A0

EN

V

IN

50

*SIMILAR CONNECTION FOR ADG759

R

S

V

S

V

IN

*SIMILAR CONNECTION FOR ADG759

Test Circuit 8. Charge Injection

2.4V

NETWORK

ANALYZER

50

V

S

REV. A

V

V

DD

V

DDVSS

S

D

GND

SS

0.1F

50

OFF ISOLATION = 20 LOG

NETWORK
ANALYZER

50

V

OUT

R

L

50

V

S

V

OUT

VS

0.1F

A2

A1

A0

EN

Test Circuit 9. OFF Isolation

V

V

DD

V

DDVSS

ADG758

GND

SS

0.1F

EN

*

D

LOG

2.4V

V

OUT

V

S

NETWORK

ANALYZER

R
50

0.1F

A2

A1

A0

50

S1

S2

S8

*SIMILAR CONNECTION FOR ADG759
CHANNEL-TO-CHANNEL

CROSSTALK = 20

Test Circuit 10. Channel-to-Channel Crosstalk

Test Circuit 11. Bandwidth

Power-Supply Sequencing

When using CMOS devices, care must be taken to ensure correct
power-supply sequencing. Incorrect power-supply sequencing
can result in the device being subjected to stresses beyond the
maximum ratings listed in the data sheet. Digital and analog

V

OUT

L

inputs should always be applied after power supplies and ground.
For single-supply operation, V

should be tied to GND as close

SS

to the device as possible.

–11–

ADG758/ADG759

PIN 1

INDICATOR

0.035 (0.90) MAX

0.033 (0.85) NOM

SEATING

PLANE

12 MAX

0.020 (0.50)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

20-Lead Chip Scale Package

(CP-20)

0.157 (4.0)
BSC SQ

BSC

TOP

VIEW

0.028 (0.70) MAX

0.026 (0.65) NOM

0.148 (3.75)
BSC SQ

0.008 (0.20)
REF

0.024 (0.60)

0.017 (0.42)

0.009 (0.24)

0.012 (0.30)

0.009 (0.23)

0.007 (0.18)

0.030 (0.75)

0.024 (0.60)

0.020 (0.50)

0.002 (0.05)

0.0004 (0.01)

0.0 (0.0)

0.024 (0.60)

0.017 (0.42)

0.009 (0.24)

16

15

11

10

0.080 (2.00)

0.010 (0.25)

BOTTOM

VIEW

REF

MIN

20

6

1

5

0.089 (2.25)

0.083 (2.10) SQ

0.077 (1.95)

C02371–0–5/02(A)

Revision History

Location Page

Data Sheet changed from REV. 0 to REV. A.

Edits to General Description section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Update Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

–12–

PRINTED IN U.S.A.

REV. A