Datasheet ADG721 Datasheet (Analog Devices)

CMOS

a

FEATURES

1.8 V to 5.5 V Single Supply
4  (Max) On Resistance
Low On Resistance Flatness
–3 dB Bandwidth >200 MHz
Rail-to-Rail Operation
8-Lead MSOP Package
Fast Switching Times

20 ns

t

ON

10 ns

t

OFF

Low Power Consumption (<0.1 W)
TTL/CMOS Compatible

APPLICATIONS
USB 1.1 Signal Switching Circuits
Cell Phones
PDAs
Battery-Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement

Low Voltage 4  Dual SPST Switches

ADG721/ADG722/ADG723

FUNCTIONAL BLOCK DIAGRAMS

IN2

ADG721

S1

D1

S1

D1

IN2

SWITCHES SHOWN FOR A LOGIC "0" INPUT

IN1

D2

S2

ADG723

IN2

ADG722

S1

D1

IN1

D2

S2

IN1

D2

S2

GENERAL DESCRIPTION

The ADG721, ADG722, and ADG723 are monolithic CMOS
SPST switches. These switches are designed on an advanced
submicron process that provides low power dissipation yet gives
high switching speed, low on resistance, and low leakage currents.

The ADG721, ADG722, and ADG723 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments and with the new generation of
DACs and ADCs from Analog Devices.

The ADG721, ADG722, and ADG723 contain two independent
single-pole/single-throw (SPST) switches. The ADG721 and
ADG722 differ only in that both switches are normally open and
normally closed, respectively. While in the ADG723, Switch 1 is
normally open and Switch 2 is normally closed.

Each switch of the ADG721, ADG722, and ADG723 conducts
equally well in both directions when on. The ADG723 exhibits
break-before-make switching action.

REV. A

PRODUCT HIGHLIGHTS

1. 1.8 V to 5.5 V Single-Supply Operation.

The ADG721, ADG722, and ADG723 offer high perfor­mance, including low on resistance and fast switching times,
and are fully specified and guaranteed with 3 V and 5 V
supply rails.

2. Very Low R

At 1.8 V operation, R

(4 W max at 5 V, 10 W max at 3 V).

ON

is typically 40 W over the tempera-

ON

ture range.

3. Low On Resistance Flatness.

4. –3 dB Bandwidth > 200 MHz.

5. Low Power Dissipation.

CMOS construction ensures low power dissipation.

6. Fast t

ON/tOFF

.

7. 8-Lead MSOP.

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

ADG721/ADG722/ADG723–SPECIFICATIONS

1

(VDD = 5 V  10%, GND = 0 V. All specifications –40C to +85C, unless otherwise noted.)

B Version

–40C to

Parameter +25C +85C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
On Resistance (R

)45 W max VS = 0 V to VDD, IS = –10 mA,

ON

DD

On Resistance Match between

Channels (DR

) 0.3 W typ VS = 0 V to VDD, IS = –10 mA

ON

1.0 W max

On Resistance Flatness (R

FLAT(ON)

)0.85 W typ VS = 0 V to VDD, IS = –10 mA

1.5 W max

LEAKAGE CURRENTS V

Source OFF Leakage I

(OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V

S

±0.25 ±0.35 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V

D

±0.25 ±0.35 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ±0.01 nA typ VS = VD = 1 V, or VS = VD = 4.5 V

D

±0.25 ±0.35 nA max Test Circuit 3

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

2.4 V min

0.8 V max

Input Current

I

INL

or I

INH

0.005 mA typ VIN = V
±0.1 mA max

DYNAMIC CHARACTERISTICS

t

ON

2

14 ns typ RL = 300 W, CL = 35 pF

20 ns max V

t

OFF

6 ns typ RL = 300 W, CL = 35 pF

10 ns max V

Break-Before-Make Time Delay, t

7 ns typ RL = 300 W, CL = 35 pF,

D

(ADG723 Only) 1 ns min V

Charge Injection 2 pC typ V

Off Isolation –60 dB typ R

–80 dB typ R

Channel-to-Channel Crosstalk –77 dB typ R

–97 dB typ R

Bandwidth –3 dB 200 MHz typ R
C

(OFF) 7 pF typ

S

(OFF) 7 pF typ

C

D

CD, CS (ON) 18 pF typ

POWER REQUIREMENTS V

I

DD

0.001 mA typ

1.0 mA max

NOTES

1

Temperature range: B Version, –40∞C to +85∞C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

V

Test Circuit 1

= 5.5 V

DD

or V

INL

= 3 V, Test Circuit 4

S

= 3 V, Test Circuit 4

S

= VS2 = 3 V, Test Circuit 5

S1

= 2 V; RS = 0 W, CL = 1 nF,

S

INH

Test Circuit 6

= 50 W, CL = 5 pF, f = 10 MHz

L

= 50 W, CL = 5 pF, f = 1 MHz,

L

Test Circuit 7

= 50 W, CL = 5 pF, f = 10 MHz

L

= 50 W, CL = 5 pF, f = 1 MHz,

L

Test Circuit 8

= 50 W, CL = 5 pF, Test Circuit 9

L

= 5.5 V

DD

Digital Inputs = 0 V or 5 V

–2–

REV. A

ADG721/ADG722/ADG723

1

SPECIFICATIONS

Parameter +25C +85C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
On Resistance (R

On Resistance Match between

Channels (DR

On Resistance Flatness (R

LEAKAGE CURRENTS V

Source OFF Leakage I

Drain OFF Leakage I

Channel ON Leakage I

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

or I

I

INL

INH

DYNAMIC CHARACTERISTICS

t

ON

t

OFF

Break-Before-Make Time Delay, t

(ADG723 Only) 1 ns min V

Charge Injection 2 pC typ V

Off Isolation –60 dB typ R

Channel-to-Channel Crosstalk –77 dB typ R

Bandwidth –3 dB 200 MHz typ R

(OFF) 7 pF typ

C

S

(OFF) 7 pF typ

C

D

CD, CS (ON) 18 pF typ

POWER REQUIREMENTS V

I

DD

NOTES

1

Temperature range: B Version, –40∞C to +85∞C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

) 6.5 W typ VS = 0 V to VDD, IS = –10 mA

ON

) 0.3 W typ VS = 0 V to VDD, IS = –10 mA

ON

(OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V

S

(OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V

D

, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 3 V

D

INH

INL

(VDD = 3 V  10%, GND = 0 V. All specifications –40C to +85C, unless otherwise noted.)

B Version

–40C to

DD

V

10 W max Test Circuit 1

1.0 W max

FLAT(ON)

) 3.5 W typ VS = 0 V to VDD, IS = –10 mA

= 3.3 V

DD

±0.25 ±0.35 nA max Test Circuit 2

±0.25 ±0.35 nA max Test Circuit 2

±0.25 ±0.35 nA max Test Circuit 3

2.0 V min

0.4 V max

0.005 mA typ VIN = V

INL

±0.1 mA max

2

16 ns typ RL = 300 W, CL = 35 pF

24 ns max V

= 2 V, Test Circuit 4

S

7 ns typ RL = 300 W, CL = 35 pF

11 ns max V

7 ns typ RL = 300 W, CL = 35 pF,

D

= 2 V, Test Circuit 4

S

= VS2 = 2 V, Test Circuit 5

S1

= 1.5 V; RS = 0 W, CL = 1 nF,

S

Test Circuit 6

= 50 W, CL = 5 pF, f = 10 MHz

L

–80 dB typ R

= 50 W, CL = 5 pF, f = 1 MHz,

L

Test Circuit 7

= 50 W, CL = 5 pF, f = 10 MHz

L

–97 dB typ R

= 50 W, CL = 5 pF, f = 1 MHz,

L

Test Circuit 8

= 50 W, CL = 5 pF,

L

Test Circuit 9

= 3.3 V

DD

Digital Inputs = 0 V or 3 V

0.001 mA typ

1.0 mA max

or V

INH

REV. A

–3–

ADG721/ADG722/ADG723

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C unless otherwise noted)

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

Analog, Digital Inputs

2

. . . . . . . . . . –0.3 V to VDD + 0.3 V or

1

30 mA, Whichever Occurs First

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C

MSOP Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W

θ

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W

θ

JC

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.

2

Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be

limited to the maximum ratings given.

Table I. Truth Table (ADG721/ADG722)

ADG721 In ADG722 In Switch Condition

01OFF
10ON

Table II. Truth Table (ADG723)

Logic Switch 1 Switch 2

0 OFF ON
1ONOFF

ORDERING GUIDE

Model Temperature Range Branding1Package Description Package Option

ADG721BRM –40°C to +85°C S6B MSOP RM-8
ADG721BRM-REEL –40°C to +85°C S6B MSOP RM-8
ADG721BRM-REEL7 –40°C to +85°C S6B MSOP RM-8
ADG721BRMZ
ADG721BRMZ-REEL
ADG721BRMZ-REEL7

2

–40°C to +85°C S6B MSOP RM-8

2

–40°C to +85°C S6B MSOP RM-8

2

–40°C to +85°C S6B MSOP RM-8
ADG722BRM –40°C to +85°C S7B MSOP RM-8
ADG722BRM-REEL –40°C to +85°C S7B MSOP RM-8
ADG722BRM-REEL7 –40°C to +85°C S7B MSOP RM-8
ADG722BRMZ
ADG722BRMZ-REEL
ADG722BRMZ-REEL7

2

–40°C to +85°C S7B MSOP RM-8

2

–40°C to +85°C S7B MSOP RM-8

2

–40°C to +85°C S7B MSOP RM-8
ADG723BRM –40°C to +85°C S8B MSOP RM-8
ADG723BRM-REEL –40°C to +85°C S8B MSOP RM-8
ADG723BRM-REEL7 –40°C to +85°C S8B MSOP RM-8

NOTES

1

Branding = Due to package size limitations, these three characters represent the part number.

2

Z = Pb-free part.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG721/ADG722/ADG723 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

–4–

REV. A

PIN CONFIGURATION

8-Lead MSOP (RM-8)

ADG721/ADG722/ADG723

8

V

DD

7

IN1

6

D2

5

S2

IN2

GND

S1

D1

1

ADG721/

2

ADG722/

ADG723

3

TOP VIEW

4

(Not to Scale)

TERMINOLOGY

V

DD

Most Positive Power Supply Potential.

GND Ground (0 V) Reference.

S Source Terminal. May be an input or output.

DDrain Terminal. May be an input or output.

IN Logic Control Input.

R

ON

DR

ON

R

FLAT(ON)

Ohmic resistance between D and S.

On resistance match between any two channels i.e., R

max – R

ON

ON

min.

Flatness is defined as the difference between the maximum and minimum value of on
resitance as measured over the specified analog signal range.

(OFF) Source leakage current with the switch OFF.

I

S

(OFF) Drain leakage current with the switch OFF.

I

D

, IS (ON) Channel leakage current with the switch ON.

I

D

)Analog voltage on terminals D, S.

V

D (VS

(OFF) OFF Switch Source Capacitance.

C

S

(OFF) OFF Switch Drain Capacitance.

C

D

, CS (ON) ON Switch Capacitance.

C

D

t

t
t

ON

OFF

D

Delay between applying the digital control input and the output switching on.

Delay between applying the digital control input and the output switching off.
OFF time or ON time measured between the 90% points of both switches, when

switching from one address state to another (ADG723 Only).

Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a

result of parasitic capacitance.

Off Isolation A measure of unwanted signal coupling through an OFF switch.

Charge Injection A measure of the glitch impulse transferred during switching.

REV. A

–5–

ADG721/ADG722/ADG723

–Typical Performance Characteristics

– 

R

ON

6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

VDD = +2.7V

VDD = +4.5V

VDD = +3.0V

0 0.5

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

VDD = +5.0V

TA = +25C

Figure 1. On Resistance as a Function of VD (VS) Single
Supplies

6.0

5.0

4.0

– 

3.0

ON

R

2.0

–40C

+85C

VDD = +3V

+25C

1m

VDD = +5V

100

10

– A

1

SUPPLY

I

100n

10n

1n

100 1k 10k 100k

10 1M

FREQUENCY – Hz

10M

Figure 4. Supply Current vs. Input Switching Frequency

–30

VDD = +3V, +5V

–40

–50

–60

–70

OFF ISOLATION – dB

–80

1.0

0

0 0.5

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

1.0 1.5 2.0 2.5 3.0

Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures, VDD = 3 V

– 

R

6.0

5.5

5.0

4.5

4.0

3.5

3.0

ON

2.5

2.0

1.5

1.0

0.5

0

0 0.5

+25C

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

VD OR VS – DRAIN OR SOURCE VOLTAGE – V

+85C

–40C

VDD = +5V

Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures, VDD = 5 V

–90

–100

10k 100k

1M

FREQUENCY – Hz

Figure 5. Off Isolation vs. Frequency

–30

VDD = +3V, +5V

–40

–50

–60

–70

–80

CROSSTALK – dB

–90

–100

–110

10k 100k

1M

FREQUENCY – Hz

Figure 6. Crosstalk vs. Frequency

10M 100M

10M 100M

–6–

REV. A

–6

VDD = +5V

–7

–8

–9

–10

ON RESPONSE – dB

–11

ADG721/ADG722/ADG723

–12

Figure 7. On Response vs. Frequency

Test Circuits

I

DS

V1

SD

V

S

Test Circuit 1. On Resistance

RON = V1/I

V

FREQUENCY – Hz

DS

S

IN

1M100 1k 10k 100k 10M

100M

V

S

Test Circuit 2. Off Leakage

V

DD

0.1F

V

DD

SD

R
300

GND

IS (OFF) ID (OFF)

SD

A A

V

D

ADG721

V

IN

V

OUT

C

L

L

35pF

V

IN

ADG722

V

OUT

V

S

Test Circuit 3. On Leakage

50% 50%

50% 50%

90% 90%

t

ON

SD

t

OFF

ID (ON)

A

V

D

REV. A

Test Circuit 4. Switching Times

V

DD

0.1F

V

V

V

OUT1

OUT2

IN

0V

0V

0V

V

V

S1

V

S2

S1 D1

S2

IN1, IN2

V

IN

DD

GND

V

C

L1

35pF

OUT1

R

OUT2

L1

300

D2

R
300

V

C

L2

L2

35pF

50% 50%

90%

90%

t

D

t

90%

90%

D

Test Circuit 5. Break-Before-Make Time Delay, tD (ADG723 Only)

–7–

ADG721/ADG722/ADG723

R

S

V

S

V

DD

0.1F

V

DD

SD

V

S

IN

V

IN

GND

SD

IN

V

DD

V

DD

V

IN

V

OUT

GND

C
1nF

V

OUT

L

Test Circuit 6. Charge Injection

V

OUT

R

L

50

SW ON

V

SW OFF

V

V

DD

V

DD

GND

OUT

R
50

V

OUT

L

Q

= CL  V

INJ

V

S

IN

OUT

0.1F

SD

IN

Test Circuit 7. Off Isolation

V

DD

0.1F

V

NC

DD

SD

V

V

S

IN1

SD

GND

CHANNEL-TO-CHANNEL

CROSSTALK

= 20  LOG V

S/VOUT

50

V

IN2

Test Circuit 8. Channel-to-Channel Crosstalk

R
50

Test Circuit 9. Bandwidth

V

OUT

L

–8–

REV. A

ADG721/ADG722/ADG723

APPLICATIONS INFORMATION

The ADG721/ADG722/ADG723 belong to Analog Devices’
new family of CMOS switches. This series of general-purpose
switches has improved switching times, lower on resistance,
higher bandwidths, low power consumption, and low leakage
currents.

ADG721/ADG722/ADG723 Supply Voltages

Functionality of the ADG721/ADG722/ADG723 extends from

1.8 V to 5.5 V single supply, which makes it ideal for battery­powered instruments, where important design parameters are
power efficiency and performance.

It is important to note that the supply voltage affects the input
signal range, the on resistance, and the switching times of the
part. By taking a look at the typical performance characteristics
and the specifications, the effects of the power supplies can be
clearly seen.

For V

= 1.8 V, on resistance is typically 40 W over the tem-

DD

perature range.

On Response vs. Frequency

Figure 8 illustrates the parasitic components that affect the ac
performance of CMOS switches (the switch is shown surrounded
by a box). Additional external capacitances will further degrade
some performance. These capacitances affect feedthrough,
crosstalk, and system bandwidth.

C

DS

S

R

V

IN

ON

D

C

C

D

LOAD

R

LOAD

V

OUT

Figure 8. Switch Represented by Equivalent Parasitic
Components

The transfer function that describes the equivalent diagram of
the switch (Figure 8) is of the form (A)s shown below.

A(s) = R

È

s(RONCDS) +1

Í

T

Í

s(R

ONCTRT

Î

) +1

˘
˙
˙

˚

where:

= C

C

T

RT = R

LOAD

LOAD

+ CD + C
/(R

LOAD

+ RON)

DS

The signal transfer characteristic is dependent on the switch
channel capacitance, C

. This capacitance creates a frequency

DS

zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with CDS and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).

The dominant effect of the output capacitance, C

, causes the

D

pole breakpoint frequency to occur first. Therefore, in order to
maximize bandwidth, a switch must have a low input and
output capacitance and low on resistance. See Figure 7.

Off Isolation

Off isolation is a measure of the input signal coupled through an
off switch to the switch output. The capacitance, C

, couples

DS

the input signal to the output load, when the switch is off as
shown in Figure 9.

C

DS

S

V

IN

D

C

C

D

LOAD

R

LOAD

V

OUT

Figure 9. Off Isolation Is Affected by External Load Resis­tance and Capacitance

The larger the value of CDS, the larger the values of feedthrough
that are produced. The typical performance characteristic graph
of Figure 5 illustrates the drop in off isolation as a function of
frequency. From dc to roughly 1 MHz, the switch shows better
than –80 dB isolation. Up to frequencies of 10 MHz, the off
isolation remains better than –60 dB. As the frequency increases,
more and more of the input signal is coupled through to the
output. Off isolation can be maximized by choosing a switch
with the smallest C

as possible. The values of load resistance

DS

and capacitance also affect off isolation, as they contribute to
the coefficients of the poles and zeros in the transfer function of
the switch when open.

A(s) =

È
Í
Í

Î

s(R

LOAD

s(R

)(C

LOADCDS

+ CD+ CDS) +1

LOAD

)

˘
˙
˙

˚

REV. A

–9–

ADG721/ADG722/ADG723

OUTLINE DIMENSIONS

8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

3.00
BSC

85

3.00
BSC

1

PIN 1

0.65 BSC

0.15

0.00

0.38

0.22

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187AA

4

SEATING
PLANE

4.90
BSC

1.10 MAX

0.23

0.08

8



0



0.80

0.60

0.40

–10–

REV. A

ADG721/ADG722/ADG723

Revision History

Location Page

3/04—Data Sheet changed from REV. 0 to REV. A.

Additions to APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

REV. A

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C00045–0–3/04(A)

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