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REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG711/ADG712/ADG713
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
CMOS
Low Voltage 4 ⍀ Quad SPST Switches
FUNCTIONAL BLOCK DIAGRAMS
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG711
SWITCHES SHOWN FOR A LOGIC "1" INPUT
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG712
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG713
FEATURES
+1.8 V to +5.5 V Single Supply
Low On Resistance (2.5 ⍀ Typ)
Low On-Resistance Flatness
–3 dB Bandwidth > 200 MHz
Rail-to-Rail Operation
16-Lead TSSOP and SOIC Packages
Fast Switching Times
t
ON
16 ns
t
OFF
10 ns
Typical Power Consumption (< 0.01 W)
TTL/CMOS Compatible
APPLICATIONS
Battery Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
GENERAL DESCRIPTION
The ADG711, ADG712 and ADG713 are monolithic CMOS
devices containing four independently selectable switches. These
switches are designed on an advanced submicron process that
provides low power dissipation yet gives high switching speed,
low on resistance, low leakage currents and high bandwidth.
They are designed to operate from a single +1.8 V to +5.5 V
supply, making them ideal for use in battery powered instruments and with the new generation of DACs and ADCs from
Analog Devices. Fast switching times and high bandwidth
make the part suitable for video signal switching.
The ADG711, ADG712 and ADG713 contain four independent
single-pole/single throw (SPST) switches. The ADG711 and
ADG712 differ only in that the digital control logic is inverted.
The ADG711 switches are turned on with a logic low on the
appropriate control input, while a logic high is required to turn
on the switches of the ADG712. The ADG713 contains two
switches whose digital control logic is similar to the ADG711,
while the logic is inverted on the other two switches.
Each switch conducts equally well in both directions when ON.
The ADG713 exhibits break-before-make switching action.
The ADG711/ADG712/ADG713 are available in 16-lead TSSOP
and 16-lead SOIC packages.
PRODUCT HIGHLIGHTS
1. +1.8 V to +5.5 V Single Supply Operation. The ADG711,
ADG712 and ADG713 offer high performance and are
fully specified and guaranteed with +3 V and +5 V supply
rails.
2. Very Low R
ON
(4.5 Ω max at +5 V, 8 Ω max at +3 V). At
supply voltage of +1.8 V, R
ON
is typically 35 Ω over the
temperature range.
3. Low On-Resistance Flatness.
4. –3 dB Bandwidth >200 MHz.
5. Low Power Dissipation.
CMOS construction ensures low power dissipation.
6. Fast t
ON/tOFF.
7. Break-Before-Make Switching.
This prevents channel shorting when the switches are configured as a multiplexer (ADG713 only).
8. 16-Lead TSSOP and 16-Lead SOIC Packages.
Page 2
–2–
REV. 0
ADG711/ADG712/ADG713–SPECIFICATIONS
1
(VDD = +5 V ⴞ 10%, GND = 0 V. All specifications
–40ⴗC to +85ⴗC unless otherwise noted.)
B Version
–40ⴗC to
Parameter +25ⴗC +85ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On-Resistance (R
ON
) 2.5 Ω typ V
S
= 0 V to VDD, IS = –10 mA;
4 4.5 Ω max Test Circuit 1
On-Resistance Match Between 0.05 Ω typ V
S
= 0 V to VDD, IS = –10 mA
Channels (∆R
ON
) 0.3 Ω max
On-Resistance Flatness (R
FLAT(ON)
) 0.5 Ω typ V
S
= 0 V to VDD, IS = –10 mA
1.0 Ω max
LEAKAGE CURRENTS V
DD
= +5.5 V;
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
S
= 4.5 V/1 V, VD = 1 V/4.5 V;
±0.1 ±0.2 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
S
= 4.5 V/1 V, VD = 1 V/4.5 V;
±0.1 ±0.2 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
S
= VD = 1 V, or 4.5 V;
±0.1 ±0.2 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
DYNAMIC CHARACTERISTICS
2
t
ON
11 ns typ R
L
= 300 Ω, C
L
= 35 pF,
16 ns max V
S
= 3 V; Test Circuit 4
t
OFF
6 ns typ R
L
= 300 Ω, C
L
= 35 pF,
10 ns max V
S
= 3 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
6 ns typ R
L
= 300 Ω, C
L
= 35 pF,
(ADG713 Only) 1 ns min V
S1
= VS2 = 3 V; Test Circuit 5
Charge Injection 3 pC typ V
S
= 2 V; R
S
= 0 Ω, C
L
= 1 nF;
Test Circuit 6
Off Isolation –58 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz
–78 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk –90 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz;
Test Circuit 8
Bandwidth –3 dB 200 MHz typ R
L
= 50 Ω, C
L
= 5 pF; Test Circuit 9
C
S
(OFF) 10 pF typ
C
D
(OFF) 10 pF typ
CD, CS (ON) 22 pF typ
POWER REQUIREMENTS V
DD
= +5.5 V
I
DD
0.001 µA typ Digital Inputs = 0 V or 5 V
1.0 µA max
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
Page 3
–3–REV. 0
ADG711/ADG712/ADG713
(VDD = +3 V ⴞ 10%, GND = 0 V. All specifications –40ⴗC to +85ⴗC unless otherwise noted.)
B Version
–40ⴗC to
Parameter +25ⴗC +85ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On-Resistance (R
ON
) 5 5.5 Ω typ V
S
= 0 V to VDD, IS = –10 mA;
8 Ω max Test Circuit 1
On-Resistance Match Between 0.1 Ω typ V
S
= 0 V to VDD, IS = –10 mA
Channels (∆R
ON
) 0.3 Ω max
On-Resistance Flatness (R
FLAT(ON)
) 2.5 Ω typ V
S
= 0 V to VDD, IS = –10 mA
LEAKAGE CURRENTS V
DD
= +3.3 V;
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
S
= 3 V/1 V, VD = 1 V/3 V;
±0.1 ±0.2 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
S
= 3 V/1 V, VD = 1 V/3 V;
±0.1 ±0.2 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
S
= VD = 1 V, or 3 V;
±0.1 ±0.2 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.4 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
DYNAMIC CHARACTERISTICS
2
t
ON
13 ns typ R
L
= 300 Ω, C
L
= 35 pF,
20 ns max V
S
= 2 V; Test Circuit 4
t
OFF
7 ns typ R
L
= 300 Ω, C
L
= 35 pF,
12 ns max V
S
= 2 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
7 ns typ R
L
= 300 Ω, C
L
= 35 pF,
(ADG713 Only) 1 ns min V
S1
= VS2 = 2 V; Test Circuit 5
Charge Injection 3 pC typ V
S
= 1.5 V; R
S
= 0 Ω, C
L
= 1 nF;
Test Circuit 6
Off Isolation –58 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz
–78 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk –90 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz;
Test Circuit 8
Bandwidth –3 dB 200 MHz typ R
L
= 50 Ω, C
L
= 5 pF; Test Circuit 9
C
S
(OFF) 10 pF typ
C
D
(OFF) 10 pF typ
CD, CS (ON) 22 pF typ
POWER REQUIREMENTS V
DD
= +3.3 V
I
DD
0.001 µA typ Digital Inputs = 0 V or 3 V
1.0 µA max
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
SPECIFICATIONS
1
Page 4
ADG711/ADG712/ADG713
–4–
REV. 0
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG711/ADG712/ADG713 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . –0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 430 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 150°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 27°C/W
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG711BR –40°C to +85°C 0.15" Small Outline (SOIC) R-16A
ADG712BR –40°C to +85°C 0.15" Small Outline (SOIC) R-16A
ADG713BR –40°C to +85°C 0.15" Small Outline (SOIC) R-16A
ADG711BRU –40°C to +85°C Thin Shrink Small Outline (TSSOP) RU-16
ADG712BRU –40°C to +85°C Thin Shrink Small Outline (TSSOP) RU-16
ADG713BRU –40°C to +85°C Thin Shrink Small Outline (TSSOP) RU-16
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 520 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 125°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 42°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
PIN CONFIGURATION
(TSSOP/SOIC)
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
NC = NO CONNECT
IN1
D1
S1
NC
GND
S4
D4
IN4
IN2
D2
S2
V
DD
NC
S3
D3
IN3
ADG711
ADG712
ADG713
Table I. Truth Table (ADG711/ADG712)
ADG711 In ADG712 In Switch Condition
01ON
1 0 OFF
Table II. Truth Table (ADG713)
Logic Switch 1, 4 Switch 2, 3
0 OFF ON
1 ON OFF
Page 5
ADG711/ADG712/ADG713
–5–REV. 0
V
DD
Most positive power supply potential.
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
R
ON
Ohmic resistance between D and S.
∆R
ON
On resistance match between any two channels i.e., R
ON
max–RONmin.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of onresistance as measured over the specified
analog signal range.
I
S
(OFF) Source leakage current with the switch “OFF.”
I
D
(OFF) Drain leakage current with the switch “OFF.”
I
D
, IS (ON) Channel leakage current with the switch “ON.”
V
D (VS
) Analog voltage on terminals D, S.
C
S
(OFF) “OFF” switch source capacitance.
C
D
(OFF) “OFF” switch drain capacitance.
C
D
, CS (ON) “ON” switch capacitance.
t
ON
Delay between applying the digital control
input and the output switching on.
t
OFF
Delay between applying the digital control
input and the output switching off.
t
D
“OFF” time or “ON” time measured
between the 90% points of both switches,
when switching from one address state to
another. (ADG713 only).
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling
through an “OFF” switch.
Charge A measure of the glitch impulse transferred
Injection from the digital input to the analog output
during switching.
Bandwidth The frequency at which the output is attenu-
ated by 3 dB.
On Response The frequency response of the “ON” switch.
On Loss The voltage drop across the “ON” switch,
seen on the On Response vs. Frequency plot
as how many dBs the signal is away from
0 dB at very low frequencies.
TERMINOLOGY
Typical Performance Characteristics
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
6
R
ON
– V
0
0 0.5
VDD = +2.7V
0.5
1
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1 1.5 2 2.5 3 3.5 4 4.5
VDD = +3V
VDD = +4.5V
VDD = +5V
TA = +258C
5
Figure 1. On Resistance as a Function of VD (VS)
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
6
R
ON
– V
0
0
+858C
0.5
1
5.5
5
4.5
4
3.5
3
2.5
2
1.5
13
VDD = +3V
–408C
0.5 1.5 2 2.5
+258C
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures V
DD
= 3 V
Page 6
ADG711/ADG712/ADG713
–6–
REV. 0
–Typical Performance Characteristics
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
6
R
ON
– V
0
0 0.5
0.5
1
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1 1.5 2 2.5 3 3.5 4 4.5 5
VDD = +5V
+858C
–408C
+258C
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures V
DD
= 5 V
VDD = +5V
4 SW
1 SW
FREQUENCY – Hz
10m
1m
1n
100 10M1k
I
SUPPLY
– Amps
10k 100k 1M
100m
10m
1m
100n
10n
Figure 4. Supply Current vs. Input Switching Frequency
FREQUENCY – Hz
–30
OFF ISOLATION – dB
–40
–110
–120
–130
10k 100k 1M 10M 100M
–100
–90
–80
–70
–60
–50
VDD = +5V, +3V
Figure 5. Off Isolation vs. Frequency
FREQUENCY – Hz
–30
CROSSTALK – dB
–40
–110
–120
–130
10k 100k 1M 10M
VDD = +5V, +3V
100M
–100
–90
–80
–70
–60
–50
Figure 6. Crosstalk vs. Frequency
FREQUENCY – Hz
0
ON RESPONSE – dB
–6
10k 100k 1M 10M
VDD = +5V
100M
–4
–2
Figure 7. On Response vs. Frequency
SOURCE VOLTAGE – Volts
25
Q
INJ
– pC
–10
0 0.5
–5
0
20
15
10
5
1 1.5 2 2.5 3 3.5 4 4.5 5
VDD = +5V
VDD = +3V
TA = +258C
Figure 8. Charge Injection vs. Source Voltage
Page 7
ADG711/ADG712/ADG713
–7–REV. 0
APPLICATIONS
Figure 9 illustrates a photodetector circuit with programmable
gain. An AD820 is used as the output operational amplifier.
With the resistor values shown in the circuit, and using different
combinations of the switches, gain in the range of 2 to 16 can be
achieved.
+5V
+2.5V
R3
510kV
C1
V
OUT
GND
D1
S1 D1
GAIN RANGE 2 TO 16
+5V
AD820
S2
D2
S3 D3
S4
D4
(LSB) IN1
IN2
IN3
(MSB) IN4
R4
240kVR5240kV
R6
120kVR7120kV
R8
120kV
R9
120kV
R10
120kV
R1
33kV
R2
510kV
+2.5V
Figure 9. Photodetector Circuit with Programmable Gain
I
DS
V1
SD
V
S
RON = V1/I
DS
Test Circuit 1. On Resistance
Test Circuits
V
D
IS (OFF)
I
D
(OFF)
SD
V
S
A A
Test Circuit 2. Off Leakage
0.1mF
V
S
IN
S
D
V
DD
GND
R
L
300V
C
L
35pF
V
OUT
V
DD
ADG711
ADG712
V
IN
V
IN
V
OUT
t
ON
t
OFF
50% 50%
90%
90%
50% 50%
V
S
Test Circuit 4. Switching Times
S1 D1
0.1mF
V
DD
IN1, IN2
V
S1
GND
R
L1
300V
C
L1
35pF
V
OUT1
V
S2
V
OUT2
R
L2
300V
C
L2
35pF
S2
V
IN
D2
V
DD
ADG713
t
D
t
D
50% 50%
90%
V
IN
V
OUT1
V
OUT2
90%
90%
90%
0V
0V
0V
Test Circuit 5. Break-Before-Make Time Delay, t
D
ID (ON)
SD
A
V
D
V
S
Test Circuit 3. On Leakage
Page 8
–8–
C3385–8–10/98
PRINTED IN U.S.A.
ADG711/ADG712/ADG713
REV. 0
V
OUT
V
OUT
Q
INJ
= CL 3 V
OUT
SW ON
V
IN
SW OFF
S
D
V
DD
IN
R
S
GND
V
S
V
OUT
C
L
1nF
V
DD
Test Circuit 6. Charge Injection
SD
0.1mF
V
DD
IN
V
S
GND
R
L
50V
V
OUT
V
IN
V
DD
Test Circuit 7. Off Isolation
SD
0.1mF
V
DD
V
S
GND
50V
V
IN1
V
IN2
S
D
R
L
50V
NC
CHANNEL-TO-CHANNEL CROSSTALK = 20 3 LOG
|
VS/V
OUT
|
V
DD
V
OUT
Test Circuit 8. Channel-to-Channel Crosstalk
SD
0.1mF
V
DD
IN
V
S
GND
R
L
50V
V
OUT
V
IN
V
DD
Test Circuit 9. Bandwidth
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Narrow Body SOIC
(R-16A)
16
9
81
0.3937 (10.00)
0.3859 (9.80)
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0500
(1.27)
BSC
0.0099 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
88
08
0.0196 (0.50)
0.0099 (0.25)
3 458
16-Lead TSSOP
(RU-16)
16
9
8
1
0.201 (5.10)
0.193 (4.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
88
08
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