1.8 V to 5.5 V single supply
±2.5 V dual supply
3 Ω on resistance
0.75 Ω on resistance flatness
100 pA leakage currents
14 ns switching times
Single 8-to-1 multiplexer ADG708
Differential 4-to-1 multiplexer ADG709
16-lead TSSOP package
Low power consumption
TTL-/CMOS-compatible inputs
APPLICATIONS
Data acquisition systems
Communication systems
Relay replacement
Audio and video switching
Battery-powered systems
GENERAL DESCRIPTION
Low Voltage 4-/8-Channel Multiplexers
ADG708/ADG709
FUNCTIONAL BLOCK DIAGRAMS
ADG708
8
1 OF 8
DECODER
A0DA1A2
Figure 1.
ADG709
S1A
S4A
EN
DA
00041-001
The ADG708/ADG709 are low voltage, CMOS analog
multiplexers comprising eight single channels and four
differential channels, respectively. The ADG708 switches one of
eight inputs (S1 to S8) to a common output, D, as determined
by the 3-bit binary address lines A0, A1, and A2. The ADG709
switches one of four differential inputs to a common differential
output as determined by the 2-bit binary address lines A0 and
A1. An EN input on both devices is used to enable or disable
the device. When disabled, all channels are switched off.
Low power consumption and an operating supply range of
1.8 V to 5.5 V make the ADG708/ADG709 ideal for batterypowered, portable instruments. All channels exhibit breakbefore-make switching action preventing momentary shorting
when switching channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low on resistance, and leakage currents.
On resistance is in the region of a few ohms and is closely matched
between switches and very flat over the full signal range. These parts
can operate equally well as either multiplexers or demultiplexers
and have an input signal range that extends to the supplies.
The ADG708/ADG709 are available in a 16-lead TSSOP.
S1B
EN
DB
00041-002
S4B
1 OF 4
DECODER
A0
A1
Figure 2.
PRODUCT HIGHLIGHTS
1. Single-/dual-supply operation. The ADG708/ADG709 are
fully specified and guaranteed with 3 V and 5 V single-supply
and ±2.5 V dual-supply rails.
2. Low R
3. Low power consumption (<0.01 μW).
4. Guaranteed break-before-make switching action.
5. Small 16-lead TSSOP package.
(3 Ω typical).
ON
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADG708 85 85 pF typ f = 1 MHz
ADG709 42 42 pF typ f = 1 MHz
CD, CS (On)
ADG708 96 96 pF typ f = 1 MHz
ADG709 48 48 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 2.75 V
IDD 0.001 0.001 μA typ Digital inputs = 0 V or 2.75 V
1.0 1.0 1.0 1.0 μA max
ISS 0.001 0.001 μA typ VSS = −2.75 V
1.0 1.0 1.0 1.0 μA max Digital inputs = 0 V or 2.75 V
1
Guaranteed by design not subject to production test.
−40°C to
+125°C
+25°C
−40°C to
+85°C
−40°C to
+125°C
Unit
Test Conditions/
Comments
= 50 Ω, CL = 5 pF,
R
L
f = 10 MHz
= 50 Ω, CL = 5 pF,
R
L
f = 1 MHz; see Figure 29
= 50 Ω, CL = 5 pF;
R
L
see Figure 30
Rev. C | Page 8 of 20
ADG708/ADG709
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Rating
VDD to VSS 7 V
VDD to GND −0.3 V to +7 V
VSS to GND +0.3 V to −3.5 V
Analog Inputs1
Digital Inputs1
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
Continuous Current, S or D 30 mA
Operating Temperature
Industrial Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
TSSOP Package, Power Dissipation 432 mW
θJA Thermal Impedance 150.4°C/W
θJC Thermal Impedance 27.6°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
1
Overvoltages at A, EN, S, or D are clamped by internal codes. Current should
be limited to the maximum ratings given.
− 0.3 V to VDD + 0.3 V
V
SS
or 30 mA, whichever
occurs first
−0.3 V to V
30 mA, whichever
occurs first
100 mA
+ 0.3 V or
DD
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any one time.
ESD CAUTION
Rev. C | Page 9 of 20
ADG708/ADG709
V
AS3AS4A
A
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
A0
EN
SS
S1
S2
S3
S4
D
1
2
3
ADG708
4
TOP VIEW
5
(Not to Scale)
6
7
8
16
A1
15
A2
14
GND
V
13
DD
12
S5
11
S6
10
S7
9
S8
Figure 3. ADG708 Pin Configuration
00041-003
A0
S1
S2
V
EN
SS
DA
1
2
3
ADG709
4
TOP VIEW
5
(Not to Scale)
6
7
8
16
A1
15
GND
14
V
DD
13
S1B
12
S2B
11
S3B
S4B
10
9
DB
Figure 4. ADG709 Pin Configuration
00041-004
Table 5. ADG708 Pin Function Descriptions
Pin No. Mnemonic Description
1 A0 Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
2 EN Digital Input. Controls the configuration of the switch, as shown in the truth table (see Tab le 7).
3 VSS Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
4 S1 Source Terminal. Can be an input or output.
5 S2 Source Terminal. Can be an input or output.
6 S3 Source Terminal. Can be an input or output.
7 S4 Source Terminal. Can be an input or output.
8 D Drain Terminal. Can be an input or output.
9 S8 Source Terminal. Can be an input or output.
10 S7 Source Terminal. Can be an input or output.
11 S6 Source Terminal. Can be an input or output.
12 S5 Source Terminal. Can be an input or output.
13 VDD Most Positive Power Supply Pin.
14 GND Ground (0 V) Reference.
15 A2 Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
16 A1 Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Table 6. ADG709 Pin Function Descriptions
Pin No. Mnemonic Description
1 A0 Digital Input. Controls the configuration of the switch, as shown in the truth table (see Tabl e 8).
2 EN Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
3 VSS Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
4 S1A Source Terminal. Can be an input or output.
5 S2A Source Terminal. Can be an input or output.
6 S3A Source Terminal. Can be an input or output.
7 S4A Source Terminal. Can be an input or output.
8 DA Drain Terminal. Can be an input or output.
9 DB Drain Terminal. Can be an input or output.
10 S4B Source Terminal. Can be an input or output.
11 S3B Source Terminal. Can be an input or output.
12 S2B Source Terminal. Can be an input or output.
13 S1B Source Terminal. Can be an input or output.
14 VDD Most Positive Power Supply Pin.
15 GND Ground (0 V) Reference.
16 A1 Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Figure 5. On Resistance as a Function of VD (VS) for Single Supply
8
7
6
5
4
3
ON RESISTANCE (Ω)
2
1
0
–2.5 –2.0 –1.5 –1.0 –0.51. 0 1.5 2.0 2.5 3. 00.50
–3.0
VD OR VS – DRAIN OR SOURCE VO LTAGE (V)
VDD = +2.25V
V
= –2.25V
SS
V
DD
V
SS
= +2.75V
= –2.75V
T
A
= 25°C
Figure 6. On Resistance as a Function of VD (VS) for Dual Supply
8
7
6
5
4
3
ON RESISTANCE (Ω)
2
1
0
00.51.01.52.03.02.5
OR VS – DRAIN OR SOURCE VOLTAG E (V)
V
00041-005
D
–40°C
+125°C
+25°C
V
DD
V
SS
+85°C
= 3V
= 0V
00041-008
Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures,
Single Supply
6
5
4
3
2
ON RESISTANCE (Ω)
1
0
–2.5 –2. 0 –1.5 –1.000.5 1. 01.52.0–0.5–2.5
00041-006
+125°C
+85°C
–40°C
V
OR VS – DRAIN OR SOURCE VO LTAGE (V)
D
VDD = +2.5V
V
= –2.5V
SS
+25°C
0041-009
Figure 9. On Resistance as a Function of VD (VS) for Different Temperatures,
Dual Supply
8
7
6
5
4
3
ON RESISTANCE (Ω)
2
1
0
0123 4
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
+25°C
+85°C
–40°C
+125°C
V
= 5V
DD
V
= 0V
SS
5
0041-007
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures,
Single Supply
Rev. C | Page 12 of 20
0.12
0.08
0.04
0
CURRENT (nA)
–0.04
–0.08
–0.12
012345
VS, (VD = VDD – VS) (V)
ID (ON)
IS (OFF)
VDD = 5V
V
SS
T
A
ID (OFF)
= 0V
= 25°C
Figure 10. Leakage Currents as a Function of VD (VS)
00041-010
ADG708/ADG709
0.12
0.08
VDD = 3V
V
= 0V
SS
T
= 25°C
A
0.35
0.30
VDD = +3V
0.04
0
CURRENT (nA)
–0.04
–0.08
–0.12
00.5
1.01.52.03.0
VD, (VS = VDD – VD) (V)
Figure 11. Leakage Currents as a Function of V
0.12
0.08
0.04
0
CURRENT (nA)
–0.04
–0.08
(OFF)
I
S
I
D
IS (OFF)
(ON), VS = V
ID (OFF)
I
(ON)
D
(OFF)
I
D
2.5
(VS)
D
VDD = +2.5V
V
= –2.5V
SS
= 25°C
T
A
D
0.25
0.20
0.15
CURRENT (nA)
0.10
0.05
0
0
20406080100120
0041-011
TEMPERATURE (°C)
ID (ON)
ID (OFF)
(OFF)
I
S
00041-014
Figure 14. Leakage Currents as a Function of Temperature
10m
TA = 25°C
1m
100µ
CURRENT (A)
100n
10µ
1µ
10n
VDD= +2.5V
V
= –2.5V
SS
VDD = +5V
VDD = +3V
–0.12
–3.0
–2.5 –2.0 –1.5 –1. 000.5 1.0 1.5 2.0 2.5
–0.53.0
, (VD = VDD – VS) (V)
V
S
Figure 12. Leakage Currents as a Function of VD (VS)
0.35
VDD = +5V
= 0V
V
SS
0.30
AND
= +2.5V
V
DD
= –2.5V
V
SS
0.25
0.20
0.15
CURRENT (nA)
0.10
0.05
0
0
20406080100120
ID (OFF)
TEMPERATURE (°C)
I
ID (ON)
S
Figure 13. Leakage Currents as a Function of Temperature
(OFF)
1n
0041-012
10
FREQUENCY (Hz)
10M1M10k100k1k100
0041-015
Figure 15. Supply Current vs. Input Switching Frequency
0
–20
–40
–60
–80
ATTENUATIO N (dB)
–100
–120
30k100M10M100k1M
00041-013
FREQUENCY (Hz)
V
DD
T
A
= 5V
= 25°C
00041-016
Figure 16. Off Isolation vs. Frequency
Rev. C | Page 13 of 20
ADG708/ADG709
ATTENUATIO N (dB)
–100
–20
–40
–60
–80
0
VDD = 5V
T
= 25°C
A
20
10
0
= +3V
V
= +2.5V
= –2.5V
DD
V
= 0V
SS
(pC)
–10
INJ
Q
–20
–30
V
DD
V
SS
V
V
DD
SS
TA = 25°C
= +5V
= 0V
–120
30k
FREQUENCY (Hz)
Figure 17. Crosstalk vs. Frequency
100M10M100k1M
0041-017
–40
–3
–1125
–2
VOLTAGE (V)
Figure 19. Charge Injection vs. Source Voltage
40
3
00041-019
0
VDD = 5V
T
= 25°C
A
–5
–10
ATTENUATION (dB)
–15
–20
30k
FREQUENCY (Hz)
100M10M100k1M
00041-018
Figure 18. On Response vs. Frequency
Rev. C | Page 14 of 20
ADG708/ADG709
VSSV
VSSV
VSSV
*
V
V
V
V
TEST CIRCUITS
I
DS
V1
S
V
S
RON = V1/I
Figure 20. On Resistance
V
DD
V
I
V
(OFF)
S
S
A
DD
S1
S2
S8
V
D
Figure 21. IS (OFF)
DD
V
DD
A2
IN
50Ω
A1
A0
ADG708*
2.4V
SIMILAR CO NNECTION F OR ADG709.
V
IN
50Ω
EN
DD
V
DD
A2
A1
S2 TO S7
A0
ADG708*
2.4V
*SIMILAR CONNECTIO N FOR ADG709.
EN
GND
GND
GND
V
DS
V
SS
V
SS
EN
V
SS
S2 TO S7
SS
SS
S1
S8
D
D
0041-020
D
0.8V
00041-021
V
S1
S1
V
S8
S8
D
R
L
300Ω
C
L
35pF
V
OUT
Figure 24. Switching Time of Multiplexer, t
V
S
V
OUT
R
300Ω
C
L
L
35pF
Figure 25. Break-Before-Make Delay, t
ADDRESS
DRIVE (V
ADDRESS
DRIVE (V
DD
GND
V
SS
I
(OFF)
D
D
A
V
EN
0.8V
D
00041-022
V
DD
S1
S2
S8
V
S
Figure 22. ID (OFF)
DD
V
S1
S8
V
S
V
GND
SS
I
(ON)
D
D
A
V
EN
2.4V
D
00041-023
DD
Figure 23. ID (ON)
3V
)
IN
50%
0V
V
S1
V
OUT
V
S8
t
TRANSITION
90%
TRANSITION
3
)
IN
0V
V
OUT
OPEN
80%
t
OPEN
50%
80%
t
TRANSITI ON
90%
0041-024
00041-025
Rev. C | Page 15 of 20
ADG708/ADG709
VDDV
V
V
V
V
2.4V
V
VDDV
ENABLE
DRIVE (V
OUTPUT
3
(V
IN
0V
V
OUT
)
3V
IN
0V
V
O
0V
(EN), t
ON
)
50%
0.9V
(EN)
OFF
Q
= CL× ΔV
INJ
50%
t
(EN)
OFF
0.9V
ΔV
OUT
O
0041-026
00041-027
O
t
(EN)
ON
OUT
SS
V
DDVSS
A2
A1
S2 TO S8
A0
ADG708*
EN
V
IN
50Ω
*SIMILAR CO NNECTION F OR ADG709.
R
S
V
S
V
IN
*SIMILAR CO NNECTION F OR ADG709.
GND
A2
A1
A0
S
EN
DD
V
DD
ADG708*
GND
V
S1
S
D
R
L
300Ω
C
L
35pF
V
OUT
Figure 26. Enable Delay, t
SS
V
LOGIC INPUT
OUT
V
SS
D
C
L
1nF
Figure 27. Charge Injection
0.1µF
A2
A1
A0
EN
OFF ISOLATION = 20 log
NETWORK
ANALYZER
50Ω
V
S
DD
SS
V
V
DD
SS
S
D
GND
V
V
Figure 28. Off Isolation
50Ω
0.1µF
50Ω
OUT
S
SS
0.1µF0.1µF
V
V
DD
A2
A1
A0
S1
SS
EN
ADG708*
D
S2
S8
GND
NETWORK
ANALYZER
50Ω
V
V
OUT
R
L
50Ω
2.4V
S
NETWO RK
ANALYZER
R
50Ω
00041-028
V
OUT
L
*SIMILAR CONNECTION FOR ADG709.
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
V
OUT
V
S
00041-029
Figure 29. Channel-to-Channel Crosstalk
Rev. C | Page 16 of 20
ADG708/ADG709
V
V
DD
V
DDVSS
S
GND
SS
NETWO RK
ANALYZER
50Ω
V
R
50Ω
S
V
OUT
L
0041-030
D
V
WITH SWITCH
OUT
V
WITHOUT SWITCH
OUT
0.1µF0.1µF
A2
A1
A0
2.4V
INSERTION LOSS = 20 log
EN
Figure 30. Bandwidth
Rev. C | Page 17 of 20
ADG708/ADG709
TERMINOLOGY
VDD
Most positive power supply potential.
V
SS
Most negative power supply in a dual-supply application. In
single-supply applications, tie V
to ground at the device.
SS
GND
Ground (0 V) reference.
S
Source terminal. Can be an input or output.
D
Drain terminal. Can be an input or output.
Ax
Logic control input.
EN
Active high enable.
R
ON
Ohmic resistance between D and S.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
I
(Off)
S
Source leakage current with the switch off.
I
(Off)
D
Drain leakage current with the switch off.
I
, IS (On)
D
Channel leakage current with the switch on.
V
(VS)
D
Analog voltage on Terminal D and Terminal S.
C
(Off)
S
Off switch source capacitance. Measured with reference to ground.
(Off)
C
D
Off switch drain capacitance. Measured with reference to ground.
C
, CS (On)
D
On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
TRANSITION
Delay time measured between the 50% and 90% points of the
digital inputs and the switch on condition when switching from
one address state to another.
t
(EN)
ON
Delay time between the 50% and 90% points of the EN digital
input and the switch on condition.
(EN)
t
OFF
Delay time between the 50% and 90% points of the EN digital
input and the switch off condition.
t
OPEN
Off time measured between the 80% points of both switches
when switching from one address state to another.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Charge
A measure of the glitch impulse transferred from injection of
the digital input to the analog output during switching.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
On Loss
The loss due to the on resistance of the switch.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
(I
)
INL
INH
Input current of the digital input.
I
DD
Positive supply current.
I
SS
Negative supply current.
Rev. C | Page 18 of 20
ADG708/ADG709
APPLICATIONS INFORMATION
POWER SUPPLY SEQUENCING
When using CMOS devices, take care to ensure correct power
supply sequencing. Incorrect power supply sequencing can
result in the device being subjected to stresses beyond the
maximum ratings listed in Figure 4.
Always apply digital and analog inputs after power supplies and
ground. For single-supply operation, tie V
the device as possible.
to GND as close to
SS
Rev. C | Page 19 of 20
ADG708/ADG709
OUTLINE DIMENSIONS
5.10
5.00
4.90
0.15
0.05
4.50
4.40
4.30
PIN 1
16
0.65
BSC
COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-153-AB
0.10
0.30
0.19
9
81
1.20
MAX
SEATING
PLANE
6.40
BSC
0.20
0.09
8°
0°
0.75
0.60
0.45
Figure 31. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG708BRU −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708BRU-REEL −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708BRU-REEL7 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708BRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708BRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708BRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRU −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRU-REEL −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRU-REEL7 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG708CRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRU −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRU-REEL −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRU-REEL7 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709BRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRU −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRU-REEL −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRU-REEL7 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRUZ1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRUZ-REEL1 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG709CRUZ-REEL71 −40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16