2.5 ⍀ (Typ) On Resistance
Low On-Resistance Flatness
–3 dB Bandwidth >200 MHz
Rail-to-Rail Operation
10-Lead SOIC Package
Fast Switching Times
20 ns
t
ON
13 ns
t
OFF
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible
APPLICATIONS
Battery Powered Systems
Communication Systems
Sample-and-Hold Systems
Audio Signal Routing
Data Acquisition System
Video Switching
Low Voltage 4 ⍀, 4-Channel Multiplexer
ADG704
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The ADG704 is a CMOS analog multiplexer, comprising four
single channels. This multiplexer is designed on an advanced
submicron process that provides low power dissipation yet gives
high switching speed, low on resistance, low leakage currents
and high bandwidths.
The on resistance profile is very flat over the full analog signal
range. This ensures excellent linearity and low distortion when
switching audio signals. Fast switching speed also makes the
part suitable for video signal switching.
The ADG704 can operate from a single supply range of +1.8 V
to +5.5 V, making it ideal for use in battery powered instruments and with the new generation of DACs and ADCs from
Analog Devices.
The ADG704 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1 and
EN. A Logic “0” on the EN pin disables the device.
Each switch of the ADG704 conducts equally well in both
directions when ON. The ADG704 exhibits break-before-make
switching action.
The ADG704 is available in 10-lead µSOIC package.
PRODUCT HIGHLIGHTS
1. +1.8 V to +5.5 V Single Supply Operation.
The ADG704 offers high performance and is fully specified
and guaranteed with +3 V and +5 V supply rails.
2. Very Low R
At supply voltage of +1.8 V, R
temperature range.
3. Low On-Resistance Flatness.
4. –3 dB Bandwidth Greater than 200 MHz.
5. Low Power Dissipation.
CMOS construction ensures low power dissipation.
6. Fast t
7. Break-Before-Make Switching Action.
8. 10-Lead µSOIC Package.
ON/tOFF
(4.5 Ω Max at 5 V, 8 Ω Max at 3 V).
ON
.
is typically 35 Ω over the
ON
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
TemperaturePackage
ModelRangeBrand
ADG704BRM–40°C to +85°CS9BRM-10
NOTES
1
Brand = Due to small package size, these three characters represent the part
number.
2
RM = µSOIC.
PIN CONFIGURATION
(10-Lead SOIC)
1
A0
2
S1
ADG704
3
GND
S3
EN
TOP VIEW
(Not to Scale)
4
5
1
30 mA, Whichever Occurs First
1
10
A1
9
S2
8
D
7
S4
6
V
DD
Option
2
TERMINOLOGY
V
DD
Most positive power supply potential.
GNDGround (0 V) reference.
SSource terminal. May be an input or output.
DDrain terminal. May be an input or output.
A0, A1Logic control inputs.
ENLogic control input.
R
ON
∆R
ON
R
FLAT(ON)
Ohmic resistance between D and S.
On resistance match between any two chan-
nels i.e., R
max–RONmin.
ON
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
(OFF)Drain leakage current with the switch “OFF.”
D
(OFF)Source leakage current with the switch “OFF.”
I
S
I
, IS (ON)Channel leakage current with the switch “ON.”
D
)Analog voltage on terminals D, S.
V
D (VS
C
(OFF)“OFF” switch source capacitance.
S
(OFF)“OFF” switch drain capacitance.
C
D
C
, CS (ON)“ON” switch capacitance.
D
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See Test
Circuit 5.
CrosstalkA measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
Off IsolationA measure of unwanted signal coupling
through an “OFF” switch.
ChargeA measure of the glitch impulse transferred
Injectionfrom the digital input to the analog output
during switching.
BandwidthThe frequency at which the output is attenu-
ated by –3 dBs.
On ResponseThe frequency response of the “ON” switch.
On LossThe voltage drop across the “ON” switch,
seen on the On Response vs. Frequency plot
as how many dBs the signal is away from 0 dB
at very low frequencies.
Table I. Truth Table
A1A0ENON Switch
XX0NONE
0011
0112
1013
1114
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG704 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. A
Page 5
Typical Performance Characteristics–
FREQUENCY – Hz
10m
I
SUPPLY
– A
1m
100m
10m
1m
100n
10n
1n
1001k10k100k1M10M
A0 TOGGLED
EN TOGGLED
VDD = +5V
–30
OFF ISOLATION – dB
–40
–50
–60
–70
–80
FREQUENCY – Hz
10k100k1M10M100M
–90
–100
–110
–120
–130
VDD = +5V, +3V
ADG704
6.0
5.5
5.0
4.5
4.0
3.5
– V
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
0
VDD = +3.0V
0.5 1.0 1.52.0 2.53.0 3.5 4.0 4.55.0
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
VDD = +2.7V
VDD = +5.0V
TA = +258C
VDD = +4.5V
Figure 1. On Resistance as a Function of VD (VS) Single
Supplies
6.0
5.5
5.0
4.5
4.0
3.5
– V
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
0.51.01.52.02.53.0
0
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
+858C
+258C
–408C
VDD = +3.0V
Figure 4. Supply Current vs. Input Switching Frequency
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures; V
6.0
5.5
5.0
4.5
4.0
3.5
– V
3.0
ON
R
2.5
2.0
1.5
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures; V
1.0
0.5
0
0.5 1.0 1.52.0 2.53.0 3.5 4.0 4.55.0
0
VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
DD
+858C
+258C
–408C
DD
= 3 V
= 5 V
VDD = +5.0V
Figure 5. Off Isolation vs. Frequency
–30
–40
–50
–60
–70
–80
–90
CROSSTALK – dB
–100
–110
–120
–130
10k100k1M10M100M
FREQUENCY – Hz
VDD = +5V, +3V
Figure 6. Crosstalk vs. Frequency
–5–REV. A
Page 6
ADG704
0
VDD = +5V
–2
–4
ON RESPONSE – dB
–6
10k100k1M10M100M
Figure 7. On Response vs. Frequency
APPLICATIONS
FREQUENCY – Hz
CH1
.
.
.
CH4
75V
75V
25
20
15
10
– pC
INJ
Q
–5
–10
–15
5
0
0.05.00.5
VDD = +3V
1.0 1.52.0 2.5 3.0 3.54.0 4.5
SOURCE VOLTAGE – Volts
VDD = +5VTA = +258C
Figure 8. Charge Injection vs. Source Voltage
V
DD
V+
S1
.
.
.
S4
EN
A
0 A1
ADG704
D
A = 2
250V
75V
250V
V
OUT
R
L
75V
Figure 9. 4-Channel Video Multiplexing
–6–
REV. A
Page 7
Test Circuits
SD
V
S
RON = V1/I
ADG704
I
DS
V1
IS (OFF)ID (OFF)
SD
AA
DS
V
S
V
D
V
S
SD
ID (ON)
A
V
D
Test Circuit 1. On Resistance
0.1mF
V
S
IN
S1
VS1
.
.
.
S4
VS4
V
IN
V
DD
V
DD
SD
GND
V
DD
0.1mF
V
DD
.
.
.
D
GND
Test Circuit 2. Off Leakage
V
IN
V
OUT
R
L
300V
C
L
35pF
V
OUT
Test Circuit 4. Switching Times
V
IN
0V
V
50%50%
OUT
0V
R
L
300V
C
L
35pF
V
OUT
Test Circuit 3. On Leakage
50%50%
90%
t
ON
50%50%
t
D
90%
t
OFF
t
D
Test Circuit 5. Break-Before-Make Time Delay, t
V
DD
V
DD
R
S
V
S
SD
DECODER
GND
EN
A0 A1
C
1nF
V
OUT
L
V
IN
V
OUT
Q
INJ
D
SW OFFSW ON
= CL 3DV
OUT
DV
OUT
Test Circuit 6. Charge Injection
–7–REV. A
Page 8
ADG704
V
DD
0.1mF
S1
.
.
.
.
.
S4
V
V
S
IN
GND
D
.
.
.
.
R
50V
V
OUT
L
Test Circuit 7. Off Isolation
V
DD
0.1mF
V
DD
S
V
S
IN
GND
V
OUT
V
IN
S
Test Circuit 8. Channel-to-Channel Crosstalk
D
R
50V
V
OUT
L
0.1mF
V
DD
V
DD
S1
S2
D
GND
CHANNEL-TO-CHANNEL
CROSSTALK = 20 3 LOG
R
50V
L
|V
|
S/VOUT
C3383a–0–6/99
Test Circuit 9. Bandwidth
0.122 (3.10)
0.114 (2.90)
0.037 (0.94)
0.031 (0.78)
0.006 (0.15)
0.002 (0.05)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
10-Lead SOIC
(RM-10)
0.122 (3.10)
0.114 (2.90)
106
PIN 1
0.0197 (0.50) BSC
0.120 (3.05)
0.112 (2.85)
51
0.012 (0.30)
0.006 (0.15)
0.199 (5.05)
0.187 (4.75)
0.043 (1.10)
MAX
SEATING
PLANE
0.009 (0.23)
0.005 (0.13)
0.120 (3.05)
0.112 (2.85)
68
08
0.028 (0.70)
0.016 (0.40)
PRINTED IN U.S.A.
–8–
REV. A
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