Datasheet ADG658 Datasheet (Analog Devices)

+3 V/+5 V/±5 V CMOS 4- and 8-Channel

S

FEATURES

±2 V to ±6 V dual supply
2 V to 12 V single supply
Automotive temperature range −40°C to +125°C
<0.1 nA leakage currents
45 Ω on resistance over full signal range
Rail-to-rail switching operation
Single 8-to-1 multiplexer ADG658
Differential 4-to-1 multiplexer ADG659
16-lead LFCSP/TSSOP/QSOP packages
Typical power consumption <0.1 µW
TTL/CMOS compatible inputs
Package upgrades to 74HC4051/74HC4052 and

MAX4051/MAX4052/MAX4581/MAX4582

APPLICATIONS

Automotive applications
Automatic test equipment
Data acquisition systems
Battery-powered systems
Communication systems
Audio and video signal routing
Relay replacement
Sample-and-hold systems
Industrial control systems

GENERAL DESCRIPTION

The ADG658 and ADG659 are low voltage, CMOS analog
multiplexers comprised of eight single channels and four
differential channels, respectively. The ADG658 switches one of
eight inputs (S1–S8) to a common output, D, as determined by
the 3-bit binary address lines A0, A1, and A2. The ADG659
switches one of four differential inputs to a common differential
output, as determined by the 2-bit binary address lines A0 and

EN

A1. An
the device. When disabled, all channels are switched off.

These parts are designed on an enhanced process that provides
lower power dissipation yet gives high switching speeds. These
parts can operate equally well as either multiplexers or

input on both devices is used to enable or disable

Analog Multiplexers

ADG658/ADG659

demultiplexers and have an input range that extends to the
supplies. All channels exhibit break-before-make switching
action, preventing momentary shorting when switching
channels. All digital inputs have 0.8 V to 2.4 V logic thresholds,
ensuring TTL/CMOS logic compatibility when using single
+5 V or dual ±5 V supplies.

The ADG658 and ADG659 are available in 16-lead TSSOP/
QSOP packages and 16-lead 4 mm × 4 mm LFCSP packages.

PRODUCT HIGHLIGHTS

1. Single- and dual-supply operation.
The ADG658 and ADG659 offer high performance and are
fully specified and guaranteed with ±5 V, +5 V, and +3 V
supply rails.

2. Automotive temperature range −40°C to +125°C.

3. Low power consumption, typically <0.1 µW.

4. 16-lead 4 mm × 4 mm LFCSP packages, 16-lead TSSOP
package and 16-lead QSOP package.

FUNCTIONAL BLOCK DIAGRAM

A0 A1 ENA0 A1 A2

Figure 1.

ADG659

1 OF 4

DECODER

DA

DB

03273-0-001

ADG658

S1

8

1 OF 8

DECODER

EN

SWITCHES SHOWN FOR A LOGIC 1 INPUT

S1A

S4A

D

S1B

S4B

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

www.analog.com

ADG658/ADG659

TABLE OF CONTENTS

Specifications: Dual Supply............................................................. 3

Pin Configuration and Function Descriptions........................... 11

Specifications: Single Supply 5V..................................................... 5

Specifications: Single Supply 2.7 to 3.6 V...................................... 7

Absolute Maximum Ratings............................................................ 9

ESD Caution.................................................................................. 9

REVISION HISTORY

7/04—Data Sheet Changed from Rev. 0 to Rev. A

Updated Format.............................................................. Universal

Added QSOP Package Outline ..................................................20

Changes to Ordering Guide....................................................... 20

3/03—Rev. 0: Initial Version

Typical Perfor m a n c e C ha r a c te r is t i c s ........................................... 13

Test C ir c uits ................................................................................ 16

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 20

Rev. A | Page 2 of 20

ADG658/ADG659

SPECIFICATIONS: DUAL SUPPLY

VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.

B Version

−40°C

Parameter +25°C

to +85°C

ANALOG SWITCH

Analog Signal Range VSS to V
On Resistance (RON) 45 Ω typ VS = ±4.5 V, IS = 1 mA;
75 90 100 Ω max Test Circuit 1
On Resistance Match between 1.3 Ω typ
Channels (∆RON) 3 3.2 3.5 Ω max VS = 3.5 V, IS = 1 mA
On Resistance Flatness (R

) 10 Ω typ VDD = +5 V, VSS = −5 V;

FLAT(ON)

16 17 18 Ω max VS = ±3 V, IS = 1 mA
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V

Source OFF Leakage IS (OFF) ±0.005 nA typ
±0.2 ±5 nA max Test Circuit 2

Drain OFF Leakage ID (OFF) ±0.005 nA typ

ADG658 ±0.2 ±5 nA max Test Circuit 3
ADG659 ±0.1 ±2.5 nA max

Channel ON Leakage ID, IS (ON) ±0.005 nA typ VD = VS = ±4.5 V; Test Circuit 4

ADG658 ±0.2 ±5 nA max
ADG659 ±0.1 ±2.5 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INH

INL

2.4 V min

0.8 V max

Input Current

I

or I

INL

INH

0.005 µA typ VIN = V
±1 µA max
CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

TRANS

2

80 ns typ RL = 300 Ω, CL = 35 pF
115 140 165 ns max VS = 3 V; Test Circuit 5
tON (EN)

80 ns typ R
115 140 165 ns max VS = 3 V; Test Circuit 7
t

(EN)

OFF

30 ns typ R
45 50 55 ns max VS = 3 V; Test Circuit 7
Break-Before-Make Time Delay, t

BBM

50 ns typ RL = 300 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 3 V; Test Circuit 6
Charge Injection 2 pC typ VS = 0 V, RS = 0 Ω,
4 pC max CL = 1 nF; Test Circuit 8
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9
Total Harmonic Distortion, THD + N 0.025 % typ RL = 600 Ω, 2 V p-p, f = 20 Hz to 20 kHz

Channel-to-Channel Crosstalk
(ADG659) −90 dB typ R

−3 dB Bandwidth

ADG658 210 MHz typ RL = 50 Ω, CL = 5 pF;

ADG659 400 MHz typ Test Circuit 10
CS (OFF) 4 pF typ f = 1 MHz
CD (OFF)

ADG658 23 pF typ f = 1 MHz

ADG659 12 pF typ f = 1 MHz

1

Y Version

−40°C
to+125°C Unit Test Conditions/Comments

V VDD = +4.5 V, VSS = −4.5 V

DD

= ±4.5 V, VS = 4.5 V;

V

D

= ±4.5 V, VS = 4.5 V;

V

D

or V

INL

= 300 Ω, CL = 35 pF

L

= 300 Ω, CL = 35 pF

L

= 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 11

L

m

m

INH

Rev. A | Page 3 of 20

ADG658/ADG659

B Version

−40°C

Parameter +25°C

to +85°C

CD, CS (ON)

ADG658 28 pF typ f = 1 MHz
ADG659 16 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V

I

DD

0.01 µA typ Digital Inputs = 0 V or 5.5 V

1 µA max

I

SS

0.01 µA typ Digital Inputs = 0 V or 5.5 V

1 µA max

1

Temperature range is as follows: B Version: −40°C to +85°C. Y Version: −40°C to +125°C.

2

Guaranteed by design; not subject to production test.

Y Version

−40°C
to+125°C Unit Test Conditions/Comments

Rev. A | Page 4 of 20

ADG658/ADG659

SPECIFICATIONS: SINGLE SUPPLY 5V

VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.

B Version

−40°C

Parameter +25°C

to +85°C

ANALOG SWITCH

Analog Signal Range 0 to V
On Resistance (RON) 85 Ω typ VS = 0 V to 4.5 V, IS = 1 mA;
150 160 200 Ω max Test Circuit 1
On Resistance Match between 4.5 Ω typ VS = 3.5 V, IS = 1 mA
Channels (∆RON) 8 9 10 Ω max
On Resistance Flatness (R

) 13 14 16 Ω typ

FLAT(ON)

LEAKAGE CURRENTS VDD = 5.5 V

Source OFF Leakage IS (OFF) ±0.005 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V;
±0.2 ±5 nA max Test Circuit 2
Drain OFF Leakage ID (OFF) ±0.005 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V;

ADG658 ±0.2 ±5 nA max Test Circuit 3
ADG659 ±0.1 ±2.5 nA max

Channel ON Leakage ID, IS (ON) ±0.005 nA typ VS = VD = 1 V or 4.5 V, Test Circuit 4

ADG658 ±0.2 ±5 nA max
ADG659 ±0.1 ±2.5 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INH

INL

2.4 V min

0.8 V max

Input Current

I

or I

INL

INH

0.005 µA typ VIN = V
±1 µA max
CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

TRANS

2

120 ns typ RL = 300 Ω, CL = 35 pF
200 270 300 ns max VS = 3 V; Test Circuit 5
tON (EN)

120 ns typ R
190 245 280 ns max VS = 3 V; Test Circuit 7
t

(EN)

OFF

35 ns typ R
50 60 70 ns max VS = 3 V; Test Circuit 7
Break-Before-Make Time Delay, t

100 ns typ RL = 300 Ω, CL = 35 pF

BBM

10 ns min VS1 = VS2 = 3 V; Test Circuit 6
Charge Injection 0.5 pC typ VS = 2.5 V, RS = 0 Ω, CL = 1 nF;
1 pC max Test Circuit 8
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9
Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF; f = 1 MHz;

(ADG659) Test Circuit 11

−3 dB Bandwidth

ADG658 180 MHz typ RL = 50 Ω, CL = 5 pF;

ADG659 330 MHz typ Test Circuit 10
CS (OFF) 5 pF typ f = 1 MHz
CD (OFF)

ADG658 29 pF typ f = 1 MHz

ADG659 15 pF typ f = 1 MHz

1

Y Version

−40°C
to +125°C Unit Test Conditions/Comments

DD

V VDD = 4.5 V, VSS = 0 V

= 5 V, VSS = 0 V

V

DD

= 1.5 V to 4 V, IS = 1 mA

V

S

or V

INL

INH

= 300 Ω, CL = 35 pF

L

= 300 Ω, CL = 35 pF

L

Rev. A | Page 5 of 20

ADG658/ADG659

C

, CS (ON)

D

ADG658 30 pF typ f = 1 MHz
ADG659 16 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 5.5 V

I

DD

1 µA max

1

Temperature range is as follows: B Version: −40°C to +85°C. Y Version: −40°C to +125°C.

2

Guaranteed by design; not subject to production test.

0.01 µA typ Digital Inputs = 0 V or 5.5 V

Rev. A | Page 6 of 20

ADG658/ADG659

SPECIFICATIONS: SINGLE SUPPLY 2.7 TO 3.6 V

VDD = 2.7 to 3.6 V, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.

B Version

−40°C

Parameter +25°C

to +85°C

ANALOG SWITCH

Analog Signal Range 0 to V
On Resistance (RON) 185 Ω typ VS = 0 V to 2.7 V, IS = 0.1 mA;
300 350 400 Ω max Test Circuit 1
On Resistance Match between 2 Ω typ VS = 1.5 V, IS = 0.1 mA

Channels (∆RON)

4.5 6 7 Ω max

LEAKAGE CURRENTS VDD = 3.3 V

Source OFF Leakage IS (OFF) ±0.005 nA typ VS = 1 V/3 V, VD = 3 V/1 V;
±0.2 ±5 nA max Test Circuit 2
Drain OFF Leakage ID (OFF) ±0.005 nA typ VS = 1 V/3 V, VD = 3 V/1 V;

ADG658 ±0.2 ±5 nA max Test Circuit 3

ADG659 ±0.1 ±2.5 nA max
Channel ON Leakage ID, IS (ON) ±0.005 nA typ VS = VD = 1 V or 3 V, Test Circuit 4

ADG658 ±0.2 ±5 nA max

ADG659 ±0.1 ±2.5 nA max

DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V

INH

INL

2.0 V min

0.5 V max

Input Current

I

or I

INL

INH

0.005 µA typ VIN = V
±1 µA max
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS

t

TRANS

2

200 ns typ RL = 300 Ω, CL = 35 pF
370 440 490 ns max VS = 1.5 V; Test Circuit 7
tON (EN)

230 ns typ R
370 440 490 ns max VS = 1.5 V; Test Circuit 7
t

(EN)

OFF

50 ns typ R

80 90 110 ns max VS = 1.5 V; Test Circuit 7

Break-Before-Make Time Delay, t

200 ns typ RL = 300 Ω, CL = 35 pF

BBM

10 ns min VS1 = VS2 = 1.5 V; Test Circuit 6
Charge Injection 1 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF;
2 pC max Test Circuit 8
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9
Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF; f = 1 MHz;

(ADG659) Test Circuit 11

−3 dB Bandwidth

ADG658 160 MHz typ RL = 50 Ω, CL = 5 pF;

ADG659 300 MHz typ Test Circuit 10
CS (OFF) 5 pF typ f = 1 MHz
CD (OFF)

ADG658 29 pF typ f = 1 MHz

ADG659 15 pF typ f = 1 MHz
CD, CS (ON)

ADG658 30 pF typ f = 1 MHz

ADG659 16 pF typ f = 1 MHz

1

Y Version

−40°C
to +125°C Unit Test Conditions/Comments

DD

V VDD = 2.7 V, VSS = 0 V

or V

INL

INH

= 300 Ω, CL = 35 pF

L

= 300 Ω, CL = 35 pF

L

Rev. A | Page 7 of 20

ADG658/ADG659

B Version

−40°C

Parameter +25°C

to +85°C

POWER REQUIREMENTS VDD = 3.6 V

I

DD

0.01 µA typ Digital Inputs = 0 V or 3.6 V

1 µA max

1

Temperature range is as follows: B Version: −40°C to +85°C. Y Version: −40°C to +125°C.

2

Guaranteed by design; not subject to production test.

Y Version

−40°C
to +125°C Unit Test Conditions/Comments

Rev. A | Page 8 of 20

ADG658/ADG659

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameters Ratings

VDD to V

SS

13 V
VDD to GND −0.3 V to +13 V
VSS to GND +0.3 V to −6.5 V
Analog Inputs
Digital Inputs

1

1

V

−0.3 V to VDD +0.3 V

SS

GND −0.3 V to VDD +0.3

V or 10 mA, whichever

occurs first
Peak Current, S or D 40 mA
(Pulsed at 1 ms, 10% duty cycle max)
Continuous Current, S or D 20 mA
Operating Temperature Range

Automotive (Y Version) −40°C to +125°C

Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA Thermal Impedance, 16-Lead

104°C/W

QSOP
θJA Thermal Impedance, 16-Lead

150.4°C/W

TSSOP
θJA Thermal Impedance (4-Layer

Board),

16-Lead LFCSP 70°C/W
Lead Temperature, Soldering

Vapor Phase (60 sec) 215°C

Infrared (15 sec) 220°C
ESD 5.5 kV

1

Over voltages at AX, EN, S, or D are clamped by internal diodes. Current

should be limited to the maximum ratings.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. A | Page 9 of 20

ADG658/ADG659

Table 5. ADG658 Truth Table

A2 A1 A0

1

X

X X 1 NONE

EN

0 0 0 0 1
0 0 1 0 2
0 1 0 0 3
0 1 1 0 4
1 0 0 0 5
1 0 1 0 6
1 1 0 0 7
1 1 1 0 8

1

X = Don’t Care

Table 6. ADG659 Truth Table

A1 A0

1

X

X 1 NONE

EN

0 0 0 1
0 1 0 2
1 0 0 3
1 1 0 4

1

X = Don’t Care

Switch Condition

On Switch Pair

Rev. A | Page 10 of 20

ADG658/ADG659

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

S1B
S3B

DB
S4B
S2B

EN

V

GND

1

2

3
4

5

6

7

SS

8

ADG659

TOP VIEW

(Not to Scale)

16

V

DD

15

S3A

14

S2A

13

DA

12

S1A

11

S4A

10

A0

9

A1

03273-0-002

EN

V

GND

S5
S7

D
S8
S6

SS

1

2

3

ADG658

4

TOP VIEW

(Not to Scale)

5

6

7

8

16

V

DD

15

S3

14

S2

13

S1

12

S4

11

A0

10

A1

9

A2

Figure 2. 16-Lead TSSOP/QSOP

S8
S6

EN

D

1
2
3

(Not to Scale)

4

DD

V

S7

S5

16 15 14 13

ADG658

TOPVIEW

5 6 7 8

SS

A2

V

GND

S3

12

S2

11

S1

10

S4
A0

9

A1

EXPOSED PAD FLOATING

DB
S4B
S2B

EN

1
2
3
4

DD

V

S3B

S1B

16 15 14 13

ADG659

TOPVIEW

(Not to Scale)

5 6 7 8

SS

A1

V

GND

S3A

A0

12

S2A

11

DA

10

S1A
S4A

9

03273-A-003

Figure 3. 4 mm x 4 mm LFCSP

Table 7. Functional Descriptions

Parameter Description

V

DD

V

SS

I

DD

I

SS

Most Positive Power Supply Potential.
Most Negative Power Supply Potential.
Positive Supply Current.

Negative Supply Current.
GND Ground (0 V) Reference.
S Source Terminal. May be an input or output.
D Drain Terminal. May be an input or output.
A

X

Logic Control Input.
EN Active Low Digital Input. When high, device is disabled and all switches are OFF. When low, AXlogic inputs determine ON

switch.
VD (VS) Analog Voltage on Terminals D, S.
R

ON

∆R
R

FLAT(ON)

ON

Ohmic Resistance between D and S.

On Resistance Match between Any Two Channels, i.e., RONmax − RONmin.

Flatness is defined as the difference between the maximum and minimum value of ON Resistance as measured over the

specified analog signal range.
IS (OFF) Source Leakage Current with the Switch OFF.
ID (OFF) Drain Leakage Current with the Switch OFF.
ID, IS (ON) Channel Leakage Current with the Switch ON.
V

INL

V

INH

I

) Input Current of the Digital Input.

INL (IINH

Maximum Input Voltage for Logic 0.

Minimum Input Voltage for Logic 1.

CS (OFF) OFF Switch Source Capacitance. Measured with reference to ground.
CD (OFF) OFF Switch Drain Capacitance. Measured with reference to ground.

Rev. A | Page 11 of 20

ADG658/ADG659

Parameter Description

CD, CS (ON) ON Switch Capacitance. Measured with reference to ground.
C

IN

t

ON

t

OFF

t

BBM

Charge
Injection

Off Isolation Measure of Unwanted Signal Coupling through an OFF Switch.
Crosstalk Measure of Unwanted Signal Coupled through from One Channel to Another as a Result of Parasitic Capacitance.
Bandwidth The Frequency at which the Output is Attenuated by 3 dB.
On Response The Frequency Response of the ON Switch.
Insertion Loss The Loss Due to the ON Resistance of the Switch.

Digital Input Capacitance.
Delay between Applying the Digital Control Input and the Output Switching ON. See Test Circuit 7.
Delay between Applying the Digital Control Input and the Output Switching OFF.
ON Time. Measured between 80% points of both switches when switching from one address state to another.
Measure of the Glitch Impulse Transferred from the Digital Input to the Analog Output during Switching.

Rev. A | Page 12 of 20

ADG658/ADG659

TYPICAL PERFORMANCE CHARACTERISTICS

100

TA = 25°C

90

80

70

60

50

40

ON RESISTANCE (Ω)

30

20

10

0

–5.5 –3.5 –1.5 0.5 2.5 4.5

VDD,VSS = ±5.5V

VDD,VSS = ±3V

VDD,VSS = ±5V

VD, VS (V)

Figure 4. On Resistance vs. V

250

200

VDD = 2.7V

VDD,VSS = ±2.7V

VDD,VSS = ±4.5V

(VS) for Dual Supply

D

TA = 25°C

03273-0-006

140

120

100

80

60

ON RESISTANCE (Ω)

40

20

= 5V

V

DD

= 0V

V

SS

0

0 1.0 2.0

0.5 1.5 2.5 3.0 4.54.0 5.0

Figure 7. On Resistance vs. V

300

250

+125°C

+85°C

+25°C

–40°C

, VS (V)

V

D

(VS) for Different Temperatures (Single Supply)

D

+85°C

3.5

03273-0-009

+125°C

150

100

ON RESISTANCE (Ω)

50

0

024681012

Figure 5. On Resistance vs. V

100

90

80

70

60

50

40

ON RESISTANCE (Ω)

30

20

10

VDD = +5V

= –5V

V

SS

0

–5 –2 0

–4 –1 123 5

Figure 6. On Resistance vs. V

VDD = 3V

VDD = 3.3V

VDD = 4.5V

VDD = 5.5V

VDD = 12V

+125°C

+85°C

D

VDD = 5V

VDD = 10V

VD, VS(V)

(VS) for Single Supply

D

+25°C

–40°C

V

, VS(V)

D

(VS) for Different Temperatures (Dual Supply)

200

150

100

ON RESISTANCE (Ω)

50

VDD = 3V

= 0V

V

SS

0

03273-0-007

0 0.5 1.0 1.5 2.0 2.5 3.0

Figure 8. On Resistance vs. V

1.5
VDD = 5V

= –5V

V

SS

1.0

= ±4V

V

D

= ±4V

V

S

0.5

0

–0.5

–1.0

CURRENT (nA)

–1.5

–2.0

4–3

03273-0-008

–2.5

0 20 40 60 80 100 120

+25°C

–40°C

V

, VS (V)

D

(VS) for Different Temperatures (Single Supply)

D

IS (OFF)

ID (OFF)

IS,ID (ON)

TEMPERATURE (°C)

03273-0-011

03273-0-010

Figure 9. Leakage Current vs. Temperature (Dual Supply)

Rev. A | Page 13 of 20

ADG658/ADG659

1.5
VDD = +5V

= 0V

V

SS

1.0

V

= ±4V

D

±

=1V

V

S

0.5

0

–0.5

–1.0

CURRENT (nA)

–1.5

VDD = +3V
V

= 0V

SS

–2.0

= ±2.4V

V

D

±

=1V

V

S

–2.5

0 20 40 60 80 100 120

TEMPERATURE (°C)

IS,ID (ON)

Figure 10. Leakage Current vs. Temperature (Single Supply)

14

TA = 25°C

12

10

8

C)

P

(

6

INJ

Q

4

VDD = +5V

2

V

= –5V

SS

0

–2

–4

–5 –3 –1 1 3 5

–4 –2 0 2 4

(V)

V

S

Figure 11. Charge Injection vs. Source Voltage

140

VDD = +5V
V

= –5V

SS

120

100

80

TIME (ns)

60

40

20

0

–40 –20 0 20 40 60 80 100 120

Figure 12. t

t

ON

TEMPERATURE (°C)

Times vs. Temperature (Dual Supply)

ON/tOFF

ID (OFF)

t

OFF

IS (OFF)

VDD = +5V
V

SS

= 0V

03273-0-012

03273-0-013

03273-0-014

350

VSS = 0V

300

250

200

150

t

TIME (ns)

ON

100

50

0

–40 –20 0 100 120

0
–1
–2
–3
–4
–5
–6
–7

dB

–8
–9

–10
–11
–12
–13
–14
–15

Figure 13. t

ON/tOFF

VDD = +5V
V

= –5V

SS

T

= 25°C

A

100k 1M 10M 100M

VDD = 3V

VDD = 5V

VDD = 3V

t

OFF

20 40 60 80

TEMPERATURE (°C)

VDD = 5V

Times vs. Temperature (Single Supply)

FREQUENCY (Hz)

Figure 14. ON Response vs. Frequency (ADG658)

0
–2
–4
–6
–8

–10
–12

dB

–14
–16
–18
–20

VDD = +5V

= –5V

V

SS

–22

= 25°C

T

A

–24

100k 1M 10M 100M

FREQUENCY (Hz)

Figure 15. ON Response vs. Frequency (ADG659)

03273-0-015

03273-0-016

03273-0-017

Rev. A | Page 14 of 20

ADG658/ADG659

–20

–40

0

VDD = +5V

= –5V

V

SS

= 25°C

T

A

10000

1000

100

VSS = 0V

VDD = 12V

(µA)

–60

dB

–80

–100

–120

100k 1M 10M 100M

FREQUENCY (Hz)

03273-0-018

Figure 16. OFF Isolation vs. Frequency

0

VDD = –5V

–10

= +5V

V

SS

= 25°C

T

A

–20

–30

–40
–50
–60

dB

–70

–80
–90

–100
–110
–120
–130

100k 1M 10M 100M

FREQUENCY (Hz)

Figure 17. Cross talk vs. Frequency

03273-0-019

10

DD

I

1

0.1

0.01
01012

2468

Figure 19. V

3.0

2.5

2.0

1.5

1.0

0.5

LOGIC THRESHOLD VOLTAGE (V)

0

0

Figure 20. Logic Threshold Voltage vs. Supply Voltage

VDD = 5V

VDD = 3V

V(EN) (V)

Current vs. Logic Level

DD

V

(V)

DD

12246810

03273-0-021

03273-0-022

100

600Ω
IN AND OUT

10

VDD = +5V
V

= –5V

SS

= 25°C

T

A

1

THD + N (%)

0.1

0.01
20 50 100

200 500 1k 5k 10k 20k

FREQUENCY (Hz)

2k

Figure 18. THD + Noise

03273-0-020

Rev. A | Page 15 of 20

ADG658/ADG659

V

V

TEST CIRCUITS

S

V

S

Figure 21. Test Circuit 1. ON Resistance

I

(OFF)

S

S

S1

A

S2

S8

V

D

Figure 22. Test Circuit 2. I

I

DS

V1

RON =V1/I

V

DD

V

DDVSS

GND

V

V

DD

SS

V

V

DD

GND

SS

(OFF)

I

D

D

EN

LOGIC 1

D

A

(OFF)

V

O

03273-0-025

S1
S2

D

DS

03273-0-023

S8

V

S

Figure 23. Test Circuit 3. I

V

V

DD

SS

V

V

DD

GND

SS

I

(ON)

D

D

EN

A

(ON)

D

V

D

03273-0-026

V

SS

S1
S8

V

S

Figure 24. Test Circuit 4. I

EN

D

(OFF)

S

LOGIC 1

03273-0-024

V

DDVSS

V

DDVSS

A2

IN

50Ω

A1
A0

S2–S7

ADG658*

EN

GND

*SIMILAR CONNECTION FOR ADG659

V

S1

S1

V

S8

S8

D

R
300Ω

C

L

L

35pF

ADDRESS
DRIVE (V

V

OUT

Figure 25. Test Circuit 5. Switching Time of Multiplexer, t

3V

)

IN

0V

V

S1

V

OUT

V

S8

50% 50%

90%

t

TRANSITION

TRANSITION

t

TRANSITION

90%

03273-0-027

Rev. A | Page 16 of 20

ADG658/ADG659

V

*

V

DDVSS

V

DDVSS

A2

IN

50Ω

A1
A0

ADG658*

EN

*SIMILAR CONNECTION FOR ADG659

S1

S2–S7

S8

D

GND

R

L

300Ω

V

S

C

L

35pF

ADDRESS
DRIVE (V

V

OUT

Figure 26. Test Circuit 6. Break-Before-Make Delay, t

3V

)

IN

0V

BBM

80%

03273-0-028

V

OUT

80%

t

BBM

V

V

V

A2
A1
A0

V

IN

EN

50Ω

*SIMILAR CONNECTION FOR ADG659

DD

DDVSS

S2–S8

ADG658*

GND

SS

ENABLE

V

S1

S

D

R
300Ω

C

L

L

35pF

DRIVE (V

V

OUT

Figure 27. Test Circuit 7. Enable Delay, t

OUTPUT

3V

)

IN

0V

V

O

0V

(EN), t

ON

50% 50%

0.9V

O

t

(EN)

ON

(EN)

OFF

0.9V

t

(EN)

OFF

O

03273-0-029

V

DDVSS

V

A2

DDVSS

A1

ADG658*

R

S

V

S

V

IN

SIMILAR CONNECTION FOR ADG659

A0
SD

EN

GND

C
1nF

LOGIC INPUT

V

OUT

L

3V

(V

)

IN

0V

V

OUT

Q

INJ

= CL×∆V

OUT

∆V

OUT

03273-0-030

Figure 28. Test Circuit 8. Charge Injection

Rev. A | Page 17 of 20

ADG658/ADG659

V

V

DD

SS

0.1µ F

V

DDVSS

A2
A1

S

A0

D

LOGIC 1

EN

GND

Figure 29. Test Circuit 9. Off Isolation

0.1µ F

50Ω

OFF ISOLATION = 20 LOG

NETWORK

ANALYZER

V

V

DDVSS

0.1µF0.1µF

NETWORK

ANALYZER

50Ω

V

OUT

R

L

50Ω

V

S

V

OUT

V

03273-0-031

S

V

DDVSS

A2
A1

S

A0

D

EN

GND

INSERTION LOSS = 20 LOG

50Ω

V

OUT

R

L

50Ω

V

WITH SWITCH

OUT

V

WITHOUT SWITCH

OUT

V

S

03273-0-032

Figure 30. Test Circuit 10. Bandwidth

VDDV

SS

0.1µ F

VDDV

A1
A0

50Ω

50Ω

S

ADG659

S1A
S1B

DB
DA

GND

SS

0.1µ F

EN

DA

DB

NETWORK

ANALYZER

V

OUT

R

L

50Ω

V

CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG

OUT

V

S

03273-0-033

Figure 31. Test Circuit 11. Channel-to-Channel Crosstalk

Rev. A | Page 18 of 20

ADG658/ADG659

R

R

OUTLINE DIMENSIONS

5.10

5.00

4.90

0.15

0.05

4.50

4.40

4.30

PIN 1

16

0.65

BSC

COPLANARITY

COMPLIANT TO JEDEC STANDARDS MO-153AB

0.10

0.30

0.19

9

81

1.20
MAX

SEATING
PLANE

6.40
BSC

0.20

0.09
8°

0°

0.75

0.60

0.45

Figure 32. 16-Lead Thin Shrink Small Outline Package [TSSOP]

( RU-16)

Dimensions shown in millimeters

PIN 1

INDICATO

1.00

0.85

0.80

4.0

12° MAX

SEATING
PLANE

BSC SQ

TOP

VIEW

0.80 MAX

0.65 TYP

COMPLIANT TO JEDEC STANDARDS MO-220-VGGC

0.35

0.28

0.25

3.75

BSC SQ

0.20 REF

0.60 MAX

0.65 BSC

0.05 MAX

0.02 NOM

0.75

0.60

0.50

COPLANARITY

0.08

Figure 33. 16-Lead Lead Frame Chip Scale Package [LFCSP]

(CP-16-4)

Dimensions shown in millimeters

0.60 MAX

13

12

EXPOSED

(BOTTOM VIEW)

9

8

PAD

16

1

4

5

1.95 BSC

PIN 1
INDICATO

2.25

2.10 SQ

1.95

0.25 MIN

Rev. A | Page 19 of 20

ADG658/ADG659

0.065

0.049

0.010

0.004

COPLANARITY

0.004

0.193
BSC

0.012

0.008

9

8

0.154
BSC

0.069

0.053

SEATING
PLANE

0.236
BSC

0.010

0.006

16

1

PIN 1

0.025
BSC

COMPLIANT TO JEDEC STANDARDS MO-137AB

8°
0°

0.050

0.016

Figure 34. 16-Lead Shrink Small Outline Package [QSOP]

(RQ-16)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADG658YRU −40°C to +125°C Thin Shrink Small Outline Package (TSSOP) RU-16
ADG658YRU-REEL7 −40°C to +125°C Thin Shrink Small Outline Package (TSSOP) RU-16
ADG658YCP −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16
ADG658YCP-REEL7 −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16
ADG658YRQ −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16
ADG658YRQ-REEL −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16
ADG658YRQ-REEL7 −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16
ADG659YRU −40°C to +125°C Thin Shrink Small Outline Package (TSSOP) RU-16
ADG659YRU-REEL7 −40°C to +125°C Thin Shrink Small Outline Package (TSSOP) RU-16
ADG659YCP −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16
ADG659YCP-REEL7 −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16
ADG659YCPZ
ADG659YCPZ-REEL7
ADG659YRQ −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16
ADG659YRQ-REEL −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16
ADG659YRQ-REEL7 −40°C to +125°C Shrink Small Outline Package (QSOP) RQ-16

1

Z = Pb-free part.

1

1

−40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16

−40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-16

© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.

C03273-0-7/04(A)

Rev. A | Page 20 of 20