Datasheet ADG623BRM, ADG621BRM Datasheet (Analog Devices)

CMOS 5 V/5 V
ADG621
IN1
D2
S2
S1
D1
IN2
ADG622
IN1
D2
S2
S1
D1
IN2
ADG623
IN1
D2
S2
S1
D1
IN2
SWITCHES SHOWN FOR A LOGIC "0" INPUT
a

FEATURES

5.5 (Max) On Resistance
0.9 (Max) On-Resistance Flatness
2.7 V to 5.5 V Single Supply 2.7 V to 5.5 V Dual Supply Rail-to-Rail Operation 10-Lead SOIC Package Typical Power Consumption (<0.01 W) TTL/CMOS Compatible Inputs
APPLICATIONS Automatic Test Equipment Power Routing Communication Systems Data Acquisition Systems Sample and Hold Systems Avionics Relay Replacement Battery-Powered Systems
4 Dual SPST Switches
ADG621/ADG622/ADG623

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION
The ADG621, ADG622, and the ADG623 are monolithic, CMOS SPST (single-pole, single-throw) switches. Each switch of the ADG621, ADG622, and ADG623 conducts equally well in both directions when on.
The ADG621/ADG622/ADG623 contain two independent switches. The ADG621 and ADG622 differ only in that both
PRODUCT HIGHLIGHTS
1. Low On Resistance (RON) (4 typ)
2. Dual ±2.7 V to ±5.5 V or Single 2.7 V to 5.5 V
3. Low Power Dissipation. CMOS construction ensures low power dissipation.
4. Tiny 10-Lead µSOIC Package
switches are normally open and normally closed respectively. In the ADG623, Switch 1 is normally open and Switch 2 is normally closed. The ADG623 exhibits break-before-make switching action.
The ADG621/ADG622/ADG623 offers low on-resistance of 4 , which is matched to within 0.25 between channels. These switches also provide low power dissipation yet gives high switching speeds. The ADG621, ADG622, and ADG623 are available in a 10-lead µSOIC package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
ADG621/ADG622/ADG623–SPECIFICATIONS
1
(V
DUAL SUPPLY
= +5 V 10%, V
DD
Parameter +25C +85C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to V
On Resistance (R
)4 typ VS = ±4.5 V, IS = –10 mA,
ON
On Resistance Match Between
Channels (∆R
On-Resistance Flatness (R
) 0.25 typ VS = ±4.5 V, IS = –10 mA
ON
FLAT(ON)
) 0.9 0.9 typ VS = ±3.3 V, IS = –10 mA
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
(OFF) ± 0.01 nA typ VS = ±4.5 V, VD = ⫿4.5 V,
S
(OFF) ± 0.01 nA typ VS = ±4.5 V, VD = ⫿4.5 V,
D
, IS (ON) ± 0.01 nA typ VS = VD = ± 4.5 V, Test Circuit 3
D
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INH
INL
Input Current
or I
I
INL
INH
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
2
BBM
(ADG623 Only) 10 ns min V Charge Injection 110 pC typ V
Off Isolation –65 dB typ R
Channel-to-Channel Crosstalk –90 dB typ R
Bandwidth –3 dB 230 MHz typ R C
(OFF) 20 pF typ f = 1 MHz
S
(OFF) 20 pF typ f = 1 MHz
C
D
C
(ON) 70 pF typ f = 1 MHz
D, CS
POWER REQUIREMENTS V
I
DD
I
SS
NOTES
1
Temperature ranges are as follows: B Version, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
= –5 V 10%, GND = 0 V. All specifications –40C to +85C unless otherwise noted.)
SS
B Version
–40C to
DD
V
V
= +4.5 V, VSS = –4.5 V
DD
5.5 7 max Test Circuit 1
0.35 0.4 max
1.5 max
= +5.5 V, VSS = –5.5 V
DD
± 0.25 ± 1 nA max Test Circuit 2
± 0.25 ± 1 nA max Test Circuit 2
± 0.25 ± 1 nA max
2.4 V min
0.8 V max
0.005 µA typ VIN = V
INL
or V
INH
± 0.1 µA max
75 ns typ RL = 300 , CL = 35 pF 120 155 ns max V
= 3.3 V, Test Circuit 4
S
45 ns typ RL = 300 , CL = 35 pF 70 85 ns max V
= 3.3 V, Test Circuit 4
S
30 ns typ RL = 300 , CL = 35 pF,
= VS2 = 3.3 V, Test Circuit 5
S1
= 0 V, RS = 0 Ω, CL = 1 nF,
S
Test Circuit 7
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 8
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 10
= 50 , CL = 5 pF, Test Circuit 9
L
= +5.5 V, VSS = –5.5 V
DD
0.001 µA typ Digital Inputs = 0 V or 5.5 V
1.0 µA max
0.001 µA typ Digital Inputs = 0 V or 5.5 V
1.0 µA max
–2–
REV. 0
ADG621/ADG622/ADG623
SINGLE SUPPLY
1
(VDD = +5 V 10%, VSS = 0 V, GND = 0 V. All specifications –40C to +85C unless otherwise noted.)
B Version
–40ⴗC to
Parameter +25C +85C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On Resistance (R
)7 typ VS = 0 V to 4.5 V, IS = –10 mA,
ON
DD
V
V
= 4.5 V, VSS = 0 V
DD
10 12.5 max Test Circuit 1
On Resistance Match Between
Channels (∆R
) 0.5 typ VS = 0 V to 4.5 V, IS = –10 mA
ON
0.75 1 max
On-Resistance Flatness (R
FLAT(ON)
) 0.5 0.5 typ VS = 1.5 V to 3.3 V, IS = –10 mA
1 max
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V,
S
= 5.5 V
DD
± 0.25 ± 1 nA max Test Circuit 2
Drain OFF Leakage I
(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V,
D
± 0.25 ± 1 nA max Test Circuit 2
Channel ON Leakage I
, IS (ON) ± 0.01 nA typ VS = VD = 1 V/4.5 V,
D
± 0.25 ± 1 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INL
INH
2.4 V min
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
± 0.1 µA max
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
(ADG623 Only) 10 ns min V
Charge Injection 6 pC typ V
2
BBM
120 ns typ RL = 300 , CL = 35 pF 210 260 ns max V
= 3.3 V, Test Circuit 4
S
50 ns typ RL = 300 , CL = 35 pF 75 100 ns max V
= 3.3 V, Test Circuit 4
S
70 ns typ RL = 300 , CL = 35 pF,
= VS2 = 3.3 V, Test Circuit 5
S1
= 0 V; RS = 0 , CL = 1 nF,
S
Test Circuit 6
Off Isolation –65 dB typ R
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 7
Channel-to-Channel Crosstalk –90 dB typ R
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 9
Bandwidth –3 dB 230 MHz typ R
(OFF) 20 pF typ f = 1 MHz
C
S
C
(OFF) 20 pF typ f = 1 MHz
D
= 50 , CL = 5 pF, Test Circuit 8
L
CD, CS (ON) 70 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
0.001 µA typ Digital Inputs = 0 V or 5.5 V
= 5.5 V
DD
1.0 µA max
NOTES
1
Temperature ranges are as follows: B Version, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–3–
ADG621/ADG622/ADG623
WARNING!
ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C unless otherwise noted)
1
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V
V
SS
Analog Inputs Digital Inputs
2
. . . . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V
2
. . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 50 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
µSOIC Package
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
θ
JC
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. Truth Table for the ADG621/ADG622
ADG621 INx ADG622 INx Switch x Condition
0 1 OFF 10 ON
Table II. Truth Table for the ADG623
IN1 IN2 Switch S1 Switch S2
00 OFF ON 0 1 OFF OFF 10 ON ON 1 1 ON OFF

ORDERING GUIDE

Model Option Temperature Range Description Package Branding Information*
ADG621BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SXB ADG622BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SYB ADG623BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SZB
*Branding on µSOIC packages is limited to three characters due to space constraints.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG621/ADG622/ADG623 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. 0
ADG621/ADG622/ADG623
PIN CONFIGURATION
10-Lead SOIC
(RM-10)
V
1
S1
ADG621/
2
D1
ADG622/
3
IN2
ADG623
TOP VIEW
4
GND
(Not to Scale)
V
5
SS
NC = NO CONNECT

TERMINOLOGY

V
DD
V
SS
Most Positive Power Supply Potential.
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied
to ground at the device. GND Ground (0 V) Reference I
DD
I
SS
Positive Supply Current
Negative Supply Current S Source Terminal. May be an input or output. D Drain Terminal. May be an input or output. IN Logic Control Input R
ON
R
ON
R
FLAT(ON)
Ohmic resistance between D and S.
On resistance match between any two Channels i.e., R
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
over the specified analog signal range. I
(OFF) Source Leakage Current with the switch OFF.
S
I
(OFF) Drain Leakage Current with the switch “OFF.”
D
I
, IS (ON) Channel Leakage Current with the switch “ON.”
D
V
) Analog Voltage on Terminals D, S.
D (VS
V
INL
V
INH
I
INL(IINH
C C C t
ON
t
OFF
t
BBM
) Input Current of the Digital Input
(OFF) OFF Switch Source Capacitance
S
(OFF) OFF Switch Drain Capacitance
D
, CS (ON) “ON” Switch Capacitance
D
Maximum Input Voltage for Logic 0.
Minimum Input Voltage for Logic 1.
Delay between applying the digital control input and the output switching on.
Delay between applying the digital control input and the output switching off.
OFF time or ON time measured between the 90% points of both switches, when switching from one
address state to another. Charge Injection A measure of the Glitch Impulse transfered from the Digital input to the Analog output during switching. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance. Off Isolation A measure of unwanted signal coupling through an OFF switch. Bandwidth The frequency response of the “ON” switch. Insertion Loss The loss due to the ON resistance of the Switch.
10
9
8
7
6
DD
IN1
D2
S2
NC
ON
max – R
ON
min.
REV. 0
–5–
ADG621/ADG622/ADG623
–Typical Performance Characteristics
8
TA = 25C
7
6
5
, VSS = 3.3V
V
4
V
, VSS = 4.5V
DD
3
ON RESISTANCE –
2
1
0
5–4–3–2–10123 54
DD
VDD, VSS = 2.5V
V
, VSS = 3V
DD
, VS – V
V
D
V
, VSS = 5V
DD
TPC 1. On Resistance vs. VD (VS). (Dual Supply)
20
VDD = 2.7V
16
12
VDD = 3.3V
8
ON RESISTANCE –
4
0
0
VDD = 5V
12345
VDD = 3V
VD, VS – V
TA = 25C
V
SS
VDD = 4.5V
= 0V
10
9
8
7
6
5
4
ON RESISTANCE –
3
2
1
0
0
123 54
TA = +85C
TA = +25C
TA = –40C
VD, VS – V
VDD = 5V
= 0V
V
SS
TPC 4. On Resistance vs. VD (VS) for Different Temperature. (Single Supply)
0.5
0.4
0.3
0.2
0.1
0
, IS (ON)
= 0V
I
D
TEMPERATURE – C
0.1
0.2
LEAKAGE CURRENT – nA
VDD = 5V
–0.3
V
SS
–0.4
= 4.5V
V
D
= 4.5V
V
S
–0.5
0 1020304050
IS (OFF)
ID (OFF)
60
70 80
TPC 2. On Resistance vs. VD (VS). (Single Supply)
6
5
4
3
2
ON RESISTANCE –
1
0
5
3 11 534 2024
TA = +85C
TA = +25C
TA = –40C
VD, VS – V
VDD = +5V
= –5V
V
SS
TPC 3. On Resistance vs. VD (VS) for Different Temperatures. (Dual Supply)
TPC 5. Leakage Currents vs. Temperature. (Dual Supply)
0.5
0.4
0.3
0.2
0.1
0
ID, IS (ON)
VDD = 5V
= 0V
V
SS
= 4.5V/1V
V
D
= 1V/4.5V
V
S
0 1020304050607080
TEMPERATURE – C
LEAKAGE CURRENT – nA
0.1
0.2
0.3
0.4
0.5
IS (OFF)
ID (OFF)
TPC 6. Leakage Currents vs. Temperature. (Single Supply)
–6–
REV. 0
CHARGE INJECTION – pC
0.2 100101 FREQUENCY – MHz
ATTENUATION – dB
0
10
20
30
40
50
60
70
80
VDD = +5V V
SS
= –5V
T
A
= 25C
0.2 1000
0
10
VDD = +5V V
SS
= –5V
TA = 25C
2
4
6
8
10
12
1 100
FREQUENCY – MHz
ATTENUATION – dB
250
200
150
100
50
TA = 25C
V V
DD
SS
= +5V
= –5V
VDD = 5V
= 0V
V
SS
ADG621/ADG622/ADG623
0
5
4 3 2 10123 5
TPC 7. Charge Injection vs. Source Voltage
180
160
140
120
100
80
TIME – ns
60
40
20
0
–40 –20
ALTERNATION – dB
0
10
20
30
40
50
60
70
80
0.2
TPC 8. t
ON
TPC 9. OFF Isolation vs. Frequency
VDD 5V
0V
V
SS
t
ON
t
OFF
VDD 5V
0V
V
SS
020
TEMPERATURE – C
/ t
Times vs. Temperature
OFF
1 10 100
FREQUENCY – MHz
REV. 0
V
S
4
TPC 10. Crosstalk vs. Frequency
VDD +5V
–5V
V
SS
VDD +5V
–5V
V
SS
40
60
80
TPC 11. On Response vs. Frequency
VDD = +5V
= –5V
V
SS
= 25C
T
A
–7–
ADG621/ADG622/ADG623
Test Circuits
I
DS
V1
SD
IS (OFF) ID (OFF)
SD
A
A
NC
SD
ID (ON)
A
V
S
RON = V1/I
DS

Test Ciruit 1. On Resistance

0.1F
V
S
0.1F
S1
V
S1
S2
V
S2
IN1, IN2
V
IN
IN
V
V
DD
V
V
DD
GND
V
S
V
V
SS
DD
V
DD
SD
GND
0.1F
V
SS

Test Ciruit 4. Switching Times

SS
0.1F
SS
D1
D2
R 300
V
C
L2
L2
35pF

Test Ciruit 2. Off Leakage

V
IN
V
OUT2
R
L
300
R
L1
300
C
L
35pF
OUT
C
L1
35pF
V
OUT1
V
IN
V
OUT
V
V
V
D
OUT1
OUT2
ADG621
ADG622
V
IN
0V
0V
0V
50% 50%
50% 50%
90% 90%
t
ON
50% 50%
90%
90%
t
BBM
V
NC = NO CONNECT
D

Test Ciruit 3. On Leakage

t
OFF
90%
90%
t
BBM
Test Ciruit 5. Break-Before-Make Time Delay,
V
V
DD
SS
V
V
DD
SS
R
S
V
S
SD
IN
GND
C
1nF
V
OUT
L
SW ON
V
IN
V
OUT

Test Ciruit 6. Charge Injection

–8–
t
(ADG623 Only)
BBM
SW OFF
Q
= CL V
INJ
OUT
V
OUT
REV. 0
ADG621/ADG622/ADG623
0.1F
IN
V
IN
OFF ISOLATION = 20 LOG
NETWORK
ANALYZER
V
OUT
R
L
50
50
V
S
V
V
SS
DD
0.1F
V
V
SS
DD
S
50
D
GND
V
OUT
V
S

Test Ciruit 7. Off Isolation

V
DD
0.1F
V
DD
D1
S2
IN
GND
V
SS
V
SS
NETWORK
ANALYZER
50
V
V
OUT
R
L
50
0.1F
S1
D2
V
V
DD
SS
S
GND
0.1F
V
SS
D
V
OUT
V
WITHOUT SWITCH
OUT
NETWORK
ANALYZER
50
R
L
50
WITH SWITCH
V
S
V
OUT
0.1F
V
DD
S
IN
V
IN
INSERTION LOSS = 20 LOG

Test Ciruit 9. Bandwidth

R 50
R
50
V
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
OUT
V
S

Test Ciruit 8. Channel-to-Channel Crosstalk

REV. 0
–9–
ADG621/ADG622/ADG623
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
10-Lead SOIC Package
(RM-10)
0.122 (3.10)
0.114 (2.90)
0.122 (3.10)
0.114 (2.90)
0.037 (0.94)
0.031 (0.78)
0.006 (0.15)
0.002 (0.05)
10 6
1
PIN 1
0.0197 (0.50) BSC
0.120 (3.05)
0.112 (2.85)
0.199 (5.05)
0.187 (4.75)
5
0.012 (0.30)
0.006 (0.15)
0.043 (1.10) MAX
SEATING PLANE
0.009 (0.23)
0.005 (0.13)
0.120 (3.05)
0.112 (2.85)
6 0
0.028 (0.70)
0.016 (0.40)
–10–
REV. 0
–11–
C02616–.8–10/01(0)
–12–
PRINTED IN U.S.A.
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