FEATURES
1 pC Charge Injection (Over the Full Signal Range)
2.7 V to 5.5 V Dual Supply
2.7 V to 5.5 V Single Supply
Automotive Temperature Range: –40C to +125C
100 pA Max @ 25C Leakage Currents
85 Typ On Resistance
Rail-to-Rail Operation
Fast Switching Times
Typical Power Consumption (<0.1 W)
TTL/CMOS Compatible Inputs
14-Lead TSSOP Package
APPLICATIONS
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Instruments
Communication Systems
Sample and Hold Systems
Remote-Powered Equipment
Audio and Video Signal Routing
Relay Replacement
Avionics
CMOS 5 V/5 V/3 V 4-Channel Multiplexer
ADG604
FUNCTIONAL BLOCK DIAGRAM
ADG604
4
S1
5
S2
11
S3
10
S4
1 OF 4
DECODER
1412
6
D
ENA1A0
GENERAL DESCRIPTION
The ADG604 is a CMOS analog multiplexer, comprising four
single channels. It operates from a dual supply of ±2.7 V to
± 5.5 V, or from a single supply of 2.7 V to 5.5 V.
The ADG604 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. A Logic “0” on the EN pin disables the device.
The ADG604 offers ultralow charge injection of ±1.5 pC over the
entire signal range and leakage currents of 10 pA typical at 25°C.
It offers on resistance of 85 Ω typ, which is matched to within 2 Ω
between channels. The ADG604 also has low power dissipation yet
gives high switching speeds. The ADG604 is available in a 14-lead
TSSOP package.
PRODUCT HIGHLIGHTS
1. Ultralow Charge Injection (Q
: ± 1.5 pC Typ over the Full
INJ
Signal Range)
2. Leakage Current <0.5 nA max @ 85°C
3. Dual ± 2.7 V to ± 5.5 V or Single 2.7 V to 5.5 V Supply
4. Fully Specified to 125°C
5. Small 14-Lead TSSOP Package
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at EN, A0, A1, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
Table I. Truth Table
A1A0ENON Switch
XX0None
0011
0112
1013
1114
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG604 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. 0
–5–
Page 6
ADG604
TERMINOLOGY
V
DD
V
SS
Most Positive Power Supply Potential
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to
ground at the device.
GNDGround (0 V) Reference
I
DD
I
SS
Positive Supply Current
Negative Supply Current
SSource Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
R
ON
⌬R
ON
R
FLAT(ON)
Ohmic Resistance between D and S
On Resistance Match between any two channels, i.e., R
Max – R
ON
ON
Min
Flatness is defined as the difference between the maximum and minimum value of On resistance as measured
over the specified analog signal range.
IS (OFF)Source Leakage Current with the Switch “OFF”
(OFF)Drain Leakage Current with the Switch “OFF”
I
D
I
, IS (ON)Channel Leakage Current with the Switch “ON”
D
, V
V
D
S
V
INL
V
INH
I
(I
INL
C
S
C
D
C
D
C
IN
t
ON
t
OFF
t
TRANSITION
)Input Current of the Digital Input
INH
(OFF)Channel Input Capacitance for “OFF” Condition
(OFF)Channel Output Capacitance for “OFF” Condition
, CS (ON)“On” Switch Capacitance
(EN)Delay time between the 50% and 90% points of the digital input and switch “ON” condition.
(EN)Delay time between the 50% and 90% points of the digital input and switch “OFF” condition.
Analog Voltage on Terminals D, S
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Digital Input Capacitance
Delay time between the 50% and 90% points of the digital input and switch “ON” condition when switching
from one address state to another.
t
BBM
“OFF” time or “ON” time measured between the 80% points of both switches, when switching from one address
state to another.
Charge InjectionA measure of the glitch impulse transferred from the digital input to the analog output during switching.
CrosstalkA measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance.
Off IsolationA measure of unwanted signal coupling through an “On” switch.
BandwidthFrequency Response of the “On” Switch
Insertion LossLoss Due to the On Resistance of the Switch
–6–
REV. 0
Page 7
–6
–5
–4
–3
–2
–1
1
3
TEMPERATURE – C
0
CURRENT – nA
VDD = +5V
V
SS
= –5V
20406080100120
0
2
IS (OFF)ID (OFF)
I
D
, IS (ON)
–6
–5
–4
–3
–2
–1
1
3
TEMPERATURE – C
0
CURRENT – nA
VDD = 5V
V
SS
= 0V
20406080100120
0
2
IS (OFF)
I
D
(OFF)
I
D
, IS (ON)
Typical Performance Characteristics–
ADG604
250
V
, VSS = 2.5V
200
150
100
ON RESISTANCE –
50
0
–5
–4–3–2–1012345
DD
V
DD
V
, VSS = 3.3V
DD
, VSS = 3V
V
, VS – V
V
D
, VSS = 5V
DD
, VSS = 4.5V
V
DD
TA = 25C
TPC 1. On Resistance vs. VD (VS), Dual Supply
500
450
400
350
300
250
200
150
ON RESISTANCE –
100
50
0
0.0
V
= 2.7V
DD
V
= 3V
DD
= 3.3V
V
DD
V
= 4.5V
DD
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
, VS – V
D
TA = 25C
= 0V
V
SS
= 5V
V
DD
TPC 2. On Resistance vs. VD (VS), Single Supply
350
V
= 5V
DD
= 0V
V
SS
300
250
200
150
ON RESISTANCE –
100
50
0
0.0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
TA = –40C
V
D
T
= +85C
A
, VS – V
TA = +125C
= +25C
T
A
TPC 4. On Resistance vs. VD (VS) for Different
Temperatures, Single Supply
TPC 5. Leakage Currents vs. Temperature, Dual Supply
180
VDD = +5V
= –5V
V
SS
160
140
120
100
80
60
ON RESISTANCE –
40
20
0
–5
–4–3–2–1012345
TPC 3. On Resistance vs. VD (VS) for Different
Temperatures, Dual Supply
REV. 0
V
T
A
, VS – V
D
T
= +85C
A
= +25C
TA = +125C
TA = –40C
TPC 6. Leakage Currents vs. Temperature, Single Supply
–7–
Page 8
ADG604
1.0
0.5
0
–0.5
–1.0
CHARGE INJECTION – pC
–1.5
–2.0
–4–3–2–1012345
–5
VDD = 3V
= 0V
V
SS
V
= +5V
DD
= –5V
V
SS
– V
V
S
TPC 7. Charge Injection vs. Source Voltage
160
TIME – ns
140
120
100
t
ON
80
60
t
OFF
40
20
0
–20020406080100120
–40
VDD = 5V
= 0V
V
SS
VDD = 5V
= 0V
V
SS
TEMPERATURE – C
VDD = +5V
V
SS
TA = 25C
VDD = +5V
= 0V
V
SS
VDD = +5V
= –5V
V
SS
= –5V
0
TA = 25C
–10
–20
ATTENUATION – dB
–30
–40
–50
–60
–70
–80
–90
0.3
1101001000
VDD = +5V
V
SS
FREQUENCY – MHz
TPC 10. Crosstalk vs. Frequency
0
ATTENUATION – dB
–10
–12
–14
–16
–18
–2
–4
–6
–8
TA = 25C
0.3
1101001000
VDD = +5V
V
FREQUENCY – MHz
= 0V
= –5V
SS
VDD = +5V
= 0V
V
SS
VDD = +5V
= –5V
V
SS
ATTENUATION – dB
TPC 8. tON/t
0
TA = 25C
–10
–20
–30
–40
–50
–60
–70
–80
–90
0.3
1101001000
Times vs. Temperature
OFF
VDD = +5V
= 0V
V
SS
FREQUENCY – MHz
TPC 9. Off Isolation vs. Frequency
VDD = +5V
= –5V
V
SS
TPC 11. On Response vs. Frequency
–8–
REV. 0
Page 9
Test Circuits
ADG604
I
DS
V1
V
S
SD
RON = V1/I
DS
Test Circuit 1. On Resistance
V
S
+2.4V
V
S
50
IS (OFF)ID (OFF)
V
S
SD
A
A
V
D
Test Circuit 2. Off Leakage
V
V
DD
0.1F
A1
A0
EN
SS
0.1F
3V
)
IN
0V
V
OUT
V
OUT
t
TRANSITION
V
V
S2
C
35pF
ADDRESS
DRIVE (V
S1
L
V
V
SS
DD
S1
S2
S3
S4
D
R
L
GND
300
Test Circuit 4. Switching Time of Multiplexer, t
V
V
DD
0.1F
A1
A0
SS
0.1F
V
V
SS
DD
S1
S2
S3
S4
V
S
ADDRESS
DRIVE (V
3V
)
IN
0V
NC
Test Circuit 3. On Leakage
50%50%
90%
t
TRANSITION
TRANSITION
SD
90%
ID (ON)
A
V
D
+2.4V
EN
GND
D
R
L
300
C
L
35pF
V
OUT
V
OUT
Test Circuit 5. Break-Before-Make Delay, t
V
V
DD
0.1F
A1
A0
EN
V
50
S
SS
0.1F
3V
)
IN
0V
V
0
0V
V
C
35pF
S
L
ENABLE
DRIVE (V
OUTPUT
V
OUT
V
V
SS
DD
S1
S2
S3
S4
D
R
L
GND
300
Test Circuit 6. Enable Delay, tON (EN), t
80%80%
t
BBM
50%50%
0.9V
t
(EN)
ON
(EN)
OFF
BBM
0.9V
0
t
OFF
0
(EN)
REV. 0
–9–
Page 10
ADG604
0.1F0.1F
V
V
DD
SS
V
V
DD
SS
R
S
V
S
SD
DECODER
C
1nF
V
OUT
L
GND
A2
A1
EN
V
OUT
V
IN
SW OFF
SW OFF
V
IN
CHARGE INJECTION = V
Q
INJ
OUT
= CL V
SW ON
SW ON
SW ON
C
L
OUT
V
OUT
SW OFF
SW OFF
Test Circuit 7. Charge Injection
V
V
DD
SS
V
V
DD
SS
0.1F0.1F
V
V
DD
SS
S
50
D
GND
OFF ISOLATION = 20 LOG
Test Circuit 8. Off Isolation
V
V
DD
SS
0.1F0.1F
V
V
DD
SS
S
D
GND
INSERTION LOSS = 20 LOG
Test Circuit 9. Bandwidth
V
OUT
V
S
WITH SWITCH
V
OUT
WITHOUT SWITCH
V
OUT
NETWORK
ANALYZER
50
V
V
OUT
R
L
50
NETWORK
ANALYZER
50
V
V
OUT
R
L
50
NETWORK
ANALYZER
V
OUT
S
R
L
50
50
V
S
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
V
V
DD
SS
S1
D
S2
R
50
GND
V
OUT
V
S
Test Circuit 10. Channel-to-Channel Crosstalk
S
–10–
REV. 0
Page 11
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead TSSOP Package
(RU-14)
0.201 (5.10)
0.193 (4.90)
ADG604
PIN 1
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
14
0.0256
(0.65)
BSC
8
0.177 (4.50)
0.169 (4.30)
71
0.0433 (1.10)
MAX
0.0118 (0.30)
0.0075 (0.19)
0.256 (6.50)
0.246 (6.25)
0.0079 (0.20)
0.0035 (0.090)
8
0
0.028 (0.70)
0.020 (0.50)
REV. 0
–11–
Page 12
C02752–0–2/02(0)
–12–
PRINTED IN U.S.A.
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