Datasheet ADG601, ADG602 Datasheet (ANALOG DEVICES)

2 Ω, CMOS, ±5 V/+5 V

www.BDTIC.com/ADI

FEATURES

Low on resistance, 2.5 Ω maximum
<0.65 Ω on-resistance flatness
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Rail-to-rail input signal range
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Low power consumption
TTL-/CMOS-compatible inputs

APPLICATIONS

Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avio nics
Relay replacement
Battery-powered systems

GENERAL DESCRIPTION

The ADG601/ADG602 are monolithic, CMOS single-pole
single-throw (SPST) switches with on resistance typically less
than 2.5 Ω. The low on-resistance flatness makes the
ADG601/ADG602 ideally suited to many applications,
particularly those requiring low distortion. These switches are
ideal replacements for mechanical relays because they are more
reliable, have lower power requirements, and are available in
much smaller package sizes.

The ADG601 is a normally open (NO) switch, and the ADG602
is a n

ormally closed (NC) switch. Each switch conducts equally

SPST Switches

ADG601/ADG602

FUNCTIONAL BLOCK DIAGRAMS

DS

IN

ADG601

NOTES

1. SWIT CHES SHOWN FOR A LOG IC 0 INPUT .

Figure 1.

Table 1. Truth Table

ADG601 IN ADG602 IN Switch Condition

0 1 Off
1 0 On

well in both directions when the device is on, with the input
signal range extending to the supply rails.

The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP;
a

nd 820 μm × 2255 μm die.

ADG602

PRODUCT HIGHLIGHTS

1. Low on resistance (2 Ω typical)

2. Dual ±2.7 V t

iny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die

3. T

4. R

ail-to-rail input signal range

o ±5.5 V or single +2.7 V to +5.5 V supplies

DS

IN

02619-001

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2001–2007 Analog Devices, Inc. All rights reserved.

ADG601/ADG602

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TABLE OF CONTENTS

Features.............................................................................................. 1

Absolute Maximum Ratings ............................................................5

Applications....................................................................................... 1

Functional Block Diagrams............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Dual Supply................................................................................... 3

Single Supply................................................................................. 4

REVISION HISTORY

3/07—Rev. B to Rev. C

Added Die Package.............................................................Universal

Changes to Specifications.................................................................3

Added Figure 4 and Table 6..............................................................6

Changes to Ordering Guide.......................................................... 11

3/06—Rev. A to Rev. B

pdated Format.................................................................. Universal

U

Changes to 6-Lead SOT-23 (RJ-6) Pin Configuration .................6

Added Pin Function Descriptions Table ........................................6

Changes to Figure 19.........................................................................9

ESD Caution...................................................................................5

Pin Configurations and Function Descriptions............................6

Typical Performance Characteristics..............................................7

Terminology.......................................................................................9

Test Circuits..................................................................................... 10

Outline Dimensions....................................................................... 11

Ordering Guide .......................................................................... 11

Updated Outline Dimensions........................................................11

Changes to Ordering Guide...........................................................11

6/03—Rev. 0 to Rev. A
C

hanges to Specifications.................................................................2

Changes to Ordering Guide.............................................................4

Updated Outline Dimensions..........................................................8

Rev. C | Page 2 of 12

ADG601/ADG602

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SPECIFICATIONS

DUAL SUPPLY

VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted.

Table 2.

B Version
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = –4.5 V
On Resistance (RON) 2 Ω typ VS = ±4.5 V, IDS = −10 mA; see Figure 15

2.5 5.5 Ω max
On-Resistance Flatness (R

0.6 0.65 Ω max

LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V

Source Off Leakage, IS (Off) ±0.01 nA typ VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
±0.25 ±1 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
±0.25 ±1 nA max

Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = +4.5 V or −4.5 V; see Figure 17
±0.25 ±1 nA max
DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, I

±0.1 μA max

Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2

tON 80 ns typ RL = 300 Ω, CL = 35 pF

120 155 ns max VS = 3.3 V; see Figure 18

t

45 ns typ RL = 300 Ω, CL = 35 pF

OFF

75 90 ns max VS = 3.3 V; see Figure 18

Charge Injection 250 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19

Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20

Bandwidth −3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21

CS (Off) 50 pF typ f = 1 MHz

CD (Off) 50 pF typ f = 1 MHz

CD, CS (On) 145 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V

IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V

1.0 μA max

ISS 0.001 μA typ Digital inputs = 0 V or 5.5 V

1.0 μA max

1

Temperature range for B version is −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

INH

0.8 V max

INL

or I

INL

0.005 μA typ VIN = V

INH

) 0.35 0.4 Ω typ VS = ±3.3 V, IDS = −10 mA

FLAT (ON)

2.4 V min

1

or V

INL

INH

Rev. C | Page 3 of 12

ADG601/ADG602

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SINGLE SUPPLY

VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 3.

B Version

1

Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V VDD = 4.5 V
On Resistance (RON) 3.5 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15
5 8 Ω max
On-Resistance Flatness (R

) 0.2 0.2 Ω typ VS = 1.5 V to 3.3 V, IDS = –10 mA

FLAT (ON)

0.6 Ω max

LEAKAGE CURRENTS VDD = 5.5 V

Source Off Leakage, IS (Off) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
±0.25 ±1 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
±0.25 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 4.5 V or 1 V; see Figure 17
±0.25 ±1 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I

INL

2.4 V min

INH

0.8 V max

INL

or I

0.005 μA typ VIN = V

INH

INL

or V

INH

±0.1 μA max
Digital Input Capacitance, CIN 2 pF typ

DYNAMIC CHARACTERISTICS2

tON 110 ns typ RL = 300 Ω, CL = 35 pF
220 280 ns max VS = 3.3 V; see Figure 18
t

50 ns typ RL = 300 Ω, CL = 35 pF

OFF

80 110 ns max VS = 3.3 V; see Figure 18
Charge Injection 20 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
Bandwidth –3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21
CS (Off) 50 pF typ f = 1 MHz
CD (Off) 50 pF typ f = 1 MHz
CD, CS (On) 145 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 5.5 V

IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V

1.0 μA max

1

Temperature range for B version is −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Rev. C | Page 4 of 12

ADG601/ADG602

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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameter Rating

VDD to VSS 13 V
VDD to GND −0.3 V to +6.5 V
VSS to GND +0.3 V to –6.5 V
Analog Inputs
Digital Inputs

Continuous Current, S or D 100 mA
Peak Current, S or D

(Pulsed at 1 ms, 10% Duty Cycle Max) 200 mA
Operating Temperature Range

Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
Thermal Resistance

MSOP

θJA 206°C/W
θJC 44°C/W

SOT-23

θJA 229.6°C/W

θJC 91.99°C/W
Lead Temperature, Soldering (10 sec) 300°C
IR Reflow, Peak Temperature 220°C

1

Overvoltages at IN, S, or D are clamped by internal diodes. Current should be

limited to the maximum ratings given.

1

1

VSS − 0.3 V to VDD + 0.3 V

−0.3 V to VDD + 0.3 V or
30 mA (whichever
occurs first)

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Only one absolute maximum rating may be applied at a time.

ESD CAUTION

Rev. C | Page 5 of 12

ADG601/ADG602

V

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

V

V

DD

S

SS

PIN 1

1

INDICATOR

ADG601/

ADG602

2

TOP VIEW

(Not to Scale)

3

1

2

3
4

IN

6

D

5

GND

4

2619-002

NC

NC

DD

PIN 1

D

1

INDICAT OR

2

ADG601/

ADG602

3

TOP VIEW

4

(Not to Scale)

NC = NO CONNECT

S

8

GND

7

6

IN

5

V

SS

2619-003

5

6
7

8

TOP VIEW

(Not to Scale)

14
13

12

11
10

9

02619-021

Figure 2. 6-Lead SOT-23 (RJ-6) Figure 3. 8-Lead MSOP (RM-8) Figure 4. Die (820 μm × 2255 μm)

Table 5. Pin Function Descriptions

Pin No.

6-Lead SOT-23 8-Lead MSOP Mnemonic Description

1 4 V

Most Positive Power Supply Potential.

DD

2 8 S Source Terminal. Can be an input or output.
3 5 V
4 7 GND
5 1 D
6 6 IN

Most Negative Power Supply Potential.

SS

Ground (0 V) Reference.
Drain Terminal. Can be an input or output.
Logic Control Input.

N/A 2, 3 NC No Connect.

Table 6. Die Pad Coordinates

1

Die Pad

Coordinates

Die Pad No.

X (μm) Y (μm)

Mnemonic Description

1 −265 +754 NC No Connect.
2 −265 +525 D Drain Terminal. Can be an input or output.2
3 −265 +241 D
4 −265 +141 D
5 −265 −191 NC
6 −265 −409 NC
7 −265 −549 NC
8 −265 −787 V
9 +265 −767 V

Most Positive Power Supply Potential.

DD

Most Negative Power Supply Potential.

SS

10 +265 −429 IN
11 +265 −289 GND
12 +265 +189 S
13 +265 +521 S Source Terminal. Can be an input or output.

Drain Terminal. Can be an input or output.2
Drain Terminal. Can be an input or output.2
No Connect.
No Connect.
No Connect.

Logic Control Input.
Ground (0 V) Reference.
Source Terminal. Can be an input or output.

3

3

14 +265 +661 NC Source Terminal. Can be an input or output.

1

Measured from the center of the die.

2

Bond the D pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the drain pin of the switch.

3

Bond the S pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the source pin of the switch.

Rev. C | Page 6 of 12

ADG601/ADG602

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TYPICAL PERFORMANCE CHARACTERISTICS

5

4

3

±4.5V

2

ON RESISTANCE ( Ω)

1

0

–5 –4 –3 –2 –1 0 1 2 3 4 5

Figure 5. On Resistance vs. V

±2.5V

VD,VS(V)

±3V

±5V

, VS (Dual Supply)

D

TA=25°C

±3.3V

02619-004

5

4

3

2

ON RESISTANCE (Ω)

1

VDD=5V

=0V

V

SS

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

Figure 8. On Resistance vs. V

+85°C

–40°C

VD,VS(V)

, VS for Different Temperatures (Single Supply)

D

+25°C

02619-007

10

9

8

7

6

5

4

ON RESISTANCE ( Ω)

3

2

TA=25°C

1

V

0

0 0.51.01.52.02.53.03.54.04.55.0

VDD=3.3V

=0V

SS

Figure 6. On Resistance vs. V

5

4

3

2

ON RESISTANCE (Ω)

1

0

–5–4–3–2–1012345

Figure 7. On Resistance vs. V

VDD=2.7V

VDD=3.0V

VDD=4.5V

VDD=5.0V

V

(V)

D,VS

, VS (Single Supply)

D

VDD=+5V

=–5V

V

SS

+25°C

–40°C

V

(V)

D,VS

, VS for Different Temperatures (Dual Supply)

D

+85°C

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

LEAKAGE CURRENT (n A)

–0.3

–0.4

–0.5

0 102030405060708085

02619-005

ID, IS (ON)

ID (OFF)

TEMPERATURE (° C)

VDD = +5V
V

= –5V

SS

V

= ±4.5V

D

V

=±4.5V

S

IS (OFF)

02619-009

Figure 9. Leakage Currents vs. Temperature (Dual Supply)

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

LEAKAGE CURRENT (n A)

–0.3

–0.4

–0.5

2619-006

0 102030405060708085

ID, IS (ON)

TEMPERATURE (° C)

ID (OFF)

VDD = 5V
V

= 0V

SS

V

= 4.5V/1V

D

V

= 1V/4.5V

S

IS (OFF)

02619-008

Figure 10. Leakage Currents vs. Temperature (Single Supply)

Rev. C | Page 7 of 12

ADG601/ADG602

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500

450

400

350

300

250

200

150

CHARGE INJECTI ON (pC)

100

50

0

–5–4–3–2–1012345

VDD=+5V

= –5V

V

SS

V

(V)

S

VDD=+5V

=0V

V

SS

TA=25°C

Figure 11. Charge Injection vs. Source Voltage

2619-010

0

–10

–20

–30

–40

–50

OFF ISOLATION (dB)

–60

equency

VDD=+5V
V

SS

T

A

–70

–80

0.2 1 10 100
FREQUENCY (MHz)

Figure 13. Off Isolation vs. Fr

=–5V

= 25°C

02619-012

180

160

140

120

t

100

80

TIME (ns)

60

40

20

0

–40 –20 0 20 40 60 80

ON

t

OFF

Figure 12. t

VDD=+5V

=0V

V

SS

VDD=+5V

=0V

V

SS

TEMPERATURE (°C)

Times vs. Temperature

ON/tOFF

VDD=+5V
V

VDD=+5V
V

SS

SS

=–5V

= –5V

02619-011

0

–2

–4

–6

–8

ON RESPONSE (dB)

VDD=+5V

–10

V

= –5V

SS

T

= 25°C

A

–12

0.2 1 10 100 400

FREQUENCY (MHz)

Figure 14. On Response vs. Frequency

2619-013

Rev. C | Page 8 of 12

ADG601/ADG602

www.BDTIC.com/ADI

TERMINOLOGY

VDD

Most positive power supply potential.

V

INL

Maximum input voltage for Logic 0.

V

SS

Most negative power supply potential.

I

DD

Positive supply current.

I

SS

Negative supply current.

GND

Ground (0 V) reference.

S

Source terminal. Can be an input or an output.

D

Drain terminal. Can be an input or an output.

IN

Logic control input.

V

, VS

D

Analog voltage on Terminal D and Terminal S.

R

ON

Ohmic resistance between Terminal D and Terminal S.

R

FLAT (ON)

Flatness is defined as the difference between the maximum and

um values of on resistance as measured over the specified

minim
analog signal range.

I

(Off)

S

Source leakage current with the switch off.

I

(Off)

D

Drain leakage current with the switch off.

I

, IS (On)

D

Channel leakage current with the switch on.

V

INH

Minimum input voltage for Logic 1.

(I

INL

INH

)

I

Input current of the digital input.

C

(Off)

S

Off switch source capacitance. Measured with reference to ground.

C

(Off)

D

Off switch drain capacitance. Measured with reference to ground.

C

, CS (On)

D

On switch capacitance. Measured with reference to ground.

C

IN

Digital input capacitance.

t

ON

Delay between applying the digital control input and the output

tching on.

swi

t

OFF

Delay between applying the digital control input and the output

tching off.

swi

Charge Injection

A measure of the glitch impulse transferred from the digital
in

put to the analog output during switching.

Off Isolation

A measure of unwanted signal coupling through an off switch.

On Response

Frequency response of the on switch.

Insertion Loss

Loss due to the on resistance of the switch.

Rev. C | Page 9 of 12

ADG601/ADG602

V

V

V

V

V

VDDV

VDDV

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TEST CIRCUITS

I

DS

V1

ID(ON)

A

V

D

02619-016

SD

V

S

RON=V1/I

Figure 15. On Resistance

IS(OFF) ID(OFF)

SD

A

DS

2619-014

S

A

V

D

2619-015

NC

Figure 16. Off Leakage

SD

NC = NO CO NNECT

Figure 17. On Leakage

V

SS

DD

0.1µF

V

DD

SD

S

IN

GND

0.1µF

V

SS

V

OUT

R
300Ω

C

L

L

35pF

ADG601

V

IN

V

IN

ADG602

V

OUT

50% 50%

50% 50%

90% 90%

t

ON

t

OFF

02619-017

Figure 18. Switching Times

DD

SS

V

V

DD

SS

R

S

V

S

SD

IN

GND

C
1nF

V

OUT

L

V

V

V

OUT

ADG601

IN

ADG602

IN

Q

INJ=CL

× ΔV

OUT

ΔV

OFFON

OUT

02619-018

Figure 19. Charge Injection

0.1µF

V

DD

IN

V

IN

S

GND

OFF ISOLATION = 20 log

SS

0.1µF

V

SS

50Ω

D

V

OUT

V

S

Figure 20. Off Isolation

NETWORK

ANALYZER

50Ω

V

S

V

OUT

R

L

50Ω

0.1µF

V

IN

V

IN

02619-019

INSERTION LOSS = 20 log

SS

0.1µF

NETWORK

V

DD

SS

S

D

GND

V

OUT

WITHOUT SWITCH

V

S

ANALYZER

50Ω

R

L

50Ω

WITH SWITCH

V

S

V

OUT

02619-020

Figure 21. Bandwidth

Rev. C | Page 10 of 12

ADG601/ADG602

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OUTLINE DIMENSIONS

3.20

3.00

2.80

PIN 1

0.95

0.85

0.75

0.15

0.00

COPLANARITY

8

1

0.65 BSC

0.38

0.22

0.10

3.20

3.00

2.80

5

4

SEATING
PLANE

5.15

4.90

4.65

1.10 MAX

0.23

0.08

1.60 BSC

PIN 1

INDICATOR

1.30

1.15

0.90

8°
0°

0.80

0.60

0.40

0.15 MAX

2.90 BSC

6

1 3

2

1.90
BSC

0.50

0.30

45

0.95 BSC

2.80 BSC

1.45 MAX

SEATING
PLANE

0.22

0.08
10°

0.60

4°

0.45

0°

0.30

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 22. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dim

ensions shown in millimeters

COMPLIANT TO JEDEC STANDARDS MO-178-AB

Figure 23. 6-Lead Small Outline Transistor Package [SOT-23]

(RJ-6)

Dim

ensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

ADG601BRT-REEL −40°C to +85°C 6-Lead SOT-23 RJ-6 STB
ADG601BRT-REEL7 −40°C to +85°C 6-Lead SOT-23 RJ-6 STB
ADG601BRTZ-REEL
ADG601BRTZ-REEL7

2

2

−40°C to +85°C 6-Lead SOT-23 RJ-6 STB#

−40°C to +85°C 6-Lead SOT-23 RJ-6 STB#
ADG601BRM −40°C to +85°C 8-Lead MSOP RM-8 STB
ADG601BRM-REEL −40°C to +85°C 8-Lead MSOP RM-8 STB

ADG601BRM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 STB
ADG601BRMZ
ADG601BRMZ-REEL
ADG601BRMZ-REEL7

2

2

2

−40°C to +85°C 8-Lead MSOP RM-8 S1G

−40°C to +85°C 8-Lead MSOP RM-8 S1G

−40°C to +85°C 8-Lead MSOP RM-8 S1G
ADG601CSURF Die

ADG602BRT-REEL −40°C to +85°C 6-Lead SOT-23 RJ-6 SUB
ADG602BRT-REEL7 −40°C to +85°C 6-Lead SOT-23 RJ-6 SUB
ADG602BRTZ-REEL2 −40°C to +85°C 6-Lead SOT-23 RJ-6 S18
ADG602BRTZ-REEL72 −40°C to +85°C 6-Lead SOT-23 RJ-6 S18
ADG602BRM −40°C to +85°C 8-Lead MSOP RM-8 SUB

ADG602BRM-REEL −40°C to +85°C 8-Lead MSOP RM-8 SUB
ADG602BRM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 SUB

ADG602BRMZ

ADG602BRMZ-REEL7

1

Branding on SOT-23 and MSOP is limited to three characters due to space constraints.

2

Z = RoHS Compliant Part, # denotes RoHS compliant product, may be top or bottom marked.

2

2

−40°C to +85°C 8-Lead MSOP RM-8 S18

−40°C to +85°C 8-Lead MSOP RM-8 S18

1

Rev. C | Page 11 of 12

ADG601/ADG602

www.BDTIC.com/ADI

NOTES

©2001–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02619-0-3/07(C)

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