Datasheet ADG509A Datasheet (ANALOG DEVICES)

S1AS

S1BS

www.BDTIC.com/ADI

CMOS 4-/8-Channel

Analog Multiplexers

ADG508A/ADG509A

FEATURES FUNCTIONAL BLOCK DIAGRAMS

44 V supply maximum rating

to VDD analog signal range

V

SS

Single-/dual-supply specifications Wide supply ranges (10.8 V to 16.5 V) Extended plastic temperature range

(−40°C to +85°C) Low power dissipation (28 mW maximum) Low leakage (20 pA typical) Available in 16-lead DIP/SOIC_N and 20-lead

CC/LCC packages

PL Superior alternative to:

DG508A, HI-508

DG509A, HI-509

S1

S8

4A

ADG508A

DECODER

A0 A1 A2 EN

Figure 1. ADG508A

ADG509A

D

00051-001

DA

DB

4B

DECODER

A0 A1 EN

Figure 2. ADG509A

GENERAL DESCRIPTION PRODUCT HIGHLIGHTS

The ADG508A and ADG509A are CMOS monolithic analog multiplexers with eight channels and dual four channels, respectively. The ADG508A switches one of eight inputs to a common output, depending on the state of three binary addresses and an enable input. The ADG509A switches one of four differential inputs to a common differential output, depending on the state of two binary addresses and an enable input. Both devices have TTL and 5 V CMOS logic-compatible digital inputs.

The ADG508A and ADG509A are designed on an enhanced

2

MOS process that gives an increased signal capability of VSS

LC to V

and enables operation over a wide range of supply voltages.

DD

The devices can comfortably operate anywhere in the 10.8 V to

16.5 V single- or dual-supply range. These multiplexers also feature high switching speeds and low R

ON

.

1. Single-/Dual-Supply Specifications with a Wide Tolerance. The devices are specified in the 10.8 V to 16.5 V range for both single and dual supplies.

2. Extended Signal Range. The enhanced LC results in a high breakdown and an increased analog signal range of V

to VDD.

SS

3. Break-Before-Make Switching. Switches are guaranteed

reak-before-make so that input signals are protected

b against momentary shorting.

4. Low Leakage. Leakage currents in the range of 20 pA make

hese multiplexers suitable for high precision circuits.

t

00051-002

2

MOS processing

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG508A/ADG509A

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REVISION HISTORY

3/07—Rev. B to Rev. C

Updated Format..................................................................Universal

Changes to Table 3............................................................................ 6

Inserted Table 4................................................................................. 7

Inserted Table 6................................................................................. 8

Changes to Figure 24...................................................................... 12

Updated Outline Dimensions....................................................... 13

Changes to Ordering Guide.......................................................... 15

ESD Caution...................................................................................6

Pin Configurations and Function Descriptions ............................7

Typical Perf or m an c e Charac t e r istics ..............................................9

Test Cir c ui t s ..................................................................................... 10

Single-Supply Octal DAC Application ........................................ 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 15

Rev. C | Page 2 of 16

ADG508A/ADG509A

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SPECIFICATIONS

DUAL SUPPLY

VDD = 10.8 V to 16.5 V, VSS = −10.8 V to −16.5 V, unless otherwise noted.

Table 1.

ADG508A ADG509A K Version

−40°C to

Parameter +25°C

+85°C +25°C

ANALOG SWITCH

Analog Signal Range VSS VSS VSS VSS VSS VSS V min V

VDD VDD VDD VDD VDD V max

DD

RON 280 280 280 Ω typ −10 V ≤ VS ≤ +10 V, IDS = 1 mA;

450 600 450 600 450 600 Ω max 300 400 300 400 Ω max VDD = 15 V (±10%), V 300 400 Ω max VDD = 15 V (±5%), V RON Drift 0.6 0.6 0.6 %/°C typ VS = 0, IDS = 1 mA RON Match 5 5 5 % typ −10 V ≤ VS ≤ +10 V, IDS = 1 mA IS (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ

1 50 1 50 1 50 nA max ID (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ

ADG508A 1 100 1 100 1 100 nA max ADG509A 1 50 1 50 1 50 nA max

ID (ON), On Channel Leakage 0.04 0.04 0.04 nA typ

ADG508A 1 100 1 100 1 100 nA max ADG509A 1 50 1 50 1 50 nA max

I

, Differential Off Output

DIFF

25 25 25 nA max

Leakage (ADG509A only)

DIGITAL CONTROL

V

, Input High Voltage 2.4 2.4 2.4 V min

INH

V

, Input Low Voltage 0.8 0.8 0.8 V max

INL

I

or I

1 1 1 μA max VIN = 0 to VDD

INL

INH

CIN Digital Input Capacitance 8 8 8 pF max

DYNAMIC CHARACTERISTICS

1

t

200 200 200 ns typ

TRANSITION

300 400 300 400 300 400 ns max t

OPEN

1

50 50 50 ns typ 25 10 25 10 25 10 ns min tON (EN)1

200 200 200 ns typ 300 400 300 400 300 400 ns max t

OFF

(EN)1

200 200 200 ns typ 300 400 300 400 300 400 ns max OFF Isolation 68 68 68 dB typ VEN = 0.8 V, RL = 1 kΩ, CL = 15 pF, 50 50 50 dB min VS = 7 V rms, f = 100 kHz CS (OFF) 5 5 5 pF typ VEN = 0.8 V CD (OFF)

ADG508A 22 22 22 pF typ VEN = 0.8 V ADG509A 11 11 11 pF typ

Q

, Charge Injection 4 4 4 pC typ

INJ

ADG508A ADG509A B Version

−40°C to +85°C +25°C

ADG508A ADG509A

T Version

−55°C to +125°C Unit Comments

see

Figure 14

= −15 V (±10%)

SS

= −15 V (±5%)

SS

V1 = ±10 V, V2 = see

Figure 15

V1 = ±10 V, V2 = see

Figure 16

V1 = V2 = ±10 V; see

V1 = ±10 V, V2 = see

Figure 18

V1 = ±10 V, V2 = see

Figure 19

See Figure 20

See Figure 21

R

= 0 Ω, VS = 0; see Figure 22

S

m 10 V;

Figure 17

m

10 V;

m

10 V;

Rev. C | Page 3 of 16

ADG508A/ADG509A

www.BDTIC.com/ADI

ADG508A

Parameter +25°C

POWER SUPPLY

IDD 0.6 0.6 0.6 mA typ VIN = V

1.5 1.5 1.5 mA max ISS 20 20 20 μA typ VIN = V

0.2 0.2 0.2 mA max Power Dissipation 10 10 10 mW typ

28 28 28 mW max

1

Sample tested at 25°C to ensure compliance.

ADG509A K Version

−40°C to +85°C +25°C

ADG508A ADG509A B Version

−40°C to +85°C +25°C

ADG508A ADG509A

T Version

−55°C to +125°C Unit Comments

INL

or V

INH

Rev. C | Page 4 of 16

ADG508A/ADG509A

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SINGLE SUPPLY

VDD = 10.8 V to 16.5 V, VSS = GND = 0 V, unless otherwise noted.

Table 2.

ADG508A ADG5

K Version

Parameter +25°C

09A

–40°C to +85

°C +25°C

ADG508A ADG509A B Version

–40°C to +85°C +25°C

ADG508A ADG509A

T Version

–55°C to +125°C Unit Comments

ANALOG SWITCH

Analog Signal Range GND GND GND GND GND GND V min V

VDD VDD VDD VDD VDD V max

DD

RON 500 500 500 Ω typ GND ≤ VS ≤ +10 V, IDS = 0.5 mA; 700 1000 700 1000 700 1000 Ω max RON Drift 0.6 0.6 0.6 %/°C typ VS = 0, IDS = 0.5 mA RON Match 5 5 5 % typ GND ≤ VS ≤ +10 V, IDS = 0.5 mA IS (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = +10 V/GND, V2 = GND/+10 V; 1 50 1 50 1 50 nA max ID (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/GND, V2 = GND/+10 V

ADG508A 1 100 1 100 1 100 nA max ADG509A 1 50 1 50 1 50 nA max

ID (ON), On Channel Leakage 0.04 0.04 0.04 nA typ

see

Figure 14

see

Figure 15

See

Figure 16

V1 = V2 = +10 V/GND; see

Figure 17

ADG508A 1 100 1 100 1 100 nA max ADG509A 1 50 1 50 1 50 nA max

I

, Differential Off Output

DIFF

Leakage (ADG509A only)

25 25 25 nA max V1 = +10 V/GND, V2 = GND/+10 V;

see

Figure 18

DIGITAL CONTROL

V

, Input High Voltage 2.4 2.4 2.4 V min

INH

V

, Input Low Voltage 0.8 0.8 0.8 V max

INL

I

or I

1 1 1 μA max VIN = 0 to V

INL

INH

DD

CIN Digital Input Capacitance 8 8 8 pF max

DYNAMIC CHARACTERISTICS

1

t

TRANSITION

450 600 450 600 450 600 ns max

1

t

OPEN

300 300 300 ns typ V1 = +10 V/GND, V2 = GND/+10 V;

see

Figure 19

50 50 50 ns typ

See

Figure 20

25 10 25 10 25 10 ns min tON (EN)

1

250 250 250 ns typ

See

Figure 21

450 600 450 600 450 600 ns max

1

t

(EN)

OFF

250 250 250 ns typ

See

Figure 21

450 600 450 600 450 600 ns max OFF Isolation 68 68 68 dB typ VEN = 0.8 V, RL = 1kΩ, CL = 15 pF, 50 50 50 dB min VS = 3.5 V rms, f = 100 kHz CS (OFF) 5 5 5 pF typ VEN = 0.8 V CD (OFF)

ADG508A 22 22 22 pF typ VEN = 0.8 V ADG509A 11 11 11 pF typ

Q

, Charge Injection 4 4 4 pC typ

INJ

R

= 0 Ω, VS = 0 V; see Figure 22

S

POWER SUPPLY

IDD 0.6 0.6 0.6 mA typ VIN = V

INL

or V

INH

1.5 1.5 1.5 mA max Power Dissipation 10 10 10 mW typ

25 25 25 mW max

1

Sample tested at 25°C to ensure compliance.

Rev. C | Page 5 of 16

ADG508A/ADG509A

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ABSOLUTE MAXIMUM RATINGS

T = 25°C, unless otherwise noted.

A

Table 3.

Parameter Ratings

V to V 44 V

DD SS

V to GND 32 V

DD

V to GND –32 V

SS

Analog Inputs

Voltage at S, D

Continuous Current, S or D 20 mA Pulsed Current S or D

1 ms Duration, 10% Duty Cycle 40 mA

Digital Inputs

Voltage at A, EN

Power Dissipation (Any Package)

Up to 75°C 470 mW Derates Above 75°C by 6 mW/°C

Operating Temperature

Commercial (K Version) −40°C to +85°C Industrial (B Version) −40°C to +85°C Extended (T Version) −55°C to +125°C

Storage Temperature Range −65°C to +150°C

1

Overvoltage at A, EN, S, or D is clamped by diodes. Current should be limited

to the maximum rating shown in Table 3.

1

− 2 V to VV

SS DD

whichever occurs first

1

− 4 V to VDD + 4 V or 20 mA,

V

SS

whichever occurs first

+ 2 V or 20 mA,

Stresses above those listed under Absolute Maximum Ratings

y cause permanent damage to the device. This is a stress

ma rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

Rev. C | Page 6 of 16

ADG508A/ADG509A

V

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ENA0NCA1A2

4

5

ADG508A

6

(Not to Scale)

7

8

91011 12 13

S4

1201923

PIN 1 IDENTIFIER

TOP VIEW

D

A0 1

EN 2

SS

S1 4

S2

S3 6

S4

D 8

3

ADG508A

TOP VIEW

(Not to Scale)

5

7

EN

A116

15

A2

GND14

V

13

DD

S512

S611

10

S7

S89

00051-003

NC = NO CONNECT

4

V

SS

5

S1

NC

S2

S3

6

7

8

ADG508A

TOP VIEW

(Not to Scale)

S4

19A220A11NC2A03

18

GND

17

V

DD

16

NC

15

S5

14

S6

13S712S811NC10D9

00051-004

SS

S1

NC

S2

S3

Figure 3. ADG508A DIP, SOIC_N Figure 4. ADG508A LCC Figure 5. ADG508A PLCC

Table 4. ADG508A Pin Function Description

Pin Number

DIP/SOIC_N PLCC/LCC Mnemonic Description

1 2 A0 Logic Control Input. 2 3 EN

Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches.

3 4 V

SS

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,

it can be connected to ground. 4 5 S1 Source Terminal 1. Can be an input or an output. 5 7 S2 6 8 S3 7 9 S4 8 10 D 9 12 S8 10 13 S7 11 14 S6 12 15 S5 13 17 V

DD

14 18 GND 15 19 A2 16 20 A1 N/A 1 NC N/A 6 NC N/A 11 NC N/A 16 NC No C

Source Terminal 2. Can be an input or an output.

Source Terminal 3. Can be an input or an output.

Source Terminal 4. Can be an input or an output.

Drain Terminal. Can be an input or an output.

Source Terminal 8. Can be an input or an output.

Source Terminal 7. Can be an input or an output.

Source Terminal 6. Can be an input or an output.

Source Terminal 5. Can be an input or an output.

Ground (0 V) Reference.

Logic Control Input.

No Connect.

onnect.

Table 5. ADG508A Truth Table

A2 A1 A0 EN ON SWITCH

x x x 0 NONE 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1

2 3 4 5 6 7

1 1 1 1 8

NC

S8

18

GND

17

V

DD

16

NC

15

S5

14

S6

NC = NO CONNECT

S7

0051-005

Rev. C | Page 7 of 16

ADG508A/ADG509A

A

AS3A

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ENA0NCA1GND

1201923

1

EN

V

S1A

S2A

S3A

S4A

DA

A0

SS

2

3

ADG509A

TOP VIEW

4

(Not to Scale)

5

6

7

8

A1

16

GND

15

V

14

DD

S1B

13

12

S2B

S3B

11

10

S4B

DB

9

00051-006

Figure 6. ADG509A DIP, SOIC_N Figure 7. ADG509A PLCC

Table 6. ADG509A Pin Function Description

Pin Number

DIP/SOIC PLCC/LCC Mnemonic Description

1 2 A0 Logic Control Input. 2 3 EN

Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches.

3 4 V

SS

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,

it can be connected to ground. 4 5 S1A 5 7 S2A 6 8 S3A 7 9 S4A 8 10 DA 9 12 DB 10 13 S4B 11 14 S3B 12 15 S2B 13 17 S1B 14 18 V

DD

15 19 GND 16 20 A1 N/A 1 NC N/A 6 NC N/A 11 NC

Source Terminal 1A. Can be an input or an output.

Source Terminal 2A. Can be an input or an output.

Source Terminal 3A. Can be an input or an output.

Source Terminal 4A. Can be an input or an output.

Drain Terminal A. Can be an input or an output.

Drain Terminal B. Can be an input or an output.

Source Terminal 4B. Can be an input or an output.

Source Terminal 3B. Can be an input or an output.

Source Terminal 2B. Can be an input or an output.

Source Terminal 1B. Can be an input or an output.

Most Positive Power Supply Potential.

Ground (0 V) Reference.

Logic Control Input.

No Connect.

No Connect. N/A 16 NC No Connect.

Table 7. ADG509A Truth Table

A1 A0 EN ON SWITCH PAIR

x x 0 NONE 0 0 1 1 0 1 1 1 0 1

2 3

1 1 1 4

x = don’t care

SS

S1

NC

S2

5

6

(Not to Scale)

7

8

91011 12 13

S4A

IDENTIFIER

ADG509A

TOP VIEW

DANCDB

PIN 1

4

V

18

V

DD

17

S1B

16

NC

15

S2B

14

S3B

NC = NO CONNECT

S4B

00051-008

Rev. C | Page 8 of 16

ADG508A/ADG509A

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TYPICAL PERFORMANCE CHARACTERISTICS

The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5 V.

700

600

VDD=+5V

= –5V

V

500

400

(Ω)

ON

R

300

200

100

0

–20 20

–15 –10 –5 0 5 10 15

Figure 8. R

100

LEAKAGE CURRENT (n A)

0.1

as a Function of V (V ): Dual-Supply Voltage, T

ON

VDD= +16.5V V

= –16.5V

SS

10

1

VDD= +10.8V V

SS

VDD= +15V V

SS

= –10.8V

= –15V

V

](V)

D[VS

D S A

ID(ON) I

(OFF)

D

IS(OFF)

= 25°C

700

600

500

400

(Ω)

ON

R

300

200

100

0

–20 20

–15 –10 –5 0 5 10 15

00051-009

Figure 11. R

TRIGGER LEVEL (V)

as a Function of V (V ) Single-Supply Voltage, T

ON

1.9

1.8

1.7

1.6

VDD=15V V

](V)

V

D[VS

D S A

VDD=10.8V

=0V

V

SS

=0V

SS

00051-012

= 25°C

(Not

(ns)

TRANSITION

t

Figure 10. t

(Note: For V

35

25

45 55 65 85 95 105 115

TEMPERATURE (°C)

75 125

00051-010

Figure 9. Leakage Current as a Function of Temperature

e: Leakage Currents Reduce as the Supply Voltages Reduce)

800

700

600

500

SINGLE

400

300

200

100

51

67891011121314

vs. Supply Voltage: Dual and Single Supplies, TA = 25°C

TRANSITION

and lVSSl < 10 V; V1 = VDD/VSS, V2 = VSS/VDD. (see Figure 19))

DD

SUPPLY

DUAL SUPPLY

SUPPLY VOLTAGE (V)

5

00051-011

1.5 678910111213145

Figure 12. Trigger Levels vs. Power Supply Voltage, Dual or Single Supply,

1.

0

0.8

0.6

(mA)

DD

I

0.4

0.2

0

678910111213141516

517

Figure 13. I

vs. Supply Voltage: Dual or Single Supply, T = 25°C

DD

Rev. C | Page 9 of 16

SUPPLY VOLTAGE (V)

= 25°C

T

A

SUPPLY VOLTAGE (V)

15

00051-013

00051-014

A

ADG508A/ADG509A

VSSV

V1VDDV

VDDV

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TEST CIRCUITS

Note: All digital input signal rise and fall times measured from 10% to 90% of 3 V. tR = t = 20 ns.

I

DS

V

DD

SS

F

DD

V1

SD

V

S

RON=V1/I

DS

Figure 14. R Figure 15. I (OFF)

ON S

V

DD

SS

IS(OFF)

A

V1 V2

00051-015

GND

EN

D

0.8V

V1

00051-016

V

SS

DD

EN

GND

Figure 16. I (OFF)

D

0.8V

ID(OFF)

A

V2

0051-017

DD

V

SS

V

DD

SS

EN

GND

Figure 17. I (ON)

D

2.4V

V

ADG509A

A

ID(ON)V2

00051-018

V1

Figure 18. I

SS

DD

GND

EN

= I (OFF)

DIFF

0.8V

DA

A

DB

A

V2

00051-019

DB

SS

3V

0V

50%

t

TRANSITI ONtTRANSITION

90%

ADDRESS DRIVE (V

90%

OUTPUT

)

IN

V

IN

50Ω

2.4V EN

1

SIMILAR CONNECTION FOR ADG509A.

Figure 19. Switching Time of Multiplexer, t

Rev. C | Page 10 of 16

V

DDVSS

A2

A1

A0

ADG508A

TRANSITION

GND

S2–S7

1

S1

S8

D

OUTPUT

1MΩ

V1

V2

35pF

00051-020

ADG508A/ADG509A

0

3

VDDV

V

VDDV

www.BDTIC.com/ADI

SS

V

DD

OPEN

GND

SS

S2–S7

SS

S2–S8

1

S1

D

S1

S8

D

OUTPUT

1kΩ

5V

1kΩ

35pF

5V

35pF

00051-021

V

t

OPEN

50%

ADDRESS DRIVE (V

OUTPUT

)

IN

V

IN

50Ω

A2

A1

A0

ADG508A

2.4V EN

1

SIMILAR CONNECTI ON FO R ADG509A.

Figure 20. Break-Before-Make Delay, t

V

3V

50%

0V

90%

t

ON

(EN)

t

OFF

(EN)

ENABLE DRIVE (V

OUTPUT

10%

)

IN

V

IN

50Ω

DDVSS

A2

A1

A0

ADG508A

EN

1

SIMILAR CONNECTION FOR ADG509A.

Figure 21. Enable Delay, t

3V

IN

0V

V

O

Q

INJ

=CL×ΔV

ΔV

O

R

S

V

S

ON

V

IN

(EN), t (EN)

OFF

SS

V

DDVSS

A0

A1

A2

ADG508A

EN

50Ω

1

SIMILAR CONNECTION FOR ADG509A.

1

GND

DS1

CL 1nF

00051-022

V

O

0051-023

Figure 22. Charge Injection

Rev. C | Page 11 of 16

ADG508A/ADG509A

V15V

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SINGLE-SUPPLY OCTAL DAC APPLICATION

The following circuit shows the ADG508A connected as a demultiplexer to provide eight separate, digitally programmable voltages (0 V to 10 V) from the AD7245A. The AD7245A is a complete 12-bit, voltage output DAC with output amplifier and Zener voltage reference on a monolithic CMOS chip.

The entire system operates from a single 15 V power supply. The ADG508A is ideally suited for the application because it has both low charge injection and I

15

(OFF) leakage current.

S

15V

1/4 TLC274

V

OUT1

DB11

DB0

V

DD

R

FB

V

OUT

EN

DD

D

S1

0.01µF

AD7245A

ADG508A

GND

V

SS

A0 A1 A2

15V

V

S8

0.01µF

1/4 TLC274

OUT8

00051-024

10Ω

CS

WR

LDAC

CLR

REF OUT

+

10µF0.1µF

R

OFS

V

DGND

AGND

SS

Figure 23. ADG508A in a Single-Supply Octal DAC Circuit

Rev. C | Page 12 of 16

ADG508A/ADG509A

0

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OUTLINE DIMENSIONS

0.800 (20.32)

0.790 (20.07)

0.780 (19.81)

0.210

(5.33)

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

16

1

PIN 1

0.100 (2.54) BSC

MAX

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

COMPLIANT TO JEDEC STANDARDS MS-001-AB

Figure 24. 16-Lead Plastic Dual In-Line Package [PDIP]

Dimensions shown in inches and (millimeters)

9

8

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.015 (0.38) MIN

SEATING PLANE

0.005 (0.13) MIN

row Body

Nar

(N-16)

0.060 (1.52) MAX

0.015 (0.38) GAUGE

PLANE

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.430 (10.92) MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

0.005 (0.13) MIN

16

1

PIN 1

0.100 (2.54) BSC

0.840 (21.34) MAX

.200 (5.08)

MAX

0.200 (5.08)

0.125 (3.18)

0.023 (0.58)

0.014 (0.36)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

0.098 (2.49) MAX

9

0.310 (7.87)

0.220 (5.59)

8

0.070 (1.78)

0.030 (0.76)

SEATING PLANE

0.060 (1.52)

0.015 (0.38)

0.150 (3.81) MIN

15°

0°

Figure 25. 16-Lead Ceramic Dual In-Line Package [CERDIP]

(Q-16)

ensions shown in inches and (millimeters)

Dim

0.320 (8.13)

0.290 (7.37)

0.015 (0.38)

0.008 (0.20)

10.00 (0.3937)

9.80 (0.3858)

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

16

1

1.27 (0.0500) BSC

0.51 (0.0201)

0.10

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-012-AC

9

6.20 (0.2441)

5.80 (0.2283)

8

1.75 (0.0689)

1.35 (0.0531)

SEATING PLANE

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0197)

0.25 (0.0098)

8° 0°

1.27 (0.0500)

0.40 (0.0157)

×

45°

Figure 26. 16-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-16)

Dimensions shown in inches and (millimeters)

Rev. C | Page 13 of 16

ADG508A/ADG509A

www.BDTIC.com/ADI

0.180 (4.57)

0.165 (4.19)

0.120 (3.04)

0.090 (2.29)

(P-20)

0.20 (0.51) MIN

0.021 (0.53)

0.013 (0.33)

0.032 (0.81)

0.026 (0.66)

0.045 (1.14)

0.025 (0.64)

0.020 (0.50)

0.330 (8.38)

0.290 (7.37)

R

BOTTOM

VIEW

(PINS UP)

0.048 (1.22)

0.042 (1.07)

0.020 (0.51)

0.048 (1.22 )

0.042 (1.07)

3

4

PIN 1

IDENTIFIER

TOP VIEW

(PINS DOWN)

8

9

0.356 (9.04)

R

0.350 (8.89)

0.395 (10.03)

0.385 (9.78)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

0.056 (1.42)

0.042 (1.07)

19

18

0.050 (1.27)

BSC

14

13

SQ

COMPLIANT TO JEDEC STANDARDS MO-047-AA

Figure 27. 20-Lead Plastic Leaded Chip Carrier [PLCC]

ensions shown in inches and (millimeters)

Dim

1

VIEW

0.150 (3.81) BSC

0.200 (5.08) REF

0.100 (2.54) REF

0.015 (0.38) MIN

3

4

0.050 (1.27)

8

BSC

9

45° TYP

0.075 (1.91)

0.095 (2.41)

0.075 (1.90)

0.011 (0.28)

0.007 (0.18) R TYP

0.075 (1.91) REF

0.055 (1.40)

0.045 (1.14)

REF

19

18

14

13

20

BOTTOM

0.100 (2.54)

0.064 (1.63)

0.358 (9.09)

0.342 (8.69) SQ

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

0.358

(9.09)

MAX

0.088 (2.24)

0.054 (1.37)

SQ

Figure 28. 20-Terminal Ceramic Leadless Chip Carrier [LCC]

(E

-20)

Dimensions shown in inches and (millimeters)

0.028 (0.71)

0.022 (0.56)

Rev. C | Page 14 of 16

ADG508A/ADG509A

www.BDTIC.com/ADI

ORDERING GUIDE

Model

ADG508AKN −40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16 ADG508AKNZ

1

ADG508AKR −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG508AKR-REEL −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG508AKR-REEL7 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG508AKRZ ADG508AKRZ-REEL

1

ADG508AKRZ-REEL7 ADG508AKP −40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20 ADG508AKP-REEL −40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20 ADG508AKPZ ADG508AKPZ-REEL

1

ADG508ABQ −40°C to +85°C 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16 ADG508ATQ −55°C to +125°C 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16 ADG508ATE −55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier [LCC] E-20 ADG508ABCHIPS ADG508ATCHIPS ADG509AKN −40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16 ADG509AKNZ

1

ADG509AKR −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG509AKR-REEL −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG509AKR-REEL7 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADG509AKRZ-REEL

1

ADG509AKRZ-REEL7 ADG509AKP −40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20 ADG509AKP-REEL −40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20 ADG509AKPZ ADG509AKPZ-REEL

1

ADG509ABQ −40°C to +85°C 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16 ADG509ATQ −55°C to +125°C 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16 ADG509ATQ/883B −55°C to +125°C 16-Lead Ceramic Dual In-Line Package [CERDIP] Q16 ADG509ABCHIPS ADG509ATCHIPS

1

Z = Pb-free part.

Temperature Range Package Description Package Option

−40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16

−40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16

1

−40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16

−40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20

DIE DIE

−40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16

−40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16

1

−40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16

−40°C to +85°C 20-Lead Plastic Leaded Chip Carrier [PLCC] P-20

DIE DIE

Rev. C | Page 15 of 16

ADG508A/ADG509A

www.BDTIC.com/ADI

NOTES

Rev. C | Page 16 of 16

Datasheet ADG509A Datasheet (ANALOG DEVICES)

FEATURES FUNCTIONAL BLOCK DIAGRAMS

GENERAL DESCRIPTION PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

DUAL SUPPLY

SINGLE SUPPLY

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

TEST CIRCUITS

SINGLE-SUPPLY OCTAL DAC APPLICATION

OUTLINE DIMENSIONS

ORDERING GUIDE