Page 1
FUNCTIONAL BLOCK DIAGRAMS
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG451
IN1
IN2
IN3
IN4
IN1
S1
D1
S2
D2
S3
D3
S4
D4
ADG452
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG453
SWITCHES SHOWN FOR A LOGIC "1" INPUT
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
LC2MOS
5 V RON SPST Switches
ADG451/ADG452/ADG453
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
FEATURES
Low On Resistance (4 V)
On Resistance Flatness 0.2 V
44 V Supply Maximum Ratings
615 V Analog Signal Range
Fully Specified @ 65 V, +12 V, 615 V
Ultralow Power Dissipation (18 mW)
ESD 2 kV
Continuous Current 100 mA
Fast Switching Times
t
O
N
70 ns
t
OFF
60 ns
TTL/CMOS Compatible
Pin Compatible Upgrade for ADG411/ADG412/ADG413
and ADG431/ADG432/ADG433
APPLICATIONS
Relay Replacement
Audio and Video Switching
Automatic Test Equipment
Precision Data Acquisition
Battery Powered Systems
Sample Hold Systems
Communication Systems
PBX, PABX Systems
Avionics
The ADG453 exhibits break-before-make switching action for
use in multiplexer applications. Inherent in the design is low charge
injection for minimum transients when switching the digital inputs.
PRODUCT HIGHLIGHTS
1. Low RON (5 Ω max)
2. Ultralow Power Dissipation
3. Extended Signal Range
The ADG451, ADG452 and ADG453 are fabricated on an
enhanced LC
2
MOS process giving an increased signal
range that fully extends to the supply rails.
4. Break-Before-Make Switching
This prevents channel shorting when the switches are
configured as a multiplexer. (ADG453 only.)
5. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG451, ADG452 and ADG453 can be operated from a
single rail power supply. The parts are fully specified with a
single +12 V power supply and will remain functional with
single supplies as low as +5.0 V.
6. Dual Supply Operation
For applications where the analog signal is bipolar, the
ADG451, ADG452 and ADG453 can be operated from a
dual power supply ranging from ±4.5 V to ±20 V.
GENERAL DESCRIPTION
The ADG451, ADG452 and ADG453 are monolithic CMOS
devices comprising four independently selectable switches. They
are designed on an enhanced LC
2
MOS process that provides
low power dissipation yet gives high switching speed and low on
resistance.
The on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed coupled with high
signal bandwidth also make the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipation making the parts ideally suited for portable and battery
powered instruments.
The ADG451, ADG452 and ADG453 contain four independent single-pole/single-throw (SPST) switches. The ADG451
and ADG452 differ only in that the digital control logic is inverted. The ADG451 switches are turned on with a logic low on
the appropriate control input, while a logic high is required for
the ADG452. The ADG453 has two switches with digital control logic similar to that of the ADG451 while the logic is inverted on the other two switches.
Each switch conducts equally well in both directions when ON
and has an input signal range which extends to the supplies. In
the OFF condition, signal levels up to the supplies are blocked.
Page 2
ADG451/ADG452/ADG453–SPECIFICA TIONS
1
Dual Supply
B Version
T
MIN
to
Parameter +258CT
MAX
Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to V
DD
V
On-Resistance (R
ON
) 4.0 Ω typ VD = –10 V to +10 V, IS = –10 mA
57 Ω max
On-Resistance Match Between 0.1 Ω typ V
D
= ±10 V, IS = –10 mA
Channels (∆R
ON
) 0.5 0.5 Ω max
On-Resistance Flatness (R
FLAT(ON)
) 0.2 Ω typ VD = –5 V, 0 V, +5 V, IS = –10 mA
0.5 0.5 Ω max
LEAKAGE CURRENTS
2
Source OFF Leakage IS (OFF) ±0.02 nA typ VD = ±10 V, VS = ±10 V;
±0.5 ±2.5 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.02 nA typ VD = ±10 V, VS = ±10 V;
±0.5 ±2.5 nA max Test Circuit 2
Channel ON Leakage I
D
, IS (ON) ±0.04 nA typ VD = VS = ±10 V;
±1 ±5 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
, All Others = 2.4 V
±0.5 µA max or 0.8 V Respectively
DYNAMIC CHARACTERISTICS
3
t
ON
70 ns typ RL = 300 Ω, CL = 35 pF;
180 220 ns max V
S
= ±10 V; Test Circuit 4
t
OFF
60 ns typ RL = 300 Ω, CL = 35 pF;
140 180 ns max V
S
= ±10 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
15 ns typ RL = 300 Ω, CL = 35 pF;
(ADG453 Only) 5 5 ns min V
S1
= VS2 = +10 V;
Test Circuit 5
Charge Injection 20 pC typ V
S
= 0 V, RS = 0 Ω, CL = 1.0 nF;
30 pC max Test Circuit 6
OFF Isolation 65 dB typ R
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk –90 dB typ R
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 8
C
S
(OFF) 15 pF typ f = 1 MHz
C
D
(OFF) 15 pF typ f = 1 MHz
CD, CS (ON) 100 pF typ f = 1 MHz
POWER REQUIREMENTS V
DD
= +16.5 V, VSS = –16.5 V
Digital Inputs = 0 V or 5 V
I
DD
0.0001 µA typ
0.5 5 µA max
I
SS
0.0001 µA typ
0.5 5 µA max
I
L
0.0001 µA typ
0.5 5 µA max
I
GND
3
0.0001 µA typ
0.5 5 µA max
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
T
MAX
= +70°C
.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. A
–2–
(VDD = +15 V, VSS = –15 V, VL = +5 V, GND = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Page 3
ADG451/ADG452/ADG453
REV. A
–3–
Single Supply
B Version
T
MIN
to
Parameter +258CT
MAX
Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On-Resistance (R
ON
)6 Ω typ VD = 0 V to 10 V, IS = –10 mA
810Ω max
On-Resistance Match Between 0.1 Ω typ V
D
= 10 V, IS = –10 mA
Channels (∆R
ON
) 0.5 0.5 Ω max
On-Resistance Flatness (R
FLAT(ON)
) 1.0 1.0 Ω typ VD = 0 V, +5 V, IS = –10 mA
LEAKAGE CURRENTS
2, 3
Source OFF Leakage IS (OFF) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V;
±0.5 ±2.5 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V;
±0.5 ±2.5 nA max Test Circuit 2
Channel ON Leakage I
D
, IS (ON) ±0.04 nA typ VD = VS = 0 V, 10 V;
±1 ±5 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
±0.5 µA max
DYNAMIC CHARACTERISTICS
4
t
ON
100 ns typ RL = 300 Ω, CL = 35 pF;
220 260 ns max V
S
= +8 V; Test Circuit 4
t
OFF
80 ns typ RL = 300 Ω, CL = 35 pF;
160 200 ns max V
S
= +8 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
15 ns typ RL = 300 Ω, CL = 35 pF;
(ADG453 Only) 10 10 ns min V
S1
= VS2 = +8 V;
Test Circuit 5
Charge Injection 10 pC typ V
S
= 0 V, RS = 0 Ω, CL = 1.0 nF;
Test Circuit 6
Channel-to-Channel Crosstalk –90 dB typ R
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 8
C
S
(OFF) 15 pF typ f = 1 MHz
C
D
(OFF) 15 pF typ f = 1 MHz
CD, CS (ON) 100 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +13.2 V
Digital Inputs = 0 V or 5 V
I
DD
0.0001 µA typ
0.5 5 µA max
I
L
0.0001 µA typ
0.5 5 µA max V
L
= +5.5 V
I
GND
4
0.0001 µA typ
0.5 5 µA max VL = +5.5 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85 °C.
2
T
MAX
= +70°C.
3
Tested with dual supplies.
4
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = +12 V, VSS = 0 V, VL = +5 V, GND = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Page 4
ADG451/ADG452/ADG453–SPECIFICA TIONS
1
Dual Supply
B Version
T
MIN
to
Parameter +258CT
MAX
Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to V
DD
V
On-Resistance (R
ON
)7 Ω typ VD = –3.5 V to +3.5 V, IS = –10 mA
12 15 Ω max
On-Resistance Match Between 0.3 Ω typ V
D
= 3.5 V, IS = –10 mA
Channels (∆RON) 0.5 0.5 Ω max
LEAKAGE CURRENTS
2, 3
Source OFF Leakage IS (OFF) ±0.02 nA typ VD = ±4.5, VS = ±4.5;
±0.5 ±2.5 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.02 nA typ VD = 0 V, 5 V, VS = 0 V, 5 V;
±0.5 ±2.5 nA max Test Circuit 2
Channel ON Leakage I
D
, IS (ON) ±0.04 nA typ VD = VS = 0 V, 5 V;
±1 ±5 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
±0.5 µA max
DYNAMIC CHARACTERISTICS
4
t
ON
160 ns typ RL = 300 Ω, CL = 35 pF;
220 300 ns max V
S
= 3 V; Test Circuit 4
t
OFF
60 ns typ RL = 300 Ω, CL = 35 pF;
140 180 ns max V
S
= 3 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
50 ns typ RL = 300 Ω, CL = 35 pF;
(ADG453 Only) 5 5 ns min V
S1
= VS2 = 3 V;
Test Circuit 5
Charge Injection 10 pC typ V
S
= 0 V, RS = 0 Ω, CL = 1.0 nF;
Test Circuit 6
OFF Isolation 65 dB typ R
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
Channel-to-Channel Crosstalk –76 dB typ R
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 8
C
S
(OFF) 15 pF typ f = 1 MHz
C
D
(OFF) 15 pF typ f = 1 MHz
CD, CS (ON) 100 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V
Digital Inputs = 0 V or 5 V
I
DD
0.0001 µA typ
0.5 5 µA max
I
SS
0.0001 µA typ
0.5 5 µA max
I
L
0.0001 µA typ
0.5 5 µA max V
L
= +5.5 V
I
GND
4
0.0001 µA typ
0.5 5 µA max VL = +5.5 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
T
MAX
= +70°C.
3
Tested with dual supplies.
4
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = +5 V, VSS = –5 V, VL = +5 V, GND = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
REV. A
–4–
Page 5
ADG451/ADG452/ADG453
REV. A
–5–
ORDERING GUIDE
Temperature Package
Model Range Options*
ADG451BN –40°C to +85°C N-16
ADG451BR –40°C to +85°C R-16A
ADG452BN –40°C to +85°C N-16
ADG452BR –40°C to +85°C R-16A
ADG453BN –40°C to +85°C N-16
ADG453BR –40°C to +85°C R-16A
*N = Plastic DIP; R = Small Outline IC (SOIC).
PIN CONFIGURATION
(DIP/SOIC)
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN1
D1
S1
V
SS
GND
S4
D4
IN4
IN2
D2
S2
V
DD
V
L
S3
D3
IN3
ADG451
ADG452
ADG453
ABSOLUTE MAXIMUM RATINGS
1
(TA = +25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –25 V
V
L
to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Analog, Digital Inputs
2
. . . . . . . . . . . VSS –2 V to VDD +2 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . .470 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG451/ADG452/ADG453 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Truth Table (ADG453)
Logic Switch 1, 4 Switch 2, 3
0 OFF ON
1 ON OFF
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . .600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
WARNING!
ESD SENSITIVE DEVICE
Truth Table (ADG451/ADG452)
ADG451 In ADG452 In Switch Condition
01ON
1 0 OFF
Page 6
ADG451/ADG452/ADG453
REV. A
–6–
TERMINOLOGY
V
DD
Most positive power supply potential.
V
SS
Most negative power supply potential in dual
supplies. In single supply applications, it may be
connected to GND.
V
L
Logic power supply (+5 V).
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
R
ON
Ohmic resistance between D and S.
∆R
ON
On resistance match between any two channels
i.e., R
ON
max – RONmin.
R
FLAT(ON)
Flatness is defined as the difference between the
maximum and minimum value of on-resistance as
measured over the specified analog signal range.
I
S
(OFF) Source leakage current with the switch “OFF.”
I
D
(OFF) Drain leakage current with the switch “OFF.”
ID, IS (ON) Channel leakage current with the switch “ON.”
VD (VS) Analog voltage on terminals D, S.
C
S
(OFF) “OFF” switch source capacitance.
C
D
(OFF) “OFF” switch drain capacitance.
C
D
, CS (ON) “ON” switch capacitance.
t
ON
Delay between applying the digital control input
and the output switching on. See Test Circuit 4.
t
OFF
Delay between applying the digital control input
and the output switching off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See Test
Circuit 5.
Crosstalk A measure of unwanted signal coupled through
from one channel to another as a result of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an “OFF” switch.
Charge A measure of the glitch impulse transferred
Injection from the digital input to the analog output dur-
ing switching.
9
8
0
4
3
2
1
6
5
7
–16.5
VD OR VS DRAIN OR SOURCE VOLTAGE – V
TA = +258C
V
L
= +5V
VDD = +5V
V
SS
= –5V
VDD = +13.5V
V
SS
= –13.5V
R
ON
– V
VDD = +16.5V
V
SS
= –16.5V
VDD = +15V
V
SS
= –15V
–13.5
–10.5
–7.5
–4.5
–1.5
1.5
4.5
7.5
10.5
13.5
16.5
Figure 1. On Resistance as a Function of VD (VS)
for Various Dual Supplies
15
–10 –5
0510
0
4
3
2
1
6
5
7
V
D
OR VS DRAIN OR SOURCE VOLTAGE – V
–15
R
ON
– V
+858C
VDD = +15V
V
SS
= –15V
V
L
= +5V
+258C
–408C
Figure 2. On Resistance as a Function of VD (VS)
for Different Temperatures with Dual Supplies
Page 7
ADG451/ADG452/ADG453
REV. A
–7–
Typical Performance Characteristics–
TA = +258C
V
L
= +5V
18
0
12 15
8
6
4
2
10
V
D
OR VS DRAIN OR SOURCE VOLTAGE – V
3
6
0
12
14
16
VDD = +5V
V
SS
= 0V
9
R
ON
– V
VDD = +13.5V
V
SS
= 0V
V
DD
= +15V
V
SS
= 0V
VDD = +16.5V
V
SS
= 0V
Figure 3. On Resistance as a Function of VD (VS) for
Various Single Supplies
TEMPERATURE – 8C
10
25
LEAKAGE CURRENT – nA
0.1
1.0
0.01
35 45 55 65 75 85
IS(OFF)
ID(OFF)
ID(ON)
VDD = +15V
V
SS
= –15V
V
L
= +5V
V
D
= +15V
V
S
= –15V
Figure 4. Leakage Currents as a Function of Temperature
I
L
1SW
I+, I
+
4SW
VDD = +15V
V
SS
= –15V
V
SS
= +5V
FREQUENCY – Hz
I
SUPPLY
– mA
10 100 1k 10k 100k 1M 10M
0.01
0.1
1.0
10
100
1k
10k
100k
Figure 5. Supply Current vs. Input Switching Frequency
VD OR VS DRAIN OR SOURCE VOLTAGE – V
0
16
2468
10
12 14
R
ON
– V
12
11
10
9
8
7
6
5
4
3
2
1
0
–408C
+258C
+858C
VDD = +15V
VSS = 0V
VL = +5V
Figure 6. On Resistance as a Function of VD (VS)
for Different Temperatures with Single Supplies
LEAKAGE CURRENT – nA
0.5
–15
–12
0.4
0.3
0.2
–0.2
–0.3
–0.4
–0.5
0.1
0
–0.1
ID(ON)
V
D
OR VS DRAIN OR SOURCE VOLTAGE – V
ID(OFF)
IS(OFF)
–9
–6 –3 15
12
9630
VDD = +15V
V
SS
= –15V
T
A
= +258C
V
L
= +5V
Figure 7. Leakage Currents as a Function of VD (VS)
FREQUENCY – MHz
70
60
0
1
100
10
OFF ISOLATION – dB
50
40
30
20
10
VDD = +15V
V
SS
= –15V
V
L
= +5V
Figure 8. Off Isolation vs. Frequency
Page 8
ADG451/ADG452/ADG453
REV. A
–8–
FREQUENCY – Hz
1k
120
100 10k 100k 1M 10M
CROSSTALK – dB
VDD = 115V
VSS = –15V
VL = 15V
R
LOAD
= 50V
100
20
0
40
60
80
100M
Figure 9. Crosstalk vs. Frequency
200
100
10
–3.5
1
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
LOSS – dB
FREQUENCY – MHz
VDD = 115V
V
SS
= –15V
V
L
= 15V
Figure 10. Frequency Response with Switch On
APPLICATION
Figure 11 illustrates a precise, fast, sample-and-hold circuit.
An AD845 is used as the input buffer while the output
operational amplifier is an AD711. During the track mode,
SW1 is closed and the output V
OUT
follows the input signal
V
IN
. In the hold mode, SW1 is opened and the signal is
held by the hold capacitor C
H
.
ADG451/
452/453
AD845
AD711
+15V
+5V
SW2
S
S
D
D
SW1
+15V
V
IN
–15V
–15V
CH
2200pF
–15V
V
OUT
75V
R
C
C
C
1000pF
+15V
2200pF
Figure 11. Fast, Accurate Sample-and-Hold Circuit
Due to switch and capacitor leakage, the voltage on the
hold capacitor will decrease with time. The ADG451/
ADG452/ADG453 minimizes this droop due to its low
leakage specifications. The droop rate is further minimized
by the use of a polystyrene hold capacitor. The droop rate
for the circuit shown is typically 30 µV/µs.
A second switch, SW2, that operates in parallel with SW1, is
included in this circuit to reduce pedestal error. Since both
switches will be at the same potential, they will have a differential effect on the op amp AD711, which will minimize
charge injection effects. Pedestal error is also reduced by the
compensation network R
C
and CC. This compensation network reduces the hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component
values, the pedestal error has a maximum value of 5mV over
the ±10 V input range. Both the acquisition and settling
times are 850 ns.
Page 9
ADG451/ADG452/ADG453
REV. A
–9–
V
S
RON = V1/I
DS
V
1
I
DS
Test Circuit 1. On Resistance
Test Circuits
IS(OFF) IS(OFF)
V
S
V
D
Test Circuit 2. Off Leakage
ID(ON)
V
S
V
D
Test Circuit 3. On Leakage
S
D
GND
+15V
0.1mF
–15V
0.1mF
+5V
IN
V
S
0.1mF
V
SS
V
OUT
C
L
35pF
V
IN
V
L
V
DD
R
L
300V
50%
ADG451
3V
ADG452
V
IN
V
IN
V
OUT
3V
50%
50% 50%
90% 90%
t
OFF
t
ON
Test Circuit 4. Switching Times
GND
V
SS
ADG453
–15V
V
IN
IN1, IN2
V
S1
V
S2
S1
S2
V
DD
V
L
0.1mF
+15V
+5V
0.1mF 0.1mF
D1
D2
V
OUT1
V
OUT2
C
L2
35pF
C
L1
35pF
R
L1
300V
R
L2
300V
50%
90%
V
IN
V
OUT1
V
OUT2
50%
90%
90% 90%
t
D
t
D
3V
0V
0V
0V
Test Circuit 5. Break-Before-Make Time Delay
Page 10
ADG451/ADG452/ADG453
REV. A
–10–
C
L
10nF
+15V
+5V
V
L
V
GND
V
DD
–15V
IN
V
S
R
S
S
D
V
OUT
VIN = CL 3 DV
OUT
V
IN
3V
V
OUT
DV
OUT
Test Circuit 6. Charge Injection
–15V
V
IN
0.1mF
V
SS
GND
IN
V
S
V
DD
V
L
R
L
50V
V
OUT
+5V
+15V
0.1mF0.1mF
SD
Test Circuit 7. Off Isolation
–15V
0.1mF
V
SS
GND
S
D
NC
SD
R
L
50V
V
OUT
V
S
V
IN1
V
IN2
50V
0.1mF 0.1mF
+5V+15V
CHANNEL-TO-CHANNEL
CROSSTALK = 20 3 LOG|V
S/VOUT
|
Test Circuit 8. Channel-to-Channel Crosstalk
Page 11
ADG451/ADG452/ADG453
REV. A
–11–
16-Lead Plastic DIP
(N-16)
16
18
9
0.840 (21.34)
0.745 (18.92)
0.280 (7.11)
0.240 (6.10)
PIN 1
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
0.160 (4.06)
0.115 (2.93)
0.325 (8.26)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
16-Lead SOIC
(R-16A)
16 9
81
0.3937 (10.00)
0.3859 (9.80)
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0500
(1.27)
BSC
0.0099 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
88
08
0.0196 (0.50)
0.0099 (0.25)
x 458
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Page 12
C3119a–0–2/98
PRINTED IN U.S.A.
–12–
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