Low on resistance (4 Ω)
On resistance flatness (0.2 Ω)
44 V supply maximum ratings
±15 V analog signal range
Fully specified at ±5 V, 12 V, ±15 V
Ultralow power dissipation (18 μW)
ESD 2 kV
Continuous current (100 mA)
Fast switching times
70 ns
t
ON
60 ns
t
OFF
TTL-/CMOS-compatible
Pin-compatible upgrade for ADG411/ADG412/ADG413
and ADG431/ADG432/ADG433
APPLICATIONS
Relay replacement
Audio and video switching
Automatic test equipment
Precision data acquisition
Battery-powered systems
Sample-and-hold systems
Communication systems
PBX, PABX systems
Avio nics
GENERAL DESCRIPTION
The ADG451/ADG452/ADG453 are monolithic CMOS
devices comprising four independently selectable switches.
They are designed on an enhanced LC
provides low power dissipation yet gives high switching
speed and low on resistance.
The on resistance profile is very flat over the full analog input
r
ange, ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed, coupled with high
signal bandwidth, makes the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments.
The ADG451/ADG452/ADG453 contain four independent,
gle-pole/single-throw (SPST) switches. The ADG451 and
sin
ADG452 differ only in that the digital control logic is inverted. The
ADG451 switches are turned on with a logic low on the appropriate
control input, while a logic high is required for the ADG452.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2
MOS process that
5 Ω RON SPST Switches
ADG451/ADG452/ADG453
FUNCTIONAL BLOCK DIAGRAMS
IN1
IN2
ADG451
IN3
IN4
WITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1. ADG451
IN1
IN2
ADG452
IN3
IN4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 2. ADG452
IN1
IN2
ADG453
IN3
IN4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 3. ADG453
The ADG453 has two switches with digital control logic similar
to that of the ADG451, while the logic is inverted on the other
two switches.
Each switch conducts equally well in both
and each has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG453 exhibits break-before-make switching action for
us
e in multiplexer applications. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
3. Extended Signal Range.
e ADG451/ADG452/ADG453 are fabricated on an enhanced
Th
2
LC
MOS process, giving an increased signal range that fully
extends to the supply rails.
4. Break-Before-Make Switching.
revents channel shorting when the switches are
This p
configured as a multiplexer (ADG453 only.)
5. Single-Supply Operation.
F
or applications in which the analog signal is unipolar, the
ADG451/ADG452/ADG453 can be operated from a single
rail power supply. The parts are fully specified with a single
12 V power supply and remain functional with single supplies
as low as 5.0 V.
6. Dual-Supply Operation.
or applications where the analog signal is bipolar, the
F
ADG451/ADG452/ADG453 can be operated from a dual
power supply ranging from ±4.5 V to ±20 V.
Rev. C | Page 3 of 16
Page 4
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
SPECIFICATIONS
15 V DUAL SUPPLY
VDD = 15 V, VSS = −15 V, VL = 5 V, GND = 0 V. All specifications T
Table 1.
B Version
Parameter 25°C T
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 4 Ω typ VD = −10 V to +10 V, IS = −10 mA
5 7 Ω max
On Resistance Match Between Channels (ΔRON) 0.1 Ω typ VD = ±10 V, IS = −10 mA
0.5 0.5 Ω max
On Resistance Flatness (R
) 0.2 Ω typ VD = −5 V, 0 V, +5 V, IS = −10 mA
FLAT(ON)
0.5 0.5 Ω max
LEAKAGE CURRENTS
2
Source Off Leakage, IS (OFF) ±0.02 nA typ VD = ±10 V, VS = ±10 V; see Figure 17
±0.5 ±2.5 nA max
Drain Off Leakage, ID (OFF) ±0.02 nA typ VD = ±10 V, VS = ±10 V; see Figure 17
±0.5 ±2.5 nA max
Channel On Leakage, ID, IS (ON) ±0.04 nA typ VD = VS = ±10 V; see Figure 18
±1 ±5 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.4 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
±0.5 μA max
DYNAMIC CHARACTERISTICS
3
tON 70 ns typ RL = 300 Ω, CL = 35 pF, VS = ±10 V; see Figure 19
180 220 ns max
t
60 ns typ RL = 300 Ω, CL = 35 pF, VS = ±10 V; see Figure 19
OFF
140 180 ns max
Break-Before-Make Time Delay, tD (ADG453 Only) 15 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = +10 V; see Figure 20
5 5 ns min
Charge Injection 20 pC typ VS = 0 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21
30 pC max
Off Isolation 65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22
Channel-to-Channel Crosstalk −90 dB typ
CS (OFF) 37 pF typ f = 1 MHz
CD (OFF) 37 pF typ f = 1 MHz
CD, CS (ON) 140 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 16.5 V, VSS = −16.5 V; digital inputs = 0 V or 5 V
IDD 0.0001 μA typ
0.5 5 μA max
ISS 0.0001 μA typ
0.5 5 μA max
IL 0.0001 μA typ
0.5 5 μA max
3
I
GND
0.0001 μA typ
0.5 5 μA max
1
Temperature range for B version is −40°C to +85°C.
2
T
= 70°C.
MAX
3
Guaranteed by design, not subject to production test.
MIN
1
to T
MIN
to T
MAX
, unless otherwise noted.
MAX
Unit Test Conditions/Comments
or V
INL
R
= 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23
L
; all others = 2.4 V or 0.8 V, respectively
INH
Rev. C | Page 4 of 16
Page 5
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
12 V SINGLE SUPPLY
VDD = 12 V, VSS = 0 V, VL = 5 V, GND = 0 V. All specifications T
Table 2.
B Version
Parameter 25°C T
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 6 Ω typ VD = 0 V to +10 V, IS = −10 mA
8 10 Ω max
On Resistance Match Between Channels (ΔRON) 0.1 Ω typ VD = 10 V, IS = −10 mA
0.5 0.5 Ω max
On Resistance Flatness (R
LEAKAGE CURRENTS
2, 3
) 1.0 1.0 Ω typ VD = 0 V, 5 V, IS = −10 mA
FLAT(ON)
Source Off Leakage, IS (OFF) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17
±0.5 ±2.5 nA max
Drain Off Leakage, ID (OFF) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V; see Figure 17
±0.5 ±2.5 nA max
Channel On Leakage, ID, IS (ON) ±0.04 nA typ VD = VS = 0 V, 10 V; see Figure 18
±1 ±5 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.4 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
±0.5 μA max
DYNAMIC CHARACTERISTICS
4
tON 100 ns typ RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19
220 260 ns max
t
80 ns typ RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 19
OFF
160 200 ns max
Break-Before-Make Time Delay, tD (ADG453 Only) 15 ns typ
10 10 ns min
Charge Injection 10 pC typ VS = 6 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21
Channel-to-Channel Crosstalk −90 dB typ
CS (OFF) 60 pF typ f = 1 MHz
CD (OFF) 60 pF typ f = 1 MHz
CD, CS (ON) 100 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 13.2 V; digital inputs = 0 V or 5 V
IDD 0.0001 μA typ
0.5 5 μA max
IL 0.0001 μA typ
0.5 5 μA max VL = 5.5 V
4
I
GND
0.0001 μA typ
0.5 5 μA max VL = 5.5 V
1
Temperature range for B version is −40°C to +85°C.
2
T
= 70°C.
MAX
3
Tested with dual supplies.
4
Guaranteed by design, not subject to production test.
MIN
to T
MIN
, unless otherwise noted.
MAX
1
to T
Unit Test Conditions/Comments
MAX
or V
INH
INL
= 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V;
R
L
see Figure 20
R
= 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23
L
Rev. C | Page 5 of 16
Page 6
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
5 V DUAL SUPPLY
VDD = +5 V, VSS = −5 V, VL = +5 V, GND = 0 V. All specifications T
Table 3.
B Version
Parameter 25°C T
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 7 Ω typ VD = −3.5 V to +3.5 V, IS = −10 mA
12 15 Ω max
On Resistance Match Between Channels (ΔRON) 0.3 Ω typ VD = 3.5 V, IS = −10 mA
0.5 0.5 Ω max
LEAKAGE CURRENTS
2, 3
Source Off Leakage, IS (OFF) ±0.02 nA typ VD = ±4.5, VS = ±4.5; see Figure 17
±0.5 ±2.5 nA max
Drain Off Leakage, ID (OFF) ±0.02 nA typ VD = 0 V, 5 V, VS = 0 V, 5 V; see Figure 17
±0.5 ±2.5 nA max
Channel On Leakage, ID, IS (ON) ±0.04 nA typ VD = VS = 0 V, 5 V; see Figure 18
±1 ±5 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.4 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
±0.5 μA max
DYNAMIC CHARACTERISTICS
4
tON 160 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 19
220 300 ns max
t
60 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V; see Figure 19
OFF
140 180 ns max
Break-Before-Make Time Delay, tD (ADG453 Only) 50 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 20
5 5 ns min
Charge Injection 10 pC typ VS = 0 V, RS = 0 Ω, CL = 1.0 nF; see Figure 21
Off Isolation 65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22
Channel-to-Channel Crosstalk −76 dB typ
CS (OFF) 48 pF typ f = 1 MHz
CD (OFF) 48 pF typ f = 1 MHz
CD, CS (ON) 148 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V; digital inputs = 0 V or 5 V
IDD 0.0001 μA typ
0.5 5 μA max
ISS 0.0001 μA typ
0.5 5 μA max
IL 0.0001 μA typ
0.5 5 μA max VL = 5.5 V
4
I
GND
0.0001 μA typ
0.5 5 μA max VL = 5.5 V
1
Temperature range for B version is −40°C to +85°C.
2
T
= 70°C.
MAX
3
Tested with dual supplies.
4
Guaranteed by design, not subject to production test.
MIN
to T
MIN
1
to T
, unless otherwise noted.
MAX
Unit Test Conditions/Comments
MAX
or V
INH
INL
R
= 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23
L
Rev. C | Page 6 of 16
Page 7
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameters Ratings
VDD to VSS 44 V
VDD to GND −0.3 V to +32 V
VSS to GND +0.3 V to −32 V
VL to GND −0.3 V to VDD + 0.3 V
Analog, Digital Inputs
Continuous Current, S or D 100 mA
Peak Current, S or D (pulsed at
1 ms, 10% duty cycle maximum)
Operating Temperature Range
Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
Plastic DIP Package,
Power Dissipation
θJA Thermal Impedance 117°C/W
Lead Temperature, Soldering
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
1
VSS − 2 V to VDD + 2 V or 30 mA,
whichever occurs first
300 mA
470 mW
260°C
Stresses above those listed under Absolute Maximum Ratings
y cause permanent damage to the device. This is a stress
ma
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any one
e.
tim
ESD CAUTION
Rev. C | Page 7 of 16
Page 8
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN1
1
D1
2
ADG451/
3
S1
ADG452/
V
4
SS
ADG453
5
GND
S4
D4
IN4
TOP VIEW
6
(Not to Scale)
7
8
Figure 4. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN1 Logic Control Input.
2 D1 Drain Terminal. Can be an input or an output.
3 S1 Source Terminal. Can be an input or an output.
4 VSS
Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,
it can be c
onnected to GND.
5 GND Ground (0 V) Reference.
6 S4 Source Terminal. Can be an input or an output.
7 D4 Drain Terminal. Can be an input or an output.
8 IN4 Logic Control Input.
9 IN3 Logic Control Input.
10 D3 Drain Terminal. Can be an input or an output.
11 S3 Source Terminal. Can be an input or an output.
12 VL Logic Power Supply (5 V ).
13 VDD Most Positive Power Supply Potential.
14 S2 Source Terminal. Can be an input or an output.
15 D2 Drain Terminal. Can be an input or an output.
16 IN2 Logic Control Input.
Table 6. Truth Table (ADG451/ADG452)
ADG451 In ADG452 In Switch Condition
0 1 On
1 0 Off
IN2
16
D2
15
14
S2
V
13
DD
12
V
L
S3
11
D3
10
9
IN3
05239-002
Table 7. Truth Table (ADG453)
Logic Switch 1, Switch 4 Switch 2, Switch 3
0 Off On
1 On Off
Rev. C | Page 8 of 16
Page 9
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
9
8
=+5V
V
7
6
5
(Ω)
4
ON
R
3
2
1
0
–16.5
–13.5
–10.5
VD OR VSDRAIN OR SOURCE VO LTAGE ( V)
DD
V
= –5V
SS
VDD=+13.5V
V
= –13.5V
SS
VDD=+15V
V
= –15V
SS
–7.5
–4.5
1.5
–1.5
4.5
VDD=+16.5V
V
SS
7.5
Figure 5. On Resistance as a Function of VD (VS) for Various
Dual Supplies
7
+85°C
6
5
+25°C
4
–40°C
(Ω)
ON
3
R
2
1
VDD= +15V
V
= –15V
SS
V
=+5V
L
TA= 25°C
V
=5V
L
= –16.5V
10.5
13.5
16.5
05239-003
10
VDD= +15V
V
= –15V
SS
V
=+5V
L
V
= +15V
D
V
= –15V
S
1
ID(ON)
0.1
ID(OFF)
LEAKAGE CURRENT (n A)
0.01
IS(OFF)
TEMPERATURE (°C)
Figure 8. Leakage Currents as a Function of Temperature
100k
(µA)
SUPPLY
I
10k
100
0.1
=+15V
V
DD
= –15V
V
SS
=+5V
V
L
1k
I+,I
+
10
1
I
4SW
L
85253545557565
1SW
05239-006
0
VD OR VSDRAIN OR SOURCE VO LTAGE ( V)
Figure 6. On Resistance as a Function of V
Temperatures with Dual Supplies
16
VDD=5V
14
V
=0V
SS
12
10
8
(Ω)
ON
R
6
4
2
0
VDD= 13.5V
V
=0V
SS
VD OR VSDRAIN OR SOURCE VO LTAGE ( V)
V
DD
V
SS
Figure 7. On Resistance as a Function of V
Single Supplies
=15V
=0V
(VS) for Different
D
=25°C
T
A
V
=5V
L
VDD= 16.5V
V
=0V
SS
(VS) for Various
D
15–15–10–50105
05239-004
1803691215
05239-005
0.01
FREQUENCY (Hz)
9. Supply Current vs. Input Switching Frequency
Figure
12
VDD= 15V
11
V
=0V
SS
V
=5V
L
10
9
8
7
6
(Ω)
ON
5
R
4
3
2
1
0
VD OR VSDRAIN OR SOURCE VO LTAGE ( V)
Figure 10. On Resistance as a Function of V
(VS) for Different
D
+85°C
+25°C
–40°C
10M101001k10k100k1M
05239-007
1602468101214
05239-008
Temperatures with Single Supplies
Rev. C | Page 9 of 16
Page 10
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
0.5
V
= +15V
DD
V
= –15V
SS
0.4
T
=+25°C
A
V
=+5V
L
0.3
0.2
0.1
0
–0.1
–0.2
LEAKAGE CURRENT ( nA)
–0.3
–0.4
–0.5
VD OR VSDRAIN OR SOURCE VO LTAGE (V)
Figure 11. Leakage Currents as a Function of V
70
60
ID(ON)
I
(OFF)
S
ID(OFF)
(VS)
D
VDD= +15V
V
=–15V
SS
V
=+5V
L
15–15 –12–9–6–3036912
05239-009
120
100
80
60
40
CROSSTALK (d B)
20
0
FREQUENCY (Hz)
VDD= +15V
V
=–15V
SS
V
=+5V
L
R
=50Ω
LOAD
100M1001k10k100k10M1M
Figure 13. Cross talk vs. Frequency
0
–0.5
VDD= +15V
V
= –15V
SS
V
=+5V
L
05239-011
50
40
30
20
OFF ISOLATIO N (dB)
10
0
FREQUENCY (MHz)
100110
05239-010
Figure 12. Off Isolation vs. Frequency
–1.0
–1.5
–2.0
LOSS (dB)
–2.5
–3.0
–3.5
FREQUENCY (MHz)
200110100
05239-012
Figure 14. Frequency Response w ith Switc h On
Rev. C | Page 10 of 16
Page 11
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
TERMINOLOGY
RON
Ohmic resistance between D and S.
(ON), CS (ON)
C
D
On switch capacitance.
ΔR
ON
On resistance match between any two channels, that is, R
maximum minus R
R
FLAT(ON)
minimum.
ON
ON
Flatness is defined as the difference between the maximum and
minimum value of on resistance, as measured over the specified
analog signal range.
I
(OFF)
S
Source leakage current with the switch off.
(OFF)
I
D
Drain leakage current with the switch off.
I
, IS (ON)
D
Channel leakage current with the switch on.
V
(VS)
D
Analog voltage on Terminal D and Terminal S.
(OFF)
C
S
Off switch source capacitance.
C
(OFF)
D
Off switch drain capacitance.
t
ON
Delay between applying the digital control input and the output
switching on. See
t
OFF
Figure 19.
Delay between applying the digital control input and the output
switching off.
t
D
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another. See
Figure 20.
Crosstalk
A
measure of unwanted signal coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
ure of unwanted signal coupling through an off switch.
A meas
Charge Injection
A me
asure of the glitch impulse transferred from the digital
input to the analog output during switching.
Rev. C | Page 11 of 16
Page 12
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
APPLICATIONS
Figure 15 illustrates a precise, fast, sample-and-hold circuit. An
AD845 is used as the input buffer, and the output operational
mplifier is an AD711. During track mode, SW1 is closed, and
a
th
e output, V
SW1 is opened, and the signal is held by the hold capacitor, C
+15V
V
IN
AD845
, follows the input signal, VIN. In hold mode,
OUT
+15V+5V
C
C
C
1000pF
2200pF
CH
2200pF
1213
SW2
SD
R
SD
SW1
–15V
ADG451/
ADG452/
ADG453
Figure 15. Fast, Accurate Sample-and-Hold Circuit
75Ω
45
–15V
+15V
AD711
–15V
H
V
OUT
.
05239-013
Due to switch and capacitor leakage, the voltage on the hold
capacitor decreases with time. The ADG451/ADG452/ADG453
minimize this droop due to their low leakage specifications. The
droop rate is further minimized by the use of a polystyrene
hold capacitor. The droop rate for the circuit shown is typically
30 μV/μs.
A second switch, SW2, which operates in parallel with SW1, is
ncluded in this circuit to reduce pedestal error. Because both
i
switches are at the same potential, they have a differential effect
on the op amp, AD711, which minimizes charge injection
ef
fects. Pedestal error is also reduced by the compensation
network, R
and CC. This compensation network reduces the
C
hold time glitch while optimizing the acquisition time. Using
the illustrated op amps and component values, the pedestal
error has a maximum value of 5 mV over the ±10 V input
range. Both the acquisition and settling times are 850 ns.
Rev. C | Page 12 of 16
Page 13
ADG451/ADG452/ADG453
V
V
V
V
V
V
www.BDTIC.com/ADI
TEST CIRCUITS
I
DS
V
1
SD
V
S
R
ON=V1/IDS
05239-014
Figure 16. On Resistance
+15V+5
0.1µF
V
DD
SD
V
S
IN
IN
0.1µF
GND
0.1µF
+15V+5
V
V
–15V
0.1µF
0.1µF
L
R
L
300Ω
SS
IS(OFF)ID(OFF)
V
S
SD
Figure 17. Off Leakage
3V
ADG451
V
IN
V
OUT
C
L
35pF
V
V
OUT
IN
ADG452
Figure 19. Switching Times
AA
V
D
50%
3V
50%50%
90%
t
ON
SD
S
05239-015
ID(ON)
A
Figure 18. On Leakage
50%
90%
t
OFF
05239-017
V
D
05239-016
V
S1
V
S2
IN1, IN2
IN
V
S
V
DD
ADG453
S1D1
S2D2
GND
R
S
IN
V
L
V
SS
0.1µF
–15V
+15V+5
V
V
L
SD
V
GND
DD
–15V
R
L2
300Ω
V
C
L1
35pF
OUT1
V
V
C
L2
35pF
V
OUT2
R
L1
300Ω
Figure 20. Break-Before-Make Time Delay
3V
C
L
10nF
V
OUT
V
IN
V
OUT
Figure 21. Charge Injection
V
OUT1
OUT2
IN
3V
0V
0V
90%
0V
VIN=CL× ΔV
t
50%
D
90%
OUT
ΔV
50%
OUT
90%
t
90%
D
05239-018
05239-019
Rev. C | Page 13 of 16
Page 14
ADG451/ADG452/ADG453
V
V
www.BDTIC.com/ADI
+15V+5
0.1µF
+15V+5
0.1µF
V
DD
SD
V
S
IN
V
GND
IN
0.1µF
Figure 22. Off Isolation
V
V
SS
–15V
0.1µF
L
V
R
50Ω
OUT
L
05239-020
V
V
OUT
50Ω
CHANNEL-TO-CHANNEL CROSSTAL K = 20 × log |VS/V
V
S
R
IN1
L
Figure
V
DD
SD
SD
GND
0.1µF
23. Channel-to-Channel Crosstalk
V
V
–15V
0.1µF
L
SS
50Ω
V
IN2
NC
OUT
|
05239-021
Rev. C | Page 14 of 16
Page 15
ADG451/ADG452/ADG453
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
5.10
5.00
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
16
1
1.27 (0.0500)
BSC
0.51 (0.0201)
0.10
0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
9
6.20 (0.2441)
5.80 (0.2283)
8
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.25 (0.0098)
0.17 (0.0067)
Figure 24. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
0.800 (20.32)
0.790 (20.07)
0.780 (19.81)
16
1
PIN 1
0.100 (2.54)
BSC
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.