Datasheet ADG451 Datasheet (Analog Devices)

LC2MOS

FEATURES

Low on resistance (4 Ω) On resistance flatness (0.2 Ω) 44 V supply maximum ratings ±15 V analog signal range Fully specified at ±5 V, +12 V, ±15 V Ultralow power dissipation (18 µW) ESD 2 kV Continuous current (100 mA) Fast switching times

70 ns

t

ON

t

60 ns

OFF

TTL/CMOS-compatible Pin-compatible upgrade for ADG411/ADG412/ADG413

and ADG431/ADG432/ADG433

APPLICATIONS

Relay replacement Audio and video switching Automatic test equipment Precision data acquisition Battery-powered systems Sample-and-hold systems Communication systems PBX, PABX systems Avionics

GENERAL DESCRIPTION

The ADG451/ADG452/ADG453 are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced LC provides low power dissipation yet gives high switching speed and low on resistance.

The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed, coupled with high signal bandwidth, makes the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments.

The ADG451/ADG452/ADG453 contain four independent single-pole/single-throw (SPST) switches. The ADG451 and

2

MOS process that

5 Ω R

SPST Switches

ON

ADG451/ADG452/ADG453

FUNCTIONAL BLOCK DIAGRAMS

S1

IN1

IN2

ADG451

IN3

IN4

IN1

IN2

IN3

IN4

SWITCHES SHOWN FOR A LOGIC 1 INPUT

IN1

D1 S2

IN2

D2 S3

IN3

D3 S4

IN4

D4

ADG453

Figure 1.

ADG452

S1

D1 S2

D2 S3

D3 S4

D4

ADG452 differ only in that the digital control logic is inverted. The ADG451 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the ADG452. The ADG453 has two switches with digital control logic similar to that of the ADG451, while the logic is inverted on the other two switches.

Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.

The ADG453 exhibits break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

S1

D1 S2

D2 S3

D3 S4

D4

05239-001

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

www.analog.com

ADG451/ADG452/ADG453

TABLE OF CONTENTS

Product Highlights ........................................................................... 3

Te r m in o l o g y .................................................................................... 10

Specifications..................................................................................... 4

Dual Supply ................................................................................... 4

Absolute Maximum Ratings............................................................ 8

ESD Caution.................................................................................. 8

Pin Configuration and Function Descriptions............................. 9

REVISION HISTORY

12/04—Rev. A to Rev. B

Updated Format ..................................................................Universal

Changes to Specifications Section.................................................. 3

Changes to Absolute Maximum Ratings Section ......................... 8

Changes to Pin Configuration and Function

Descriptions Section ........................................................................ 9

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide.......................................................... 17

2/98—Rev. 0 to Rev. A

10/97—Revision 0: Initial Version

Typical Perfor m a n c e Charac t e r ist i c s ........................................... 11

Applications..................................................................................... 13

Tes t Ci rc ui ts ..................................................................................... 14

Outline Dimensions....................................................................... 16

Ordering Guide .......................................................................... 17

Rev. B | Page 2 of 20

ADG451/ADG452/ADG453

PRODUCT HIGHLIGHTS

1. Low RON (5 Ω maximum)

2. Ultralow Power Dissipation

3. Extended Signal Range The ADG451/ADG452/ADG453 are fabricated on an enhanced LC that fully extends to the supply rails.

4. Break-Before-Make Switching This prevents channel shorting when the switches are configured as a multiplexer (ADG453 only.)

2

MOS process, giving an increased signal range

5. Single-Supply Operation For applications in which the analog signal is unipolar, the ADG451/ADG452/ADG453 can be operated from a single rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5.0 V.

6. Dual-Supply Operation For applications where the analog signal is bipolar, the ADG451/ADG452/ADG453 can be operated from a dual power supply ranging from ±4.5 V to ±20 V.

Rev. B | Page 3 of 20

ADG451/ADG452/ADG453

SPECIFICATIONS

DUAL SUPPLY

VDD = +15 V, VSS = −15 V, VL = +5 V, GND = 0 V. All specifications T

Table 1.

MIN

1

to T

MAX

B Version Parameter 25°C T

ANALOG SWITCH

Analog Signal Range VSS to V

DD

On Resistance (RON) 4 Ω typ VD = −10 V to +10 V, IS = −10 mA 5 7 Ω max On Resistance Match Between

Channels (∆R

)

ON

0.1 Ω typ V

0.5 0.5 Ω max On Resistance Flatness (R

) 0.2 Ω typ VD = −5 V, 0 V, +5 V, IS = −10 mA

FLAT(ON)

0.5 0.5 Ω max LEAKAGE CURRENTS

2

Source Off Leakage, IS (Off) ±0.02 nA typ VD = ±10 V, VS = ±10 V; Figure 15 ±0.5 ±2.5 nA max Drain Off Leakage, ID (Off) ±0.02 nA typ VD = ±10 V, VS = ±10 V; Figure 15 ±0.5 ±2.5 nA max

Channel On Leakage, ID, IS (On) ±0.04 nA typ VD = VS = ±10 V; Figure 16 ±1 ±5 nA max DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, I

or I

INL

INH

INL

INH

2.4 V min

0.8 V max

0.005 µA typ VIN = V ±0.5 µA max DYNAMIC CHARACTERISTICS

t

ON

3

70 ns typ RL = 300 Ω, CL = 35 pF, VS = ±10 V; Figure 17 180 220 ns max t

OFF

60 ns typ RL = 300 Ω, CL = 35 pF, VS = ±10 V; Figure 17 140 180 ns max Break-Before-Make Time Delay, tD

15 ns typ R

(ADG453 Only) 5 5 ns min Charge Injection 20 pC typ VS = 0 V, RS = 0 Ω, CL = 1.0 nF; Figure 19 30 pC max Off Isolation 65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 20 Channel-to-Channel Crosstalk −90 dB typ CS (Off) 37 pF typ f = 1 MHz CD (Off) 37 pF typ f = 1 MHz CD, CS (On) 140 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V; digital inputs = 0 V or 5 V

I

DD

0.0001 µA typ

0.5 5 µA max

MIN

to T

, unless otherwise noted.

MAX

Unit Test Conditions/Comments

V

= ±10 V, IS = −10 mA

D

or V

INL

= 300 Ω, CL = 35 pF, VS1 = VS2 = +10 V; Figure 18

L

R

= 50 Ω, CL = 5 pF, f = 1 MHz; Figure 21

L

; all others = 2.4 V or 0.8 V, respectively

INH

Rev. B | Page 4 of 20

ADG451/ADG452/ADG453

B Version

Parameter 25°C T

I

SS

0.0001 µA typ

MIN

1

to T

Unit Test Conditions/Comments

MAX

0.5 5 µA max I

L

0.0001 µA typ

0.5 5 µA max

3

I

0.0001 µA typ

GND

0.5 5 µA max

1

Temperature range for B Version is −40°C to +85°C.

2

T

= 70°C.

MAX

3

Guaranteed by design, not subject to production test.

= 12 V, VSS = 0 V, VL = 5 V, GND = 0 V. All specifications T

V

DD

MIN

to T

, unless otherwise noted.

MAX

Table 2.

MIN

1

to T

MAX

Unit Test Conditions/Comments

B Version

Parameter 25°C T

ANALOG SWITCH

Analog Signal Range 0 V to V

DD

V On Resistance (RON) 6 Ω typ VD = 0 V to +10 V, IS = −10 mA 8 10 Ω max On Resistance Match Between

Channels (∆R

)

ON

0.1 Ω typ V

= +10 V, IS = −10 mA

D

0.5 0.5 Ω max

On Resistance Flatness (R

LEAKAGE CURRENTS

2, 3

) 1.0 1.0 Ω typ VD = 0 V, +5 V, IS = −10 mA

FLAT(ON)

Source Off Leakage, IS (Off) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V; Figure 15 ±0.5 ±2.5 nA max Drain Off Leakage, ID (Off) ±0.02 nA typ VD = 0 V, 10 V, VS = 0 V, 10 V; Figure 15 ±0.5 ±2.5 nA max Channel On Leakage, ID, IS (On) ±0.04 nA typ VD = VS = 0 V, 10 V; Figure 16 ±1 ±5 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

or I

INL

INH

INL

INH

2.4 V min

0.8 V max

0.005 µA typ VIN = V

INL

or V

INH

±0.5 µA max

DYNAMIC CHARACTERISTICS

t

ON

4

100 ns typ RL = 300 Ω, CL = 35 pF, VS = 8 V; Figure 17 220 260 ns max t

OFF

80 ns typ RL = 300 Ω, CL = 35 pF, VS = 8 V; Figure 17 160 200 ns max Break-Before-Make Time Delay, tD

15 ns typ R

= 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V; Figure 18

L

(ADG453 Only)

10 10 ns min Charge Injection 10 pC typ VS = 6 V, RS = 0 Ω, CL = 1.0 nF; Figure 19 Channel-to-Channel Crosstalk −90 dB typ

R

= 50 Ω, CL = 5 pF, f = 1 MHz; Figure 21

L

CS (Off) 60 pF typ f = 1 MHz CD (Off) 60 pF typ f = 1 MHz CD, CS (On) 100 pF typ f = 1 MHz

Rev. B | Page 5 of 20

ADG451/ADG452/ADG453

B Version Parameter 25°C T

MIN

1

to T

MAX

Unit Test Conditions/Comments

POWER REQUIREMENTS VDD = 13.2 V; digital inputs = 0 V or 5 V

I

DD

0.0001 µA typ

0.5 5 µA max I

L

0.0001 µA typ

0.5 5 µA max VL = 5.5 V

4

I

0.0001 µA typ

GND

0.5 5 µA max VL = 5.5 V

1

Temperature range for B Version is −40°C to +85°C.

2

T

= 70°C.

MAX

3

Tested with dual supplies.

4

Guaranteed by design, not subject to production test.

= +5 V, VSS = −5 V, VL = +5 V, GND = 0 V. All specifications T

V

DD

MIN

to T

, unless other wis e noted.

MAX

Table 3.

MIN

1

to T

MAX

Unit Test Conditions/Comments

B Version Parameter 25°C T

ANALOG SWITCH

Analog Signal Range VSS to V

DD

V On Resistance (RON) 7 Ω typ VD = −3.5 V to +3.5 V, IS = −10 mA 12 15 Ω max On Resistance Match Between

Channels (∆R

)

ON

0.3 Ω typ V

= 3.5 V, IS = −10 mA

D

0.5 0.5 Ω max

LEAKAGE CURRENTS

2, 3

Source Off Leakage, IS (Off) ±0.02 nA typ VD = ±4.5, VS = ±4.5; Figure 15 ±0.5 ±2.5 nA max Drain Off Leakage, ID (Off) ±0.02 nA typ VD = 0 V, 5 V, VS = 0 V, 5 V; Figure 15 ±0.5 ±2.5 nA max Channel On Leakage, ID, IS (On) ±0.04 nA typ VD = VS = 0 V, 5 V; Figure 16 ±1 ±5 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

or I

INL

INH

INL

INH

2.4 V min

0.8 V max

0.005 µA typ VIN = V

INL

or V

INH

±0.5 µA max

DYNAMIC CHARACTERISTICS

t

ON

4

160 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V; Figure 17 220 300 ns max t

OFF

60 ns typ RL = 300 Ω, CL = 35 pF, VS = 3 V; Figure 17 140 180 ns max Break-Before-Make Time Delay, tD

50 ns typ R

= 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V; Figure 18

L

(ADG453 Only)

5 5 ns min Charge Injection 10 pC typ VS = 0 V, RS = 0 Ω, CL = 1.0 nF; Figure 19 Off Isolation 65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 20 Channel-to-Channel Crosstalk −76 dB typ

R

= 50 Ω, CL = 5 pF, f = 1 MHz; Figure 21

L

CS (Off) 48 pF typ f = 1 MHz CD (Off) 48 pF typ f = 1 MHz CD, CS (On) 148 pF typ f = 1 MHz

Rev. B | Page 6 of 20

ADG451/ADG452/ADG453

MIN

1

to T

MAX

Unit Test Conditions/Comments

B Version

Parameter 25°C T

POWER REQUIREMENTS VDD = 5.5 V; digital inputs = 0 V or 5 V

I

DD

0.0001 µA typ

0.5 5 µA max I

SS

0.0001 µA typ

0.5 5 µA max I

L

0.0001 µA typ

0.5 5 µA max VL = 5.5 V

4

I

0.0001 µA typ

GND

0.5 5 µA max VL = 5.5 V

1

Temperature range for B Version is −40°C to +85°C.

2

T

= 70°C.

MAX

3

Tested with dual supplies.

4

Guaranteed by design, not subject to production test.

Rev. B | Page 7 of 20

ADG451/ADG452/ADG453

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameters Ratings

VDD to V

SS

VDD to GND −0.3 V to +25 V VSS to GND +0.3 V to −25 V VL to GND −0.3 V to VDD + 0.3 V Analog, Digital Inputs

Continuous Current, S or D 100 mA Peak Current, S or D (pulsed at 1 ms,

10% duty cycle max)

Operating Temperature Range

Industrial (B Version) −40°C to +85°C

Storage Temperature Range −65°C to +150°C Junction Temperature 150°C Plastic DIP Package, Power Dissipation 470 mW

θJA Thermal Impedance 117°C/W Lead Temperature, Soldering (10 s) 260°C

SOIC Package, Power Dissipation 600 mW

θJA Thermal Impedance 77°C/W

TSSOP Package, Power Dissipation 450 mW

θJA Thermal Impedance 115°C/W θJC Thermal Impedance 35°C/W

Lead Temperature, Soldering

Vapor Phase (60 s) 215°C Infrared (15 s) 220°C

ESD 2 kV

1

44 V

VSS −2 V to VDD +2 V or 30 mA, whichever occurs first

300 mA

1

Overvoltages at IN, S, or D are clamped by internal diodes. Current should be

limited to the maximum ratings given.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.

Table 5. Truth Table (ADG451/ADG452)

ADG451 In ADG452 In Switch Condition

0 1 On 1 0 Off

Table 6. Truth Table (ADG453)

Logic Switch 1, 4 Switch 2, 3

0 Off On 1 On Off

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. B | Page 8 of 20

ADG451/ADG452/ADG453

G

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

IN1

D1

2

ADG451/

S1

3

ADG452/

4

V

SS

ADG453

ND

5

TOP VIEW

S4

6

(Not to Scale)

7

D4

IN4

8

Figure 2. Pin Configuration (DIP, SOIC, TSSOP)

Table 7. Pin Function Descriptions

Pin No. Mnemonic Description

1 IN1 Logic Control Input.

2 D1 Drain Terminal. Can be an input or an output.

3 S1 Source Terminal. Can be an input or an output.

4 V

SS

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to

GND. 5 GND Ground (0 V) Reference. 6 S4 Source Terminal. Can be an input or an output. 7 D4 Drain Terminal. Can be an input or an output. 8 IN4 Logic Control Input. 9 IN3 Logic Control Input. 10 D3 Drain Terminal. Can be an input or an output. 11 S3 Source Terminal. Can be an input or an output. 12 V 13 V

L

DD

Logic Power Supply (5 V).

Most Positive Power Supply Potential. 14 S2 Source Terminal. Can be an input or an output. 15 D2 Drain Terminal. Can be an input or an output. 16 IN2 Logic Control Input.

16

IN2 D2

15

S2

14 13

V

DD

V

12

L

S3

11 10

D3 IN3

9

05239-002

Rev. B | Page 9 of 20

ADG451/ADG452/ADG453

TERMINOLOGY

RON

Ohmic resistance between D and S.

, CS (On)

C

D

On switch capacitance.

ΔR

ON

On resistance match between any two channels, that is, R maximum minus R

FLAT(ON)

R

minimum.

ON

Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range.

(Off)

I

S

Source leakage current with the switch off.

(Off)

I

D

Drain leakage current with the switch off.

, IS (On)

I

D

Channel leakage current with the switch on.

(VS)

V

D

Analog voltage on terminals D and S.

(Off)

C

S

Off switch source capacitance.

(Off)

C

D

Off switch drain capacitance.

t

ON

Delay between applying the digital control input and the output switching on. See Figure 17.

t

OFF

Delay between applying the digital control input and the output switching off.

t

D

Off time or on time measured between the 90% points of both switches, when switching from one address state to another. See Figure 18.

Crosstalk

A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance.

Off Isolation

A measure of unwanted signal coupling through an off switch.

Charge Injection

A measure of the glitch impulse transferred from the digital input to the analog output during switching.

Rev. B | Page 10 of 20

ADG451/ADG452/ADG453

TYPICAL PERFORMANCE CHARACTERISTICS

9

8

= +5V

V

–7.5

–4.5

DD

V

= –5V

SS

–1.5

VDD = +13.5V V

SS

VDD = +15V

V

SS

7

6

5

(Ω)

4

ON

R

3

2

1

0

–16.5

–13.5

–10.5

VD OR VS DRAIN OR SOURCE VOLTAGE (V)

Figure 3. On Resistance as a Function of V

7

+85°C

6

TA = 25°C V

= 5V

L

= –13.5V

= –15V

1.5

D

VDD = +16.5V V

= –16.5V

SS

4.5

7.5

10.5

13.5

(VS) for Various Dual Supplies

VDD = +15V

= –15V

V

SS

VL = +5V

16.5

05239-003

10.00

VDD = +15V

= –15V

V

SS

V

= +5V

L

V

= +15V

D

V

= –15V

S

1.00

ID(ON)

0.10

ID(OFF)

LEAKAGE CURRENT (nA)

0.01

IS(OFF)

TEMPERATURE (°C)

Figure 6. Leakage Currents as a Function of Temperature

100k

= +15V

V

DD

V

10k

V

SS

= +5V

L

= –15V

4SW

8525 35 45 55 7565

05239-006

5

+25°C

4

–40°C

(Ω)

ON

3

R

2

1

0

VD OR VS DRAIN OR SOURCE VOLTAGE (V)

Figure 4. On Resistance as a Function of V

with Dual Supplies

16

VDD = 5V

14

V

= 0V

SS

12

10

8

(Ω)

ON

R

6

4

2

0

VDD = 13.5V

= 0V

V

SS

VD OR VS DRAIN OR SOURCE VOLTAGE (V)

V

DD

V

SS

Figure 5. On Resistance as a Function of V

15–15 –10 –5 0 105

(VS) for Different Temperatures

D

TA = 25°C V

= 5V

L

VDD = 16.5V V

= 15V = 0V

(VS) for Various Single Supplies

D

= 0V

SS

180 3 6 9 12 15

05239-004

05239-005

1k

100

(µA)

SUPPLY

I

0.10

0.01

10

1

7. Supply Current vs. Input Switching Frequency

Figure

I+, I

+

FREQUENCY (Hz)

12

VDD = 15V

11

= 0V

V

SS

= 5V

V

L

10

9 8 7 6

(Ω)

ON

5

R

4 3 2 1 0

VD OR VS DRAIN OR SOURCE VOLTAGE (V)

Figure 8. On Resistance as a Function of V

with Single Supplies

I

L

1SW

10M10 100 1k 10k 100k 1M

+85°C

+25°C

–40°C

1602468101214

(VS) for Different Temperatures

D

05239-007

05239-008

Rev. B | Page 11 of 20

ADG451/ADG452/ADG453

0.5

V

= +15V

DD

= –15V

V

SS

0.4

= +25°C

T

A

= +5V

V

L

0.3

0.2

0.1

0

–0.1

–0.2

LEAKAGE CURRENT (nA)

–0.3

–0.4

–0.5

VD OR VS DRAIN OR SOURCE VOLTAGE (V)

Figure 9. Leakage Currents as a Function of V

70

60

ID(ON)

(OFF)

I

S

ID(OFF)

(VS)

D

VDD = +15V

=–15V

V

SS

= +5V

V

L

120

100

80

60

40

CROSSTALK (dB)

20

15–15 –12 –9 –6 –3 0 3 6 9 12

05239-009

0

FREQUENCY (Hz)

VDD = +15V V

= –15V

SS

V

= +5V

L

R

= 50

LOAD

Ω

100M100 1k 10k 100k 10M1M

05239-011

Figure 11. Cross talk vs. Frequency

0

–0.5

VDD = +15V V

= –15V

SS

V

= +5V

L

50

40

30

20

OFF ISOLATION (dB)

10

0

FREQUENCY (MHz)

Figure 10. Off Isolation vs. Frequency

–1.0

–1.5

–2.0

LOSS (dB)

–2.5

–3.0

100110

05239-010

–3.5

FREQUENCY (MHz)

2001 10 100

05239-012

Figure 12. Frequency Response with Switc h On

Rev. B | Page 12 of 20

ADG451/ADG452/ADG453

APPLICATIONS

Figure 13 illustrates a precise, fast, sample-and-hold circuit. An AD845 is used as the input buffer, and the output operational amplifier is an AD711. During track mode, SW1 is closed and the output, V

, follows the input signal, VIN. In hold mode,

OUT

SW1 is opened, and the signal is held by the hold capacitor, C

+15V +5V

C

1000pF

2200pF

CH 2200pF

+15V

AD711

–15V

V

OUT

1213

SW2

+15V

V

IN

AD845

–15V

SD

SW1

75Ω

R

ADG451/ ADG452/

ADG453

45

–15V

Figure 13. Fast, Accurate Sample-and-Hold Circuit

.

H

05239-013

Due to switch and capacitor leakage, the voltage on the hold capacitor decreases with time. The ADG451/ADG452/ADG453 minimize this droop due to their low leakage specifications. The droop rate is further minimized by the use of a polystyrene hold capacitor. The droop rate for the circuit shown is typically 30 µV/µs.

A second switch, SW2, which operates in parallel with SW1, is included in this circuit to reduce pedestal error. Because both switches are at the same potential, they have a differential effect on the op amp, AD711, which minimizes charge injection effects. Pedestal error is also reduced by the compensation network, R

and CC. This compensation network reduces the

C

hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mV over the ±10 V input range. Both the acquisition and settling times are 850 ns.

Rev. B | Page 13 of 20

ADG451/ADG452/ADG453

V

TEST CIRCUITS

I

DS

V

1

SD

V

S

= V1/I

R

ON

DS

Figure 14. On Resistance

V

S

V

IN

0.1µF

05239-014

+15V +5V

0.1µF

V

DD

SD

IN

GND

0.1µF

+15V +5V

–15V

V

L

V

SS

0.1µF

IS(OFF) ID(OFF)

S

SD

Figure 15. Off Leakage

V

C

L

35pF

OUT

V

OUT

R

L

300Ω

Figure 17. Switching Times

3V

ADG451

IN

ADG452

AA

V

D

05239-015

V

S

SD

ID(ON)

A

V

D

05239-016

Figure 16. On Leakage

50%

3V

50% 50%

t

ON

50%

t

OFF

90%90%

05239-017

V

IN1, IN2

V

IN

V

OUT1

OUT2

3V

90%

50%

t

D

90%

IN

0V

50%

90%

t

90%

D

05239-018

V

L

DD

ADG453

S1

S2

S1 D1

S2 D2

V

GND

SS

0.1µF

–15V

R

L2

300Ω

C

L2

35pF

V

OUT2

R

L1

300Ω

C

L1

35pF

V

OUT1

Figure 18. Break-Before-Make Time Delay

Rev. B | Page 14 of 20

ADG451/ADG452/ADG453

V

+15V +5V

V

R

S

V

S

IN

L

SD

V

GND

DD

–15V

C

L

10nF

V

OUT

3V

V

IN

V

OUT

VIN = CL× ∆V

OUT

∆V

OUT

05239-019

Figure 19. Charge Injection

+15V +5V

0.1µF

V

DD

SD

V

S

IN

V

GND

IN

0.1µF

V

L

V

OUT

R

L

50Ω

V

SS

0.1µF

–15V

05239-020

Figure 20. Off Isolation

+15V +5V

0.1µF

V

DD

SD

V

S

OUT

R

50Ω

CHANNEL-TO-CHANNEL CROSSTALK = 20× LOG |VS/V

IN1

SD

L

Figure

GND

0.1µF

21. Channel-to-Channel Crosstalk

V

SS

–15V

0.1µF

L

50Ω

V

IN2

NC

OUT

|

05239-021

Rev. B | Page 15 of 20

ADG451/ADG452/ADG453

OUTLINE DIMENSIONS

10.00 (0.3937)

9.80 (0.3858)

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

16

1

1.27 (0.0500) BSC

0.51 (0.0201)

0.10

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-012AC

Figure 22. 16-lead Small Outline Package [SOIC]

Dimensions shown in millimeters and (inches)

9

6.20 (0.2441)

5.80 (0.2283)

8

1.75 (0.0689)

1.35 (0.0531)

SEATING PLANE

Narrow Body

(R-16)

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.50 (0.0197)

0.25 (0.0098)

8° 0°

0.25 (0.0098)

0.17 (0.0067)

PIN 1

0.210 (5.33)

MAX

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

1.27 (0.0500)

0.40 (0.0157)

0.800 (20.32)

0.790 (20.07)

0.780 (19.81)

16

1

0.100 (2.54) BSC

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001-AB

Figure 24. 16-Lead Plastic Dual In-Line Package [PDIP]

Dimensions shown in inches and (millimeters)

× 45°

9

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

8

0.005 (0.13) MIN

Narrow Body

0.015 (0.38) MIN

SEATING PLANE

(N-16)

5.10

5.00

4.90

0.15

0.05

4.50

4.40

4.30

PIN 1

16

0.65

BSC

COPLANARITY

COMPLIANT TO JEDEC STANDARDS MO-153AB

0.10

0.30

0.19

9

81

1.20 MAX

SEATING PLANE

6.40 BSC

0.20

0.09

Figure 23. 16-lead Thin Shrink Small Outline Package [TSSOP]

(RU-16)

Dimensions shown in inches and (millimeters)

0.325 (8.26)

0.310 (7.87)

MAX

0.300 (7.62)

0.430 (10.92) MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

0.060 (1.52)

0.015 (0.38) GAUGE

PLANE

8° 0°

0.75

0.60

0.45

Rev. B | Page 16 of 20

ADG451/ADG452/ADG453

ORDERING GUIDE

Model Temperature Range Package Description Package Options

ADG451BN −40°C to +85°C 16-Lead Plastic DIP N-16 ADG451BNZ ADG451BR −40°C to +85°C 16-lead SOIC R-16 ADG451BR-REEL −40°C to +85°C 16-lead SOIC R-16 ADG451BR-REEL7 −40°C to +85°C 16-lead SOIC R-16 ADG451BRZ1 −40°C to +85°C 16-lead SOIC R-16 ADG451BRUZ1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG451BRUZ- REEL1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG451BRUZ- REEL71 −40°C to +85°C 16-Lead TSSOP RU-16 ADG451BCHIPS DIE ADG452BN −40°C to +85°C 16-Lead Plastic DIP N-16 ADG452BR −40°C to +85°C 16-lead SOIC R-16 ADG452BR-REEL −40°C to +85°C 16-lead SOIC R-16 ADG452BR-REEL7 −40°C to +85°C 16-lead SOIC R-16 ADG452BRZ1 −40°C to +85°C 16-lead SOIC R-16 ADG452BRZ-REEL1 −40°C to +85°C 16-lead SOIC R-16 ADG452BRZ-REEL71 −40°C to +85°C 16-lead SOIC R-16 ADG452BRUZ1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG452BRUZ-REEL1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG452BRUZ-REEL71 −40°C to +85°C 16-Lead TSSOP RU-16 ADG453BN −40°C to +85°C 16-Lead Plastic DIP N-16 ADG453BR −40°C to +85°C 16-lead SOIC R-16 ADG453BR-REEL −40°C to +85°C 16-lead SOIC R-16 ADG453BR-REEL7 −40°C to +85°C 16-lead SOIC R-16 ADG453BRZ1 −40°C to +85°C 16-lead SOIC R-16 ADG453BRUZ1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG453BRUZ-REEL1 −40°C to +85°C 16-Lead TSSOP RU-16 ADG453BRUZ-REEL71 −40°C to +85°C 16-Lead TSSOP RU-16

1

Z = Pb-free part.

1

−40°C to +85°C 16-Lead Plastic DIP N-16

Rev. B | Page 17 of 20

ADG451/ADG452/ADG453

NOTES

Rev. B | Page 18 of 20

ADG451/ADG452/ADG453

NOTES

Rev. B | Page 19 of 20

ADG451/ADG452/ADG453

NOTES

C05239–0–12/04(B)

Rev. B | Page 20 of 20

Datasheet ADG451 Datasheet (Analog Devices)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAMS

PRODUCT HIGHLIGHTS

SPECIFICATIONS

DUAL SUPPLY

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TERMINOLOGY

TYPICAL PERFORMANCE CHARACTERISTICS

APPLICATIONS

TEST CIRCUITS

OUTLINE DIMENSIONS

ORDERING GUIDE