Datasheet ADG441 Datasheet (ANALOG DEVICES)

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LC2MOS Quad SPST Switches

FEATURES

44 V supply maximum ratings

to VDD analog signal range

V

SS

Low on resistance (<70 Ω) Low ∆RON (9 Ω max) Low R Low power dissipation Fast switching times

Low leakage currents (3 nA max) Low charge injection (6 pC max) Break-before-make switching action Latch-up proof A grade Plug-in upgrade for DG201A/ADG201A, DG202A/ADG202A,

Plug-in replacement for DG441/DG442/DG444

APPLICATIONS

Audio and video switching Automatic test equipment Precision data acquisition Battery-powered systems Sample-and-hold systems Communication systems

GENERAL DESCRIPTION

The ADG441, ADG442, and ADG444 are monolithic CMOS devices that comprise of four independently selectable switches. They are designed on an enhanced LC provides low power dissipation yet gives high switching speed and low on resistance.

The on resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. High switching speed also makes the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments. The ADG441, ADG442, and ADG444 contain four independent SPST switches. Each switch of the ADG441 and ADG444 turns on when a logic low is applied to the appropriate control input. The ADG442 switches are turned on with logic high on the appropriate control input. The ADG441 and ADG444 switches

match (3 Ω max)

ON

< 110 ns

t

ON

t

< 60 ns

OFF

DG211/ADG211A

2

MOS process that

ADG441/ADG442/ADG444

FUNCTIONAL BLOCK DIAGRAM

S1

IN1

IN2

ADG441 ADG444

IN3

IN4

SWITCHES SHOWN FOR A LOGIC 1 INPUT

IN1

D1 S2

IN2

D2 S3

IN3

D3 S4

IN4

D4

Figure 1.

ADG442

differ in that the ADG444 requires a 5 V logic power supply that is applied to the V have a V

pin, the logic power supply is generated internally by

L

pin. The ADG441 and ADG442 do not

L

an on-chip voltage generator.

Each switch conducts equally well in both directions when ON and has an input signal range that extends to the power supplies. In the OFF condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is the low charge injection for minimum transients when switching the digital inputs.

PRODUCT HIGHLIGHTS

1. Extended signal range. The ADG441A/ADG442A/

ADG444A are fabricated on an enhanced LC isolated process, giving an increased signal range that extends to the supply rails.

2. Low power dissipation.

3. Low R

4. Trench isolation guards against latch-up for A grade parts. A

dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions.

5. Break-before-make switching. This prevents channel

shorting when the switches are configured as a multiplexer.

6. Single-supply operation. For applications where the analog

signal is unipolar, the ADG441/ADG442/ADG444 can be operated from a single-rail power supply. The parts are fully specified with a single 12 V power supply.

ON

.

S1

D1 S2

D2 S3

D3 S4

D4

2

MOS, trench-

05233-001

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG441/ADG442/ADG444

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REVISION HISTORY

5/05—Data Sheet Changed from Rev. 0 to Rev. A

Changes to Format ............................................................. Universal

Deleted CERDIP Package and T Grade ..........................Universal

Changes to Features and Product Highlights ............................... 1

Changes to Test Conditions in Table 2 .......................................... 4

Changes to Figure 11........................................................................ 8

Changes to Trench Isolation Section ........................................... 12

Updated Outline Dimensions....................................................... 13

Changes to Ordering Guide.......................................................... 14

Test Ci r c ui t s ........................................................................................9

Te r mi n ol o g y .................................................................................... 11

Trench Is o latio n .............................................................................. 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 14

4/94–Revision 0: Initial Version

Rev. A | Page 2 of 16

ADG441/ADG442/ADG444

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SPECIFICATIONS

DUAL SUPPLY

VDD = +15 V ± 10%, VSS = −15 V ± 10%, VL = +5 V ± 10% (ADG444), GND = 0 V, unless otherwise noted.

Table 1.

B Version Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS to VDD V RON 40 Ω typ VD = ±8.5 V, IS = −10 mA 70 85 Ω max VDD = +13.5 V, VSS = −13.5 V ∆RON 4 Ω typ −8.5 V ≤ VD ≤ +8.5 V 9 Ω max

RON Match 1 Ω typ VD = 0 V, IS = −10 mA 3 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V

Source OFF Leakage IS (OFF) ±0.01 nA typ

±0.5 ±3 nA max See Figure 15

Drain OFF Leakage ID (OFF) ±0.01 nA typ

±0.5 ±3 nA max See Figure 15

Channel ON Leakage ID, IS (ON) ±0.08 nA typ VS = VD = ±15.5 V ±0.5 ±3 nA max See Figure 16 DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current

I

or I

INL

±0.5 µA max DYNAMIC CHARACTERISTICS

tON 85 ns typ RL = 1 kΩ, CL = 35 pF;

110 170 ns max VS = ±10 V; see Figure 17

t

45 ns typ RL = 1 kΩ, CL = 35 pF;

OFF

60 80 ns max VS = ±10 V; see Figure 17

t

30 ns typ RL = 1 kΩ, CL = 35 pF;

OPEN

Charge Injection 1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF;

6 pC max VDD = +15 V, VSS = –15 V; see Figure 18

OFF Isolation 60 dB typ RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 19

Channel-to-Channel Crosstalk 100 dB typ RL = 50 Ω, CL = 5 pF; f= 1 MHz; see Figure 20

CS (OFF) 4 pF typ f = 1 MHz

CD (OFF) 4 pF typ f = 1 MHz

CD, CS (ON) 16 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V

I

DD

ADG441/ADG442 80 µA max ADG444 0.001 µA typ

1 2.5 µA max

ISS 0.0001 µA typ 1 2.5 µA max

IL (ADG444 Only) 0.001 µA typ VL = 5.5 V 1 2.5 µA max

1

Temperature range is: B Version: −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

1

2.4 V min

INH

0.8 V max

INL

±0.00001 µA typ VIN = V

INH

2

Digital Inputs = 0 V or 5 V

= ±15.5 V, VS = ∓15.5 V

V

D

= ±15.5 V, VS = ∓15.5 V

V

D

or V

INH

INL

Rev. A | Page 3 of 16

ADG441/ADG442/ADG444

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SINGLE SUPPLY

1

VDD = +12 V ± 10%, VSS = 0 V, VL = +5 V ± 10% (ADG444), GND = 0 V, unless otherwise noted.

Table 2.

B Version

Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 to VDD V RON 70 Ω typ VD = +3 V, +8 V, IS = −5 mA 110 130 Ω max VDD = 10.8 V ∆RON 4 Ω typ 3 V ≤ VD ≤ 8 V 9 Ω max RON Match 1 Ω typ VD = +6 V, IS = −5 mA 3 Ω max

LEAKAGE CURRENT VDD = 13.2 V

Source OFF Leakage IS (OFF) ±0.01 nA typ VD = 12.2 V/1 V, VS = 1 V/12.2 V ±0.5 ±3 nA max See Figure 15 Drain OFF Leakage ID (OFF) ±0.01 nA typ VD = 12.2 V/1 V, VS = 1 V/12.2 V ±0.5 ±3 nA max See Figure 15 Channel ON Leakage ID, IS (ON) ±0.08 nA typ VS = VD = 12.2 V/1 V ±0.5 ±3 nA max Figure 16

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V

2.4 V min

INH

0.8 V max

INL

Input Current

I

or I

±0.00001 µA typ VIN = V

INL

INH

INL

or V

INH

±0.5 µA max DYNAMIC CHARACTERISTICS

2

tON 105 ns typ RL = 1 kΩ, CL = 35 pF 150 220 ns max VS = 8 V; Figure 17 t

40 ns typ RL = 1 kΩ, CL = 35 pF

OFF

60 100 ns max VS = 8 V; Figure 17 t

50 ns typ RL = 1 kΩ, CL = 35 pF

OPEN

Charge Injection 2 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF 6 pC max VDD = 12 V, VSS = 0 V; see Figure 18 OFF Isolation 60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19 Channel-to-Channel Crosstalk 100 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20 CS (OFF) 7 pF typ f = 1 MHz CD (OFF) 10 pF typ f = 1 MHz CD, CS (ON) 16 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 13.2 V

IDD Digital Inputs = 0 V or 5 V

ADG441/ADG442 80 µA max ADG444 0.001 µA typ

1 2.5 µA max IL (ADG444 Only) 0.001 µA typ VL = 5.5 V

1 2.5 µA max

1

Temperature range is: B Version: −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Rev. A | Page 4 of 16

ADG441/ADG442/ADG444

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ABSOLUTE MAXIMUM RATINGS

TA = 25°C unless otherwise noted.

Table 3.

Parameter Rating

VDD to V

SS

VDD to GND −0.3 V to +25 V VSS to GND +0.3 V to −25 V VL to GND −0.3 V to VDD + 0.3 V Analog, Digital Inputs VSS − 2 V to VDD + 2 V or 30 mA, Whichever Occurs First Continuous Current, S or D 30 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) 100 mA Operating Temperature Range

Industrial (B Version) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C Lead Temperature, Soldering (10 sec) 300°C Plastic Package, Power Dissipation 470 mW θJA, Thermal Impedance 177°C/W Lead Temperature, Soldering (10 sec) 260°C SOIC Package, Power Dissipation 600 mW θJA, Thermal Impedance 77°C/W Lead Temperature, Soldering

Vapor Phase (60 sec) 215°C

Infrared (15 sec) 220°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.

44 V

Table 4. Truth Table

ADG441/ADG444 IN ADG442 IN Switch Condition

0 1 ON 1 0 OFF

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. A | Page 5 of 16

ADG441/ADG442/ADG444

G

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

IN1

1

D1

2

S1

3

ADG441

4

V

SS

ADG442

ND

5

TOP VIEW

(Not to Scale)

S4

6

D4

7

IN4

8

NC = NO CONNECT

Figure 2. ADG441/ADG442 (DIP/SOIC)

IN2

16

D2

15

S2

14 13

V

DD

NC

12

S3

11

D3

10

IN3

9

05233-002

V

IN1

D1 S1

SS

ND

S4 D4

IN4

1 2 3

ADG444

4

TOP VIEW

(Not to Scale)

5 6 7 8

16

IN2 D2

15

S2

14 13

V V

12

S3

11 10

D3 IN3

9

Figure 3. ADG444 (DIP/SO IC)

DD L

05233-003

Table 5. ADG441/ADG442 Pin Function Descriptions

Pin No. Mnemonic Description

1, 8, 9, 16 IN1 to IN4 Logic Control Input. 2, 7, 10, 15 D1 to D4

Drain Terminal. May be an input or output.

3, 6, 11, 14 S1 to S4

Source Terminal. May be an input or output.

4 V

SS

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,

it may be connected to ground. 5 GND Ground (0 V) Reference. 12 NC No Connect. 13 V

DD

Most Positive Power Supply Potential.

Table 6. ADG444 Pin Function Descriptions

Pin No. Mnemonic Description

1, 8, 9, 16 IN1 to IN4 Logic Control Input. 2, 7, 10, 15 D1 to D4

Drain Terminal. May be an input or output.

3, 6, 11, 14 S1 to S4

Source Terminal. May be an input or output.

4 V

SS

Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,

it may be connected to ground. 5 GND Ground (0 V) Reference. 12 V 13 V

L

DD

Logic Power Supply (5 V).

Most Positive Power Supply Potential.

Rev. A | Page 6 of 16

ADG441/ADG442/ADG444

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TYPICAL PERFORMANCE CHARACTERISTICS

(Ω) R

ON

100

80

60

TA = 25°C

VDD = +12V

= –12V

V

SS

VDD = +10V

= –10V

V

SS

VDD = +5V V

= –5V

SS

0.02

0.01

= +15V

V

DD

V

= –15V

SS

T

= 25°C

A

0

ID (ON)

I

D

I

S

(OFF)

40

VDD = +15V V

= –15V

SS

20

VD (VS) (V)

Figure 4. R

170

150

130

110

90

(Ω)

ON

R

70

50

30

10

Figure 5. R

as a Function of VD (VS): Dual Supply

ON

VDD = 5V V

= 0V

SS

VDD = 10V

V

= 0V

SS

VDD = 15V V

= 0V

SS

VD (VS) (V)

as a Function of VD (VS): Single Supply

ON

TA = 25°C

VDD = 12V V

15–15 –10 –5 0 5 10

05233-005

= 0V

SS

15036912

05233-006

–0.01

LEAKAGE CURRENT (nA)

–0.02

dB

VS (VD) (V)

Figure 7. Leakage Currents as a Function of V

120

110

100

90

80

OFF ISOLATION

70

60

50

FREQUENCY (Hz)

Figure 8. Crosstalk and Off Isolation vs. Frequency

CROSSTALK

(VD)

S

VDD = +15V

V

= –15V

SS

15–15 –10 –5 0 5 10

05233-008

10M1k 10k 100k 1M

05233-009

(Ω)

ON

R

100

80

60

40

20

Figure 6. R

25°C

VD (VS) (V)

as a Function of VD (VS) for Different Temperatures

ON

85°C

V V

DD SS

= +15V = –15V

125°C

15–15 –10 –5 0 5 10

05233-007

Rev. A | Page 7 of 16

120

VDD = 12V V

= 0V

SS

100

80

)

Ω

(

ON

R

60

40

20

25°C

Figure 9. R

as a Function of VD (VS) for Different Temperatures

ON

85°C

VD (VS) (V)

125°C

120246810

05233-010

ADG441/ADG442/ADG444

www.BDTIC.com/ADI

0.010 VDD = 12V

V

= 0V

SS

T

= 25°C

A

0.005

I

D

(ON)

IS (OFF)

120

100

V

= 8V

IN

t

ON

–0.005

LEAKAGE CURRENT (nA)

–0.010

–10

–20

CHARGE INJECTION (pC)

–30

–40

0

ID (OFF)

VS, VD (V)

Figure 10. Leakage Currents as a Function of V

40

TA = 25°C

30

20

10

0

V V

= +15V

DD

= –15V

SS

VS (V)

Figure 11. Charge Injection vs. Source Voltage

80

t (ns)

60

t

OFF

120246810

05233-011

(VD)

S

= 12V

V

DD

V

= 0V

SS

15–15–12–9–6–3036912

05233-012

40

SUPPLY VOLTAGE (V)

±20±10 ±12 ±14 ±16 ±18

05233-013

Figure 12. Switching Time vs. Bipolar Supply

160

140

120

100

t (ns)

80

60

40

20

t

ON

t

OFF

SUPPLY VOLTAGE (V)

= 8V

V

IN

20810 1412 16 18

05233-014

Figure 13. Switching Time vs. Single Supply

Rev. A | Page 8 of 16

ADG441/ADG442/ADG444

V

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TEST CIRCUITS

I

DS

V1

SD

S

R

= V1/I

ON

DS

Figure 14. On Resistance

V

S

05233-015

+15V +5V

0.1µF

V

DD

SD

IN

GND

IS (OFF) ID (OFF)

A

S

Figure 15. Off Leakage

0.1µF

V

L

V

C

L

35pF

OUT

V

OUT

R

L

1kΩ

V

SS

SD

3V

V

IN

ADG441/ADG444

V

IN

ADG442

A

V

D

05233-016

50%

3V

50% 50%

V

S

50%

SD

Figure 16. On Leakage

90%90%

ID (ON)

A

V

D

05233-017

0.1µF

–15V

t

ON

t

OFF

05233-018

Figure 17. Switching Times

+15V +5V

V

L

R

S

V

S

DD

SD

IN

GND

–15V

V

OUT

C

L

1nF

V

SS

3V

V

IN

V

OUT

Q

= CL× ∆V

INJ

OUT

∆V

OUT

05233-019

Figure 18. Charge Injection

Rev. A | Page 9 of 16

ADG441/ADG442/ADG444

V

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+15V +5V

0.1µF

V

DD

SD

V

S

IN

V

GND

IN

0.1µF

V

SS

V

SS

R 50Ω

+15V +5V

0.1µF

V

DD

V

OUT

L

V

OUT

50Ω

V

S

R

L

SD

IN1

GND

0.1µF

V

SS

V

SS

50Ω

V

IN2

NC

0.1µF

–15V

Figure 19. Off Isolation

05233-021

CHANNEL-TO-CHANNEL CROSSTALK = 20× LOG |VS/V

Figure 20. Channel-to-Channel Crosstalk

0.1µF

–15V

OUT

|

05233-022

Rev. A | Page 10 of 16

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TERMINOLOGY

R

ON

Ohmic resistance between D and S.

Match

R

ON

Difference between the R

(OFF)

I

S

of any two channels.

ON

Source leakage current with the switch OFF.

I

(OFF)

D

Drain leakage current with the switch OFF.

I

, IS (ON)

D

Channel leakage current with the switch ON.

V

(VS)

D

Analog voltage on Terminals D, S.

C

(OFF)

S

OFF switch source capacitance.

C

(OFF)

D

OFF switch drain capacitance.

t

ON

Delay between applying the digital control input and the output switching on.

t

OFF

Delay between applying the digital control input and the output switching off.

t

OPEN

Break-before-make delay when switches are configured as a multiplexer.

Crosstalk A me

asure of unwanted signal which is coupled through from

one channel to another as a result of parasitic capacitance.

Off Isolation A meas

ure of unwanted signal coupling through an OFF switch.

Charge Injection

A me

asure of the glitch impulse transferred from the digital

input to the analog output during switching.

C

, CS (ON)

D

ON switch capacitance.

Rev. A | Page 11 of 16

ADG441/ADG442/ADG444

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TRENCH ISOLATION

In the ADG441A, ADG442A, and ADG444A, an insulating oxide layer (trench) is placed between the NMOS and the PMOS transistors of each CMOS switch. Parasitic junctions, which occur between the transistors in junction isolated switches, are eliminated, and the result is a completely latch-up proof switch.

NMOS PMOS

LOCO

In junction isolation, the N and P wells of the PMOS and NMOS transistors form a diode that is reverse-biased under normal operation. However, during overvoltage conditions, this diode becomes forward-biased. A silicon-controlled rectifier (SCR) type circuit is formed by the two transistors causing a significant amplification of the current which, in turn, leads to latch-up. With trench isolation, this diode is removed, and the result is a latch-up proof switch.

P-WELL N-WELL

TRENCH

BURIED OXIDE LAYER

SUBSTRATE (BACK GATE)

Figure 21. Trench Isolation

05233-004

Rev. A | Page 12 of 16

ADG441/ADG442/ADG444

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OUTLINE DIMENSIONS

0.785 (19.94)

0.765 (19.43)

0.745 (18.92)

16 1

0.100 (2.54) BSC

0.015 (0.38)

0.180 (4.57) MAX

0.150 (3.81)

0.130 (3.30)

0.110 (2.79)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

COMPLIANT TO JEDEC STANDARDS MO-095AC

0.060 (1.52)

0.050 (1.27)

0.045 (1.14)

Figure 22. 16-Lead Plastic Dual In-Line Package [PDIP]

Dimensions shown in inches and (millimeters)

10.00 (0.3937)

9.80 (0.3858)

9 8

MIN

(N-16)

0.295 (7.49)

0.285 (7.24)

0.275 (6.99)

SEATING PLANE

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.015 (0.38)

0.010 (0.25)

0.008 (0.20)

0.150 (3.81)

0.135 (3.43)

0.120 (3.05)

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

16

1

1.27 (0.0500) BSC

0.51 (0.0201)

0.10

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-012AC

9

6.20 (0.2441)

5.80 (0.2283)

8

1.75 (0.0689)

1.35 (0.0531)

SEATING PLANE

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0197)

0.25 (0.0098)

8° 0°

1.27 (0.0500)

0.40 (0.0157)

× 45°

Figure 23. 16-Lead Standard Small Outline Package [SOIC]

(R-16)

Dimensions shown in millimeters and (inches)

Rev. A | Page 13 of 16

ADG441/ADG442/ADG444

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ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADG441BN −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG441BR −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG441BR-REEL −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG441BRZ ADG441BRZ-REEL1 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG441BCHIPS DIE ADG441ABCHIPS ADG441ABN2 −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG441ABR2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG441ABR-REEL2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG441ABRZ-REEL ADG442BN −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG442BR −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442BR-REEL −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442BRZ1 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442BRZ-REEL1 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442ABN2 −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG442ABR2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442ABR-REEL2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG442ABRZ ADG442ABRZ-REEL ADG444BN −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG444BR −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444BR-REEL −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444BRZ1 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444BRZ-REEL1 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444ABN2 −40°C to +85°C 16-Lead Plastic Dual In-Line Package (PDIP) N-16 ADG444ABR2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444ABR-REEL2 −40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16 ADG444ABRZ ADG444ABRZ-REEL

1

Z = Pb-free part.

2

A = Trench isolated.

1

2

1, 2

−40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16

DIE

−40°C to +85°C 16-Lead Standard Small Outline Package (SOIC) R-16

Rev. A | Page 14 of 16

ADG441/ADG442/ADG444

www.BDTIC.com/ADI

NOTES

Rev. A | Page 15 of 16

ADG441/ADG442/ADG444

www.BDTIC.com/ADI

NOTES

C00396–0–5/05(A)

Rev. A | Page 16 of 16

Datasheet ADG441 Datasheet (ANALOG DEVICES)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

DUAL SUPPLY

SINGLE SUPPLY

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

TEST CIRCUITS

TERMINOLOGY

TRENCH ISOLATION

OUTLINE DIMENSIONS

ORDERING GUIDE