Datasheet ADG436BR, ADG436BN Datasheet (Analog Devices)

Page 1
a
Dual SPDT Switch
ADG436
FEATURES 44 V Supply Maximum Ratings V
to VDD Analog Signal Range
SS
Low On Resistance (12 Typ) Low ⌬R Low R Low Power Dissipation Fast Switching Times
t
t Low Leakage Currents (5 nA Max) Low Charge Injection (10 pC) Break-Before-Make Switching Action
APPLICATIONS Audio and Video Switching Battery Powered Systems Test Equipment Communications Systems
GENERAL DESCRIPTION
(3 Max)
ON
Match (2.5 Max)
ON
< 175 ns
ON
< 145 ns
OFF
The ADG436 is a monolithic CMOS device comprising two independently selectable SPDT switches. It is designed on an
2
MOS process which provides low power dissipation yet
LC gives high switching speed and low on resistance.
The on resistance profile is very flat over the full analog input range ensuring good linearity and low distortion when switching audio signals. High switching speed also makes the part suitable for video signal switching. CMOS construction ensures ultralow power dissipation making the part ideally suited for portable and battery powered instruments.
Each switch conducts equally well in both directions when ON and has an input signal range which extends to the power sup­plies. In the OFF condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching ac­tion for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

FUNCTIONAL BLOCK DIAGRAM

S1A
D1
S1B
IN1
ADG436

PRODUCT HIGHLIGHTS

1. Extended Signal Range The ADG436 is fabricated on an enhanced LC
S2A
D2
S2B
IN2
2
MOS pro­cess, giving an increased signal range which extends to the supply rails.
2. Low Power Dissipation
3. Low R
ON
4. Single Supply Operation For applications where the analog signal is unipolar, the ADG436 can be operated from a single rail power supply.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998
Page 2
ADG436–SPECIFICATIONS
1

Dual Supply

(VDD = +15 V, VSS = –15 V, GND = 0 V, unless otherwise noted)
–40C to Test Conditions/
Parameter +25ⴗC +85ⴗC Units Comments
ANALOG SWITCH
Analog Signal Range V R
ON
12 typ VD = ±10 V, I
SS
to V
DD
V
25 max
R
ON
1 typ V
= –5 V, 5 V, IS = –10 mA
D
3 max
Match 1 typ VD = ±10 V, I
R
ON
2.5 max
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ±0.005 nA typ VD = ±15.5 V, VS = ±15.5 V
S
= +16.5 V, VSS = –16.5 V
DD
±0.25 ±5 nA max Test Circuit 2
Channel ON Leakage I
(ON) ±0.05 nA typ V
D
S
S
= V
= ±15.5 V
D
, I
±0.4 ±5 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INL
INH
2.4 V min
0.8 V max
Input Current
I
INL
or I
INH
±0.005 µA typ V
= 0 V or V
IN
±0.5 µA max
OPEN
2
70 ns typ R
125 ns max V
60 ns typ R
120 ns max V
10 ns min R
= 300 , C
L
= ±10 V; Test Circuit 4
S
= 300 , C
L
= ±10 V; Test Circuit 4
S
= 300 , C
L
= +5 V; Test Circuit 5
V
S
= 0 V, R
D
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Delay, t
Charge Injection 10 pC typ V
Test Circuit 6
OFF Isolation 72 dB typ R
Channel-to-Channel Crosstalk 90 dB typ R
(OFF) 10 pF typ
C
S
= 75 , C
L
= 2.3 V rms, Test Circuit 7
V
S
= 75 , C
L
= 2.3 V rms, Test Circuit 8
V
S
CD, CS (ON) 30 pF typ
POWER REQUIREMENTS
I
DD
0.05 mA typ Digital Inputs = 0 V or 5 V
0.35 mA max
I
SS
0.01 µA typ 15 µA max
VDD/V
SS
NOTES
1
Temperature range is as follows: B Version, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
±3/±20 V min/V max |V
| = |VSS|
DD
= –1 mA
S
= –10 mA
S
DD
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 0 , C
D
= 5 pF, f = 1 MHz;
L
= 5 pF, f = 1 MHz;
L
= 10 nF;
L
REV. A–2–
Page 3
ADG436

Single Supply

(VDD = +12 V, VSS = 0 V, GND = 0 V, unless otherwise noted)
–40C to Test Conditions/
Parameter +25ⴗC +85ⴗC Units Comments
ANALOG SWITCH
Analog Signal Range 0 to V R
ON
20 typ V
DD
V
= +1 V, +10 V, IS = –1 mA
D
40 max
R
Match 2.5 max
ON
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ±0.005 nA typ V
S
= +13.2 V
DD
= 12.2 V/1 V, VS = 1 V/12.2 V
D
±0.25 ±5 nA max Test Circuit 2
Channel ON Leakage I
(ON) ±0.05 nA typ V
D
S
= VD = 12.2 V/1 V
S
, I
±4 ±5 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INL
INH
2.4 V min
0.8 V max
Input Current
I
INL
or I
INH
±0.005 µA typ V
= 0 V or V
IN
±0.5 µA max
OPEN
2
100 ns typ R
200 ns max V
90 ns typ R
180 ns max V
10 ns typ R
= 300 , C
L
= +8 V; Test Circuit 4
S
= 300 , C
L
= +8 V; Test Circuit 4
S
= 300 , C
L
= +5 V; Test Circuit 5
V
S
= 6 V, R
D
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Delay, t
Charge Injection 10 pC typ V
Test Circuit 6
OFF Isolation 72 dB typ R
Channel-to-Channel Crosstalk 90 dB typ R
(OFF) 10 pF typ
C
S
= 75 , C
L
= 1.15 V rms; Test Circuit 7
V
S
= 75 , C
L
= 1.15 V rms, Test Circuit 8
V
S
CD, CS (ON) 30 pF typ
POWER REQUIREMENTS V
I
DD
0.05 mA typ Digital Inputs = 0 V or 5 V
= +13.5 V
DD
0.35 mA max
V
DD
NOTES
1
Temperature range is as follows: B Version, – 40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
+3/+30 V min/V max
DD
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 0 , C
D
= 5 pF, f = 1 MHz;
L
= 5 pF, f = 1 MHz;
L
= 10 nF;
L
REV. A
–3–
Page 4
ADG436
WARNING!
ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(T
= +25°C unless otherwise noted)
A
1
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –30 V
V
SS
Analog, Digital Inputs
2
. . . . . . . . . . . VSS – 2 V to VDD + 2 V
or 20 mA, whichever occurs first
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
(Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +125°C
SOIC Package
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W
θ
JA
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package
, Thermal Impedance . . . . . . . . . . . . . . . . . . . 117°C/W
θ
JA
Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG436 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Table I. Truth Table
Logic Switch A Switch B
0 OFF ON 1 ON OFF

ORDERING GUIDE

Temperature Package Package
Model Range Descriptions Options
ADG436BN – 40°C to +85°C Plastic DIP N-16 ADG436BR – 40°C to +85°C 0.15" SOIC R-16A
REV. A–4–
Page 5

TERMINOLOGY

ADG436
V
DD
V
SS
Most positive power supply potential. Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground. GND Ground (0 V) reference. S Source terminal. May be an input or output. D Drain terminal. May be an input or output. IN Logic control input. R
R
ON
ON
Ohmic resistance between D and S.
RON variation due to a change in the analog
input voltage with a constant load current. R
Match Difference between the RON of any two channels.
ON
I
(OFF) Source leakage current with the switch “OFF.”
S
I
, IS (ON) Channel leakage current with the switch “ON.”
D
V
(VS) Analog voltage on terminals D, S.
D
C
(OFF) “OFF” switch source capacitance.
S
C
, CS (ON) “ON” switch capacitance.
D
t
ON
Delay between applying the digital control
input and the output switching on.
PIN CONFIGURATION
(DIP/SOIC)
t
OFF
Delay between applying the digital control input and the output switching off.
t
OPEN
Break-before-make delay when switches are
configured as a multiplexer. V V I
INL
INH
INL
(I
INH
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
) Input current of the digital input.
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance. Off Isolation A measure of unwanted signal coupling
through an “OFF” switch. Charge Injection A measure of the glitch impulse transferred
from the digital input to the analog output
during switching. I
DD
I
SS
Positive supply current.
Negative supply current.
IN1
1
S1A
2
D1
3
S1B
4
V
5
SS
(Not to Scale)
GND
6
NC
7
NC
8
NC = NO CONNECT
ADG436
TOP VIEW
NC
16
NC
15
NC
14
V
13
DD
S2B
12
D2
11
S2A
10
IN2
9
REV. A –5–
Page 6
VD, VS – Volts
R
ON
V
16
14
6 –15 –10 15
–5 0 5 10
12
10
8
VDD = +16.5V V
SS
= –16.5V
+858C
+258C
–408C
ADG436–Typical Performance Characteristics
26
TA = +258C
22
18
V
ON
14
R
10
6 –15 –10 15
VDD = +5V V
SS
VDD = +10V V
VDD = +15V
= –15V
V
SS
–5 0 5 10
VD, VS – Volts
= –5V
SS
= –10V
Figure 1. RON as a Function of VD (VS): Dual Supply
20
18
16
V
ON
14
R
12
10
03 156912
VD, VS – Volts
+858C
+258C
–408C
V
DD
V
SS
= +16.5V = 0V
Figure 4. RON as a Function of VD (VS) for Different Temperatures: Single Supply
50
45
40
35
30
V
ON
R
25
20
15
10
03 15
VDD = +5V
= 0V
V
SS
VDD = +10V
= 0V
V
SS
VDD = +15V
= 0V
V
SS
6912
VD, VS – Volts
Figure 2. RON as a Function of VD (VS): Single Power Supply
0.01 VDD = +16.5V
= –16.5V
V
SS
= +258C
T
A
0
–0.01
(ON) – nA
D
I
–0.02
–0.03
–15 –10 15
–5 0 5 10
VD, VS – Volts
Figure 5. ID (ON) Leakage Current as a Function of V
(VS): Dual Supply
D
Figure 3. RON as a Function of VD (VS) for Different Temperatures: Dual Supply
0.01 VDD = +16.5V
= –16.5V
V
SS
= +258C
T
A
0
–0.01
(OFF) – nA
S
I
–0.02
–0.03
–15 –10 15
–5 0 5 10
VD, VS – Volts
Figure 6. IS (OFF) Leakage Current as a Function of V
(VS): Dual Supply
D
0.01 VDD = +16.5V
= –16.5V
V
SS
= +258C
T
A
0
–0.01
(ON) – nA
S
I
–0.02
–0.03
–15 –10 15
Figure 7. IS (ON) Leakage Current as a Function of V
–5 0 5 10
VD, VS – Volts
(VS): Dual Supply
D
160
VD = 2V
= –2V
V
S
140
120
100
SWITCHING TIME – ns
80
60
05
10 15 20
VD, VS – Volts
Figure 8. Switching Time as a Func­tion of V
(VS): Dual Supply
D
–6–
1
V
= +16.5V
DD
= –16.5V
V
SS
0.8
= +258C
T
A
0.6
– mA
DD
I
0.4
0.2
0
0 200 1000400 600 800
SWITCHING FREQUENCY – kHz
Figure 9. IDD as a Function of Switch­ing Frequency: Dual Supply
REV. A
Page 7
I
V
D
S
D
A
ID(ON)
NC
NC = NO CONNECT
DS
V
1
S
RON = V1/I
D
DS
V
D
Test Circuit 1. On Resistance
0.1mF
V
DD
–10V
V
S
+10V
SB
SA
IN
GND
0.1mF
V
SB
S
SA
IN
GND
Test Circuits–
ADG436
IS(OFF)
A
V
S
Test Circuit 2. Off Leakage
V
DD
D
R 300V 35pF
V
SS
V
SS
V
DD0.1mF
V
DD
D
V
SS
C
L
Test Circuit 4. Switching Times
R
L
300V 35pF
S
D
V
D
Test Circuit 3. On Leakage
3V
V
V
OUT
IN
0V
+10V
V
0V
L
S
–10V
3V
V
OUT
C
L
V
0V V
S
IN
V
OUT
t
OPEN
50% 50%
t
OFF
t
ON
50% 50%
50%
0.1mF V
SS
Test Circuit 5. Break-Before-Make Delay, t
V
DD
V
DD
V
C
L
10nF
OUT
R
D
V
D
DSA
IN
GND
V
SS
V
SS
Test Circuit 6. Charge Injection
0.1mF
V
DD
V
DD
V
OUT
DS
R
V
S
REV. A –7–
V
IN
GND
0.1mF
Test Circuit 7. Off Isolation
V
SS
V
SS
75V
L
OPEN
3V
V
IN
0V
V
OUT
0V
V
S
V
IN1
NC
CHANNEL-TO-CHANNEL CROSSTALK 20 3 Log |V
S/VOUT
|
Q
= CL 3 DV
INJ
0.1mF
GNDDSV
0.1mF
OUT
V
DD
V
DD
SD
SS
V
DV
OUT
75V
V
IN2
SS
Test Circuit 8. Channel-to-Channel Crosstalk
R 75V
V
OUT
L
Page 8
ADG436
16 9
81
0.3937 (10.00)
0.3859 (9.80)
0.2550 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (5.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0500 (1.27)
BSC
0.0099 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8° 0°
0.0196 (0.50)
0.0099 (0.25)
x 45°

APPLICATIONS INFORMATION

ADG436 Supply Voltages
The ADG436 can operate from a dual or single supply. V
should
SS
be connected to GND when operating with a single supply. When using a dual supply, the ADG436 can also operate with unbal­anced supplies, for example V only restrictions are that V
to GND must not drop below –30 V and VDD to V
V
SS
= 20 V and VSS = –5 V. The
DD
to GND must not exceed 30 V,
DD
SS
must not exceed +44 V. It is important to remember that the ADG436 supply voltage directly affects the input signal range, the switch ON resistance and the switching times of the part. The effects of the power supplies on these characteristics can be clearly seen from the characteristic curves in this data sheet.
OUTLINE DIMENSIONS
Dimensions are shown in inches and (mm).
16-Lead Plastic DIP
(N-16)
0.840 (21.33)
0.745 (18.93)
0.210 (5.33) MAX
0.160 (4.06)
0.115 (2.93)
16
18
PIN 1
0.022 (0.558)
0.014 (0.356)
0.100 (2.54)
BSC
9
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
0.280 (7.11)
0.240 (6.10)
0.130 (3.30) MIN
SEATING PLANE
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
Power-Supply Sequencing
When using CMOS devices, care must be taken to ensure correct power-supply sequencing. Incorrect power-supply sequencing can result in the device being subjected to stresses beyond those maximum ratings listed in the data sheet. Always sequence V
DD
on first followed by VSS and the logic signals. An external signal can then be safely presented to the source or drain of the switch.
16-Lead Narrow Body SOIC
(R-16A)
C2108a–0–11/98
PRINTED IN U.S.A.
REV. A–8–
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