FEATURES
44 V Supply Maximum Ratings
VSS to VDD Analog Signal Range
Low On Resistance (< 35 ⍀)
Ultralow Power Dissipation (< 35 W)
Fast Transition Time (160 ns max)
Break-Before-Make Switching Action
Plug-In Replacement for DG419
APPLICATIONS
Precision Test Equipment
Precision Instrumentation
Battery Powered Systems
Sample Hold Systems
GENERAL DESCRIPTION
The ADG419 is a monolithic CMOS SPDT switch. This
switch is designed on an enhanced LC
vides low power dissipation yet gives high switching speed, low
on resistance and low leakage currents.
The on resistance profile of the ADG419 is very flat over the full
analog input range, ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal
bandwidth. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery
powered instruments.
Each switch of the ADG419 conducts equally well in both
directions when ON and has an input signal range that extends
to the supplies. In the OFF condition, signal levels up to the
supplies are blocked. The ADG419 exhibits break-beforemake switching action.
2
MOS process that pro-
Mini-DIP Analog Switch
ADG419
FUNCTIONAL BLOCK DIAGRAM
D
S1
ADG419
SWITCH SHOWN FOR A
LOGIC "1" INPUT
PRODUCT HIGHLIGHTS
1. Extended Signal Range
The ADG419 is fabricated on an enhanced LC
cess, giving an increased signal range that extends to the
supply rails.
2. Ultralow Power Dissipation
3. Low R
4. Single Supply Operation
ON
For applications where the analog signal is unipolar, the
ADG419 can be operated from a single rail power supply.
The part is fully specified with a single +12 V power supply
and will remain functional with single supplies as low as
+5 V.
S2
IN
2
MOS pro-
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG419 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
TERMINOLOGY
V
DD
V
SS
Most positive power supply potential.
Most negative power supply potential in dual
supplies. In single supply applications, it
may be connected to GND.
V
L
Logic power supply (+5 V).
GNDGround (0 V) reference.
SSource terminal. May be an input or an
output.
DDrain terminal. May be an input or an
output.
INLogic control input.
R
ON
I
(OFF)Source leakage current with the switch
S
Ohmic resistance between D and S.
“OFF.”
I
(OFF)Drain leakage current with the switch
D
“OFF.”
I
, IS (ON)Channel leakage current with the switch
D
“ON.”
V
(VS)Analog voltage on terminals D, S.
D
C
(OFF)“OFF” switch source capacitance.
S
CD, CS (ON)“ON” switch capacitance.
t
TRANSITION
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
t
D
“OFF” time or “ON” time measured between the 90% points of both switches
when switching from one address state
to the other.
V
V
I
INL
INH
INL
(I
)Input current of the digital input.
INH
Maximum input voltage for logic “0.”
Minimum input voltage for logic “1.”
CrosstalkA measure of unwanted signal which is
coupled through from one channel to
another as a result of parasitic capacitance.
Off IsolationA measure of unwanted signal coupling
through an “OFF” channel.
I
DD
I
SS
Positive supply current.
Negative supply current.
–4–
REV. A
Typical Performance Characteristics–
VDD = +12V
V
SS
= 0V
T
A
= +258C
IS (OFF)
ID (OFF)
ID (ON)
VS, VD – Volts
0.006
0.004
–0.004
122
LEAKAGE CURRENT – nA
46810
0.002
0.000
–0.002
0
ADG419
50
40
30
– V
ON
R
20
10
0
–1515–10
TA = +258C
VDD = +12V
V
= –12V
SS
–50510
VDD = +5V
V
SS
VDD = +10V
V
= –10V
SS
VS, VD – Volts
= –5V
VDD = +15V
V
= –15V
SS
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage
50
VDD = +15V
V
= –15V
SS
= +5V
V
L
40
30
– V
ON
R
20
+1258C
100
TA = +258C
80
60
– V
ON
R
40
VDD = +5V
V
= 0V
SS
VDD = +10V
V
= 0V
SS
VDD = +12V
V
= 0V
SS
20
VDD = +15V
V
= 0V
0
0
VS, VD – Volts
SS
10
155
Figure 4. RON as a Function of VD (VS): Single Supply
Voltage
100
VDD = +12V
V
= 0V
SS
= +5V
V
L
80
60
– V
ON
R
40
+1258C
10
0
–1515–10
+858C
–5
VS, VD – Volts
0
+258C
510
Figure 2. RON as a Function of VD (VS) for Different
Temperatures
0.02
VDD = +15V
V
= –15V
SS
T
= +258C
A
0.01
IS (OFF)
0.00
–0.01
LEAKAGE CURRENT – nA
– 0.02
–0.03
–1515–10
–5
VS, VD – Volts
0
ID (ON)
ID (OFF)
510
Figure 3. Leakage Currents as a Function of VS (VD)
20
0
0
+858C
+258C
69
VS, VD – Volts
Figure 5. RON as a Function of VD (VS) for Different
Temperatures
Figure 6. Leakage Currents as a Function of VS (VD)
123
REV. A
–5–
ADG419
SD
V
S
V
D
ID (ON)
10mA
1mA
100mA
10mA
SUPPLY
I
1mA
100nA
10nA
VDD = +15V
V
= –15V
SS
= +5V
V
L
I+, I–
220
200
180
– ns
160
140
TRANSITION
I
L
t
120
DUAL SUPPLY
V
100
= 65V
IN
SINGLE SUPPLY
V
= 0V/5V
IN
1nA
2
10
3
10
4
10
FREQUENCY – Hz
10
5
6
10
10
Figure 7. Supply Current vs. Input Switching Frequency
Test Circuits
I
DS
V1
SD
V
S
RON = V1/I
DS
Test Circuit 1. On Resistance
+15V+5V
V
DD
S1
V
S1
S2
V
S2
IN
V
IN
GND
V
V
SS
–15V
L
D
Test Circuit 4. Transition Time,
IS (OFF)ID (OFF)
V
S
Test Circuit 2. Off Leakage
V
OUT
R
C
L
300V
L
35pF
7
SD
V
IN
t
OUTPUT
80
6168
101214
SUPPLY VOLTAGE – Volts
Figure 8. Transition Time vs. Power Supply Voltage
V
D
Test Circuit 3. On Leakage
3V
50%50%
0V
TRANSITION
90%
t
TRANSITION
t
TRANSITION
90%
+15V+5V
V
V
L
DD
V
–15V
D
C
R
300V
SS
L
L
35pF
S1
V
S1
S2
V
S2
IN
V
IN
GND
ADDRESS
DRIVE(VIN)
V
OUT
Test Circuit 5. Break-Before-Make Time Delay,
–6–
3V
0V
t
0.9V
D
0.9V
O
O
t
D
V
OUT
0.9V
t
D
0.9V
O
O
REV. A
ADG419
+15V+5V
0.1mF0.1mF
+15V+5V
0.1mF0.1mF
V
V
L
DD
S
IN
V
S
GND
V
IN
Test Circuit 6. Off Isolation
0.1mF
V
–15V
D
SS
R
50V
V
OUT
L
V
S
V
OUT
R
L
50V
CHANNEL-TO-CHANNEL CROSSTALK = 20 3 LOG | VS/V
Test Circuit 7. Crosstalk
S1
S2
V
GND
DD
0.1mF
V
V
–15V
L
D
SS
50V
V
IN
|
OUT
REV. A
–7–
ADG419
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
0.210 (5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.122 (3.10)
0.114 (2.90)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
8-Lead Plastic DIP (N-8)
0.430 (10.92)
0.348 (8.84)
8
14
PIN 1
0.100
(2.54)
BSC
0.122 (3.10)
0.114 (2.90)
8
1
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.018 (0.46)
0.008 (0.20)
5
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
SEATING
PLANE
0.325 (8.25)
0.300 (7.62)
8-Lead SOIC (RM-8)
5
0.199 (5.05)
0.187 (4.75)
4
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
0.015 (0.381)
0.008 (0.204)
0.120 (3.05)
0.112 (2.84)
338
278
0.195 (4.95)
0.115 (2.93)
0.028 (0.71)
0.016 (0.41)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.1574 (4.00)
0.1497 (3.80)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.005 (0.13)
MIN
8
1
0.405 (10.29)
0.1968 (5.00)
0.1890 (4.80)
8
PIN 1
0.0500
(1.27)
BSC
8-Lead Cerdip (Q-8)
0.055 (1.4)
MAX
5
0.310 (7.87)
0.220 (5.59)
4
PIN 1
MAX
0.100
(2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.070 (1.78)
0.030 (0.76)
0.150
(3.81)
MIN
SEATING
PLANE
8-Lead SOIC (SO-8)
(Narrow Body)
5
0.2440 (6.20)
41
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.320 (8.13)
0.290 (7.37)
15°
0°
0.0196 (0.50)
0.0099 (0.25)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
C1926a–0–9/98
0.015 (0.38)
0.008 (0.20)
x 45°
–8–
PRINTED IN U.S.A.
REV. A
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