Datasheet ADG417BR, ADG417BN Datasheet (Analog Devices)

Page 1
LC2MOS Precision
ADG417
IN
D
S
SWITCH SHOWN FOR A
LOGIC "1" INPUT
FEATURES 44 V Supply Maximum Ratings V
to VDD Analog Signal Range
SS
Low On Resistance (<35 ⍀) Ultralow Power Dissipation (<35 W) Fast Switching Times
t
(160 ns max)
ON
t
(100 ns max)
OFF
Break-Before-Make Switching Action Plug-In Replacement for DG417
APPLICATIONS Precision Test Equipment Precision Instrumentation Battery Powered Systems Sample Hold Systems
GENERAL DESCRIPTION
The ADG417 is a monolithic CMOS SPST switch. This switch is designed on an enhanced LC power dissipation yet gives high switching speed, low on resis­tance and low leakage currents.
The on resistance profile of the ADG417 is very flat over the full analog input range ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal bandwidth. CMOS construction ensures ultralow power dissipation making the parts ideally suited for portable and battery powered instruments.
The ADG417 switch, which is turned ON with a logic low on the control input, conducts equally well in both directions when ON and has an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. The ADG417 exhibits break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital input.
2
MOS process that provides low
Mini-DIP Analog Switch
ADG417

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

1. Extended Signal Range The ADG417 is fabricated on an enhanced LC giving an increased signal range that extends to the supply rails.
2. Ultralow Power Dissipation
3. Low R
4. Single Supply Operation
ON
For applications where the analog signal is unipolar, the ADG417 can be operated from a single rail power supply. The part is fully specified with a single +12 V power supply and will remain functional with single supplies as low as +5 V.
2
MOS process,
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998
Page 2
ADG417–SPECIFICATIONS
1
(V
Dual Supply
= +15 V 10%, V
DD
Parameter +25ⴗC +85ⴗC +25ⴗC +125ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V R
ON
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
(OFF) ±0.1 ±0.1 nA typ VD = ±15.5 V, V
S
(OFF) ±0.1 ±0.1 nA typ VD = ±15.5 V, V
D
, I
(ON) ±0.1 ±0.1 nA typ V
D
S
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INH
INL
Input Current
I
or I
INL
INH
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
2
Charge Injection 7 7 pC typ V
OFF Isolation 80 80 dB typ R
C
(OFF) 6 6 pF typ
S
C
(OFF) 6 6 pF typ
D
CD, CS (ON) 55 55 pF typ
POWER REQUIREMENTS V
I
DD
I
SS
I
L
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
= –15 V 10%, VL = +5 V 10%, GND = 0 V, unless otherwise noted)
SS
B Version T Version
–40ⴗC to –55C to
SS
to V
DD
VSS to V
DD
V
25 25 typ VD = ±12.5 V, I 35 45 35 45 max V
= +13.5 V, VSS = –13.5 V
DD
= +16.5 V, VSS = –16.5 V
DD
±0.25 ±5 ±0.25 ±15 nA max Test Circuit 2 ±0.25 ±5 ±0.25 ±15 nA max Test Circuit 2
= V
= ±15.5 V;
S
D
±0.4 ±5 ±0.4 ±30 nA max Test Circuit 3
2.4 2.4 V min
0.8 0.8 V max
±0.005 ±0.005 µA typ V
IN
= V
INL
or V
±0.5 ±0.5 µA max
100 100 ns typ R 160 200 145 200 ns max V 60 60 ns typ R 100 150 100 150 ns max V
= 300 , C
L
= ±10 V; Test Circuit 4
S
= 300 , C
L
= ±10 V; Test Circuit 4
S
= 0 V, R
S
C
= 10 nF; Test Circuit 5
L
= 50 , f = 1 MHz;
L
= 0 Ω,
L
Test Circuit 6
= +16.5 V, VSS = –16.5 V
0.0001 0.0001 µA typ V
DD
= 0 V or 5 V
IN
1 2.5 1 2.5 µA max
0.0001 0.0001 µA typ 1 2.5 1 2.5 µA max
0.0001 0.0001 µA typ V
= +5.5 V
L
1 2.5 1 2.5 µA max
= –10 mA
S
= ⫿15.5 V;
S
= ⫿15.5 V;
S
INH
= 35 pF;
L
= 35 pF;
L
–2–
REV. A
Page 3
ADG417
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
S
NC
GND
D V
SS
IN V
L
V
DD
ADG417
NC = NO CONNECT
Single Supply
Parameter +25ⴗC +85ⴗC +25ⴗC +125ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to V R
ON
LEAKAGE CURRENT V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
INL
INH
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Charge Injection 11 11 pC typ V
OFF Isolation 80 80 dB typ R
C
(OFF) 13 13 pF typ
S
C
(OFF) 13 13 pF typ
D
CD, CS (ON) 65 65 pF typ
POWER REQUIREMENTS V
I
DD
I
L
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
1
(V
= +12 V 10%, V
DD
(OFF) ±0.1 ±0.1 nA typ V
S
(OFF) ±0.1 ±0.1 nA typ V
D
, I
(ON) ±0.1 ±0.1 nA typ V
D
S
INH
INL
2
= 0 V, VL = +5 V 10%, GND = 0 V, unless otherwise noted)
SS
B Version T Version
–40C to –55C to
DD
0 to V
DD
V
40 40 typ V
60 70 max V
±0.25 ±5 ±0.25 ±15 nA max Test Circuit 2 ±0.25 ±5 ±0.25 ±15 nA max Test Circuit 2 ±0.4 ±5 ±0.4 ±30 nA max Test Circuit 3
2.4 2.4 V min
0.8 0.8 V max
±0.005 ±0.005 µA typ V ±0.5 ±0.5 µA max
180 250 180 250 ns max R
85 110 85 110 ns max R
0.0001 0.0001 µA typ V
12.5 12.5 µA max
0.0001 0.0001 µA typ V
12.5 12.5 µA max
= +3 V, +8.5 V, IS = –10 mA
D
= +10.8 V
DD
= +13.2 V
DD
= 12.2 V/1 V, VS = 1 V/12.2 V;
D
= 12.2 V/1 V, VS = 1 V/12.2 V;
D
= VD = 12.2 V/1 V;
S
= V
INL
or V
= 0 Ω,
S
INH
= 35 pF;
L
= 35 pF;
L
IN
= 300 , C
L
V
= +8 V; Test Circuit 4
S
= 300 , C
L
V
= +8 V; Test Circuit 4
S
= 0 V, R
S
C
= 10 nF; Test Circuit 5
L
= 50 , f = 1 MHz;
L
Test Circuit 6
= +13.2 V
DD
= 0 V or 5 V
IN
= +5.5 V
L
Table I. Truth Table
Logic Switch Condition
0ON 1 OFF

ORDERING GUIDE

Model Temperature Range Package Options*
ADG417BN –40°C to +85°C N-8 ADG417BR –40°C to +85°C SO-8
*N = Plastic DIP, SO = 0.15" Small Outline IC (SOIC).
REV. A –3–
PIN CONFIGURATION
DIP/SOIC
Page 4
ADG417

ABSOLUTE MAXIMUM RATINGS

(T
= +25°C unless otherwise noted)
A
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
V
L
Analog, Digital Inputs
2
. . . . . . . . . . . . . VSS – 2 V to VDD +2 V
or 30 mA, Whichever Occurs First
1
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 400 mW
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 100°C/W
θ
JA
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 400 mW
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155°C/W
θ
JA
Lead Temperature, Soldering
Vapor Phase (60 sec). . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG417 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE

TERMINOLOGY

V
DD
V
SS
Most positive power supply potential. Most negative power supply potential in dual
supplies. In single supply applications, it may be connected to GND.
V
L
Logic power supply (+5 V). GND Ground (0 V) reference. S Source terminal. May be an input or an
output. D Drain terminal. May be an input or an
output. IN Logic control input.
R
ON
I
(OFF) Source leakage current with the switch
S
Ohmic resistance between D and S.
“OFF.”
(OFF) Drain leakage current with the switch
I
D
“OFF.”
, IS (ON) Channel leakage current with the switch
I
D
“ON.”
VD (VS) Analog voltage on terminals D, S. C
(OFF) “OFF” switch source capacitance.
S
C
(OFF) “OFF” switch drain capacitance.
D
C
, CS (ON) “ON” switch capacitance.
D
t
ON
Delay between applying the digital control input and the output switching on.
t
OFF
Delay between applying the digital control input and the output switching off.
V V I
INL
INH
INL
(I
) Input current of the digital input.
INH
Maximum input voltage for logic “0.” Minimum input voltage for logic “1.”
Charge Injection A measure of the glitch impulse transferred
from the digital input to the analog output during switching.
Off Isolation A measure of unwanted signal coupling
through an “OFF” channel.
I
DD
I
SS
I
L
Positive supply current. Negative supply current. Logic supply current.
REV. A–4–
Page 5
100
0
15
60
20
5
40
0
80
10
R
ON
V
VS, VD – Volts
T
A
= +258C
VDD = +5V V
SS
= 0V
VDD = +10V V
SS
= 0V
VDD = +12V V
SS
= 0V
VDD = +15V V
SS
= 0V
R
ON
V
VS, VD – Volts
100
0
12
60
20
3
40
0
80
9
6
VDD = +12V V
SS
= 0V
V
L
= +5V
+1258C
+258C
+858C
0.006
–0.004
12
0.002
–0.002
2
0.000
0
0.004
10864
LEAKAGE CURRENT – nA
VS, VD – Volts
ID (OFF)
I
D
(ON)
I
S
(OFF)
VDD = +12V V
SS
= 0V
T
A
= +258C
Typical Performance Characteristics–ADG417
50
TA = +258C
40
VDD = +5V
= –5V
V
SS
30
V
ON
R
20
10
0
–15
–10
VDD = +12V
= –12V
V
SS
VS, VD – Volts
VDD = +10V
= –10V
V
SS
VDD = +15V
= –15V
V
SS
15
1050–5
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage
50
VDD = +15V
= –15V
V
SS
= +5V
V
L
40
30
V
ON
R
20
10
+1258C
+858C
+258C
Figure 4. RON as a Function of VD (VS): Single Supply Voltage
Figure 2. RON as a Function of VD (VS) for Different Temperatures
Figure 3. Leakage Currents as a Function of VS (VD)
REV. A –5–
0
–15
0.02
0.01
0.00
–0.01
LEAKAGE CURRENT – nA
–0.02
–0.03
–15
–10
VDD = +15V
= –15V
V
SS
= +258C
T
A
(OFF)
I
S
–10
VS, VD – Volts
VS, VD – Volts
1050–5
15
Figure 5. RON as a Function of VD (VS) for Different Temperatures
(ON)
I
D
ID (OFF)
1050–5
15
Figure 6. Leakage Currents as a Function of VS (VD)
Page 6
ADG417
0
50
100
150
200
250
300
5
79
11
13 15
SUPPLY VOLTAGE – Volts
t – ns
V = +5V
IN
t
ON
– SINGLE SUPPLY
t
ON
– DUAL SUPPLY
t
OFF
– DUAL SUPPLY
t
OFF
– SINGLE SUPPLY
10mA
1mA
100mA
10mA
SUPPLY
1mA
I
100nA
10nA
VDD = +15V
= –15V
V
SS
= +5V
V
L
I+, I–
I
L
1nA
2
10
3
10
4
10
FREQUENCY – Hz
5
10
6
10
7
10
Figure 7. Supply Current vs. Input Switching Frequency
Figure 8. Switching Time vs. Power Supply
REV. A–6–
Page 7
Test Circuits
I
DS
SD
V
S
RON = V1/I
DS
V1
ADG417
Test Circuit 1. On Resistance
0.1mF 0.1mF
S2
V
S
IN
GND
0.1mF 0.1mF
R
L
S2
V
S
IN
V
DDVL
V
DD
0.1mF
V
DDVL
V
DD
IS (OFF) ID (OFF)
V
S
Test Circuit 2. Off Leakage
V
L
D
R
L
300V
V
SS
V
SS
C
L
35pF
SD
V
OUT
V
D
Test Circuit 3. On Leakage
3V
V
IN
V
OUT
50% 50%
90%
t
ON
V
S
90%
t
OFF
SD
ID (ON)
V
D
Test Circuit 4. Switching Times
3V
V
L
D
C
L
10nF
V
OUT
V
IN
V
OUT
Q
= CL 3 DV
INJ
OUT
DV
OUT
V
GND
SS
0.1mF V
SS
Test Circuit 5. Charge Injection
V
V
L
DD
0.1mF 0.1mF
V
V
L
DD
S
IN
V
S
GND
V
IN
0.1mF
D
V
SS
V
SS
R 50V
V
OUT
L
Test Circuit 6. Off Isolation
REV. A –7–
Page 8
ADG417
PIN 1
0.210 (5.33) MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.1574 (4.00)
0.1497 (3.80)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
0.430 (10.92)
0.348 (8.84)
8
0.100 (2.54)
1
BSC
5
0.280 (7.11)
0.240 (6.10)
4
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
0.130 (3.30) MIN
SEATING PLANE
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
8-Lead SOIC (SO-8)
(Narrow Body)
0.1 968 (5.00)
0.1 890 (4.80)
85
0.2440 (6.20)
0.2284 (5.80)
41
C1974a–0–9/98
0.195 (4.95)
0.115 (2.93)
PIN 1
0.0098 (0.25)
0.0040 (0.10) SEATING
PLANE
0.0500 (1.27) BSC
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
88
0.0500 (1.27)
08
0.0160 (0.41)
x 458
PRINTED IN U.S.A.
REV. A–8–
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