Page 1
Quad SPDT Switch
FEATURES
44 V supply maximum ratings
to VDD analog signal range
V
SS
Low on resistance (45 Ω max)
Low ∆R
Low R
Low power dissipation
Fast switching times
Low leakage currents (5 nA max)
Low charge injection (10 pC max)
Break-before-make switching action
APPLICATIONS
Audio and video switching
Battery-powered systems
Test equipment
Communication systems
GENERAL DESCRIPTION
The ADG333A is a monolithic CMOS device comprising four
independently selectable SPDT switches. It is designed on an
LC
achieves a high switching speed and a low on resistance.
The on resistance profile is very flat over the full analog input
range, ensuring good linearity and low distortion when
switching audio signals. High switching speed also makes the
part suitable for video signal switching. CMOS construction
ensures ultralow power dissipation, making the part ideally
suited for portable, battery-powered instruments.
When they are on, each switch conducts equally well in both
directions and has an input signal range that extends to the
power supplies. In the off condition, signal levels up to the
supplies are blocked. All switches exhibit break-before-make
switching action for use in multiplexer applications. Inherent
in the design is low charge inject
(5 Ω max)
ON
match (4 Ω max)
ON
< 175 ns
t
ON
t
< 145 ns
OFF
2
MOS process, which provides low power dissipation yet
ADG333A
FUNCTIONAL BLOCK DIAGRAM
S1A
D1
S1B
IN1
ADG333A
IN2
S2B
D2
S2A
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. Extended signal range.
The ADG333A is fabricated on an enhanced LC
process, giving an increased signal range which extends to
the supply rails.
2. Low power dissipation.
3. Low R
4. Single-supply operation.
For applications where the analog signal is unipolar, the
ADG333A can be operated from a single rail power supply.
The part is fully specified with a single 12 V supply.
ON
.
S4A
D2
S4B
IN4
IN3
S3B
D3
S3A
01212-001
2
MOS
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
Page 2
ADG333A
TABLE OF CONTENTS
Specifications..................................................................................... 3
Typical Perfor m a n c e C haracter i s t ic s ..............................................8
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Te r mi n ol o g y ...................................................................................... 6
Pin Configurations and Function Descriptions ........................... 7
REVISION HISTORY
3/05—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Specifications Tables.................................................... 3
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide.......................................................... 12
10/95—Revision 0: Initial Version
Test C ir c uit s ..................................................................................... 10
Application Information................................................................ 11
ADG333A Supply Voltages....................................................... 11
Power Supply Sequencing ......................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. A | Page 2 of 12
Page 3
ADG333A
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V, VSS = −15 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
R
ON
∆RON
20
45 45 Ω max
5 Ω max VD = ±5 V, IS = –10 mA
VSS to V
RON Match 4 Ω max VD = ±10 V, IS = –10 mA
LEAKAGE CURRENTS VDD = +16.5 V, VSS = –16.5 V
Source OFF Leakage IS (OFF) ±0.1
±0.25 ±3 nA max Figure 15
Channel ON Leakage ID, IS (ON) ±0.1
±0.4 ±5 nA max Figure 16
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
I
or I
INL
INH
2.4 V min
INH
0.8 V max
INL
±0.005 µA typ VIN = 0 V or V
±0.5 µA max
DYNAMIC CHARACTERISTICS2
tON 90
t
80
OFF
Break-Before-Make Delay, t
10 ns min RL = 300 Ω, CL= 35 pF;
OPEN
175 ns max VS = ±10 V; Figure 17
145 ns max VS = ±10 V; Figure 17
V
Charge Injection 2 pC typ VD = 0 V, RD = 0 Ω, CL= 10 nF;
10 pC max VDD = +15 V, VSS = –15 V; Figure 19
OFF Isolation 72 dB typ RL = 75 Ω, CL = 5 pF, f = 1 MHz;
V
Channel-to-Channel Crosstalk 85 dB typ RL = 75 Ω, CL = 5 pF, f = 1 MHz;
V
CS (OFF) 7 pF typ
CD, CS (ON) 26 pF typ
POWER REQUIREMENTS
IDD 0.05 mA typ Digital inputs = 0 V or 5 V
0.25 0.35 mA max
I
SS
VDD/VSS
1
Temperature range is as follows: B version: −40°C to +85°C.
2
Guaranteed by design; not subject to production test.
0.01
1 5 µA max
±3/±20 V min/V max |VDD| = |VSS|
1
DD
V
Ω typ VD = ±10 V, IS = –1 mA
nA typ VD = ±15.5 V, VS = +15.5 V
nA typ VS = VD = ±15.5 V
DD
ns typ RL= 300 Ω, CL = 35 pF;
ns typ RL = 300 Ω, CL = 35 pF;
= +5 V; Figure 18
S
= 2.3 V rms; Figure 20
S
= 2.3 V rms; Figure 21
S
µA typ
Rev. A | Page 3 of 12
Page 4
ADG333A
SINGLE SUPPLY
VDD = +12 V, VSS = 0 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
RON 35 Ω typ VD = 1 V, 10 V, IS = –1 mA
75 Ω max
LEAKAGE CURRENTS VDD = 13.2 V
Source OFF Leakage IS (OFF) ±0.1 nA typ VD = 12.2 V/1 V, VS = 1 V/12.2 V
±0.25 ±3 nA max Figure 15
Channel ON Leakage ID, IS (ON) ±0.1 nA typ VS = VD = 12.2 V/1 V
±0.4 ±5 nA max Figure 16
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
INL
2.4 V min
0.8 V max
Input Current
I
or I
INL
INH
±0.005 µA typ VIN = 0 V or V
±0.5 µA max
DYNAMIC CHARACTERISTICS2
t
ON
110 ns typ RL = 300 Ω, CL = 35 pF;
200 ns max VS = 8 V; Figure 17
t
OFF
100 ns typ RL = 300 Ω, CL = 35 pF;
180 ns max VS = 8 V; Figure 17
Break-Before-Make Delay, t
OPEN
10 ns min RL = 300 Ω, CL = 35 pF;
ns min VS = 5 V; Figure 18
Charge Injection 5 pC typ VD = 6 V, RD = 0 W, CL = 10 nF;
V
OFF Isolation 72 dB typ RL = 75 Ω, CL = 5 pF, f = 1 MHz;
V
Channel-to-Channel Crosstalk 85 dB typ RL = 75 Ω, CL = 5 pF, f = 1 MHz;
V
CS (OFF) 12 pF typ
CD, CS (ON) 25 pF typ
POWER REQUIREMENTS VDD = 13.5 V
I
DD
0.05 mA typ Digital inputs = 0 V or 5 V
0.25 0.35 mA max
V
DD
1
Temperature range is as follows: B Version: −40°C to +85°C.
2
Guaranteed by design; not subject to production test.
±3/±30 V min/V max
1
DD
V
DD
= 12 V, VSS = 0 V; Figure 19
DD
= 1.15 V rms; Figure 20
S
= 1.15 V rms; Figure 21
S
Rev. A | Page 4 of 12
Page 5
ADG333A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Parameter Min
VDD to VSS +44 V
VDD to GND –0.3 V to +30 V
VSS to GND +0.3 V to –30 V
Analog, Digital Inputs
Continuous Current, S or D 20 mA
Peak Current, S or D (Pulsed at
1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +125°C
Junction Temperature 150°C
θJA, Thermal Impedance
PDIP Package 103°C/W
SOIC Package 74°C/W
SSOP Package 130°C/W
Lead Temperature, Soldering
(10 sec)
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
1
Overvoltage at IN, S, or D is clamped by internal diodes. Current should be
limited to the maximum ratings given.
1
VSS – 2 V to VDD + 2 V or 20 mA,
whichever occurs first
40 mA
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Truth Table
Logic Switch A Switch B
0 Off On
1 On Off
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 12
Page 6
ADG333A
TERMINOLOGY
RON
t
ON
Ohmic resistance between D and S.
∆R
ON
RON variation due to a change in the analog input voltage with a
constant load current.
Match
R
ON
Difference between the R
(OFF)
I
S
of any two channels.
ON
Source leakage current with the switch off.
I
(OFF)
D
Drain leakage current with the switch off.
, I
(ON)
I
D
S
Channel leakage current with the switch on.
(V
)
V
D
S
Analog voltage on Terminals D, S.
(OFF)
C
S
OFF switch source capacitance.
(OFF)
C
D
OFF switch drain capacitance.
, C
(ON)
C
D
S
ON switch capacitance.
Delay between applying the digital control input and the output
switching on.
t
OFF
Delay between applying the digital control input and the output
switching off.
t
OPEN
Break-before-make delay when switches are configured as a
multiplexer.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
(I
INL
INH
)
I
Input current of the digital input.
Crosstalk
A measure of unwanted signal which is coupled through from
one channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an OFF switch.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Rev. A | Page 6 of 12
Page 7
ADG333A
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN1
1
S1A
2
3
D1
4
S1B
5
V
SS
GND
6
S2B
7
D2
8
9
S2A
IN2
10
NC = NO CONNECT
ADG333A
TOP VIEW
(Not to Scale)
1
20
IN4
S4A
19
D4
18
S4B
17
16
V
DD
15
NC
S3B
14
D3
13
S3A
12
IN3
11
01212-002
IN1
2
S1A
3
D1
4
S1B
ADG333A
5
V
SS
6
GND
(Not to Scale)
S2B
7
D2
8
S2A
9
IN2
10
NC = NO CONNECT
TOP VIEW
20
IN4
19
S4A
18
D4
17
S4B
16
V
DD
15
NC
S3B
14
D3
13
S3A
12
IN3
11
01212-003
Figure 2. PDIP Pin Configuration Figure 3. SOIC Pin Configuration Figure 4. SSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1, 10, 11, 20 IN1, IN2, IN3, IN4 Logic Control Input.
2, 4, 7, 9, 12, 14,
17, 19
S1A, S1B, S2B, S2A,
S3A, S3B, S4B, S4A
Source Terminal. Can be an input or output.
3, 8, 13, 18 D1, D2, D3, D4 Drain Terminal. Can be an input or output.
5 V
SS
Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be
connected to ground.
6 GND Ground (0 V) Reference.
15 NC No Connect.
16 V
DD
Most Positive Power Supply Potential.
IN1
S1A
S1B
V
GND
S2B
S2A
IN2
1
2
D1
3
4
5
SS
6
7
8
D2
9
10
ADG333A
TOP VIEW
(Not to Scale)
NC = NO CONNECT
IN4
20
S4A
19
D4
18
S4B
17
16
V
DD
15
NC
14
S3B
D3
13
S3A
12
IN3
11
01212-004
Rev. A | Page 7 of 12
Page 8
ADG333A
TYPICAL PERFORMANCE CHARACTERISTICS
60
TA = 25°C
50
V
= +5V
DD
= –5V
V
40
(Ω)
ON
R
30
SS
VDD = +10V
V
= –10V
SS
60
VDD = 15V
= 0V
V
SS
50
+125°C
40
(Ω)
ON
R
30
+85°C
20
10
–15 –10 0–5 5 10 15
Figure 5. R
VDD = +15V
V
= –15V
SS
VDD, VS (V)
as a Function of VD (VS):
ON
Dual Supply
100
90
80
70
(Ω)
60
ON
R
50
40
30
20
03 9612
Figure 6. R
= +5V
V
DD
= –5V
V
SS
VDD = +10V
V
= –10V
SS
, VS (V)
V
DD
as a Function of VD (VS):
ON
TA = 25°C
VDD = +15V
V
= –15V
SS
Single Supply
45
VDD = +15V
= –15V
V
SS
40
35
30
(Ω)
ON
R
25
+125°C
+85°C
01212-005
01212-006
15
20
10
0 3 6 9 12 15
Figure 8. R
–40°C
VDD, VS (V)
as a Function of VD (VS) for Different Temperatures:
ON
+25°C
Single Supply
0.004
VDD = +16.5V
V
= –16.5V
0.002
–0.002
–0.004
–0.006
LEAKAGE CURRENT (nA)
–0.008
–0.010
SS
T
= 25°C
A
0
IS (ON)
–15 –10 0–5 5 10 15
ID (ON)
IS (OFF)
, VS (V)
V
D
Figure 9. Leakage Currents as a Function of V
Dual Supply
0.001
IS (OFF)
0
VDD = +16.5V
= –16.5V
V
SS
= 25°C
T
A
–0.001
–0.002
ID (ON)
(VS):
D
01212-008
01212-009
20
15
10
–15 –10 0–5 5 10 15
Figure 7. R
as a Function of VD (VS) for Different Temperatures:
ON
V
DD
, VS (V)
+25°C–40°C
Dual Supply
01212-007
Rev. A | Page 8 of 12
V
D
IS (ON)
, VS (V)
LEAKAGE CURRENT (nA)
–0.003
–0.004
03 69
Figure 10. Leakage Currents as a Function of V
Single Supply
(VS):
D
01212-010
12
Page 9
ADG333A
20
CL = 10nF
15
10
5
0
Q (pC)
–5
–10
–15
–20
–15 –10 0–5 5 10 15
VDD = +16.5V
= –16.5V
V
SS
VDD = +12V
= 0V
V
SS
(V)
V
S
Figure 11. Charge Injection as a Function of V
160
VD = +2V
V
= –2V
140
120
S
1
VDD = +16.5V
= –16.5V
V
SS
= 25°C
T
A
0.8
0.6
(mA)
DD
I
0.4
0.2
01212-011
S
0
0 200 400 1000600 800
Figure 13. I
SWITCHING FREQUENCY (kHz)
as a Function of Switching Frequency
DD
01212-013
100
SWITCHING TIME (ns)
80
60
0 5 10 2015
(V)
V
DD
Figure 12. Switching Time as a Function of V
D
01212-012
Rev. A | Page 9 of 12
Page 10
ADG333A
V
V
TEST CIRCUITS
I
DS
V
1
SD
= V1/I
R
ON
DS
Figure 14. On Resistance
0.1µF
(OFF)
I
S
V
D
01212-014
A
V
S
SD
V
D
01212-015
Figure 15. Off Leakage
V
DD
NC
SD
NC = NO CONNECT
Figure 16. On Leakage
ID (ON)
A
V
D
01212-016
V
–10V
S
+10V
IN
SB
SA
GND
DD
D
R
L
300Ω
V
SS
C
L
35pF
V
OUT
+3V
+10V
–10V
V
IN
0V
V
S
0V
50% 50%
t
OFF
50% 50%
t
ON
0.1µF
V
SS
Figure 17. Switching Times
V
DD
0.1µF
V
S
IN
SB
SA
GND
DD
D
R
L
300Ω
V
SS
C
L
35pF
V
OUT
3V
V
IN
0V
V
S
V
OUT
50% 50%
t
OPEN
01212-017
0.1µF
V
SS
V
DD
V
DSA
GND
DD
V
SS
V
SS
R
D
V
D
IN
Figure 18. Break-Before-Make Delay, t
V
C
10nF
OUT
L
OPEN
3V
V
IN
0V
V
OUT
0V
Q
= C
×
∆V
INJ
L
OUT
Figure 19. Charge Injection
V
DD
0.1µF
01212-018
∆V
OUT
01212-019
V
0.1µF
V
DD
DD
75Ω
SD
V
DD
V
OUT
SD
V
IN
V
V
S
GND
0.1µF
SS
V
SS
R
75Ω
L
01212-020
V
S
V
IN1
GND
SD
V
SS
V
OUT
R
L
75Ω
0.1µF
V
SS
V
IN2
NC
CHANNEL-TO-CHANNEL
CROSSTALK
×
20
LOG |VS/V
OUT
|
01212-021
Figure 20. Off Isolation Figure 21. Channel-to-Channel Crosstalk
Rev. A | Page 10 of 12
Page 11
ADG333A
APPLICATION INFORMATION
ADG333A SUPPLY VOLTAGES
The ADG333A can operate from a dual or signal supply. VSS
should be connected to GND when operating with a single
supply. When using a dual supply, the ADG333A can also
operate with unbalanced supplies; for example V
V
= −5 V. The only restrictions are that VDD to GND must not
SS
exceed 30 V, V
must not exceed +44 V. It is important to remember that
to V
SS
to GND must not drop below −30 V, and VDD
SS
the ADG333A supply voltage directly affects the input signal
range, the switch on resistance and the switching times of the
part. The effects of the power supplies on these characteristics
can be clearly seen from the Typical Performance Characteristics
curves.
= 20 V and
DD
POWER SUPPLY SEQUENCING
When using CMOS devices, care must be taken to ensure
correct power-supply sequencing. Incorrect power-supply
sequencing can result in the device being subjected to stresses
beyond those listed in the Absolute Maximum Ratings. This is
also true for the ADG333A. Always turn on V
and the logic signals. An external signal within the maxi-
by V
SS
mum specified ratings can then be safely presented to the source
or drain of the switch
first, followed
DD
Rev. A | Page 11 of 12
Page 12
ADG333A
OUTLINE DIMENSIONS
1.060 (26.92)
1.030 (26.16)
0.980 (24.89)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
20
1
PIN 1
0.100 (2.54)
0.210
(5.33)
MAX
BSC
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-AD
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 20-Lead Plastic Dual In-Line Package [PDIP]
Dimensions shown in inches and (millimeters)
11
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
10
0.015
(0.38)
MIN
SEATING
PLANE
0.005 (0.13)
MIN
Narrow Body (N-20)
0.060 (1.52)
MAX
0.015 (0.38)
GAUGE
PLANE
0.05 MIN
COPLANARITY
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
20 11
1
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
(0.0500)
Figure 23. 20-Lead Standard Small Outline Package [SOIC]
Dimensions shown in millimeters and (inches)
7.50
7.20
6.90
20 11
5.60
5.30
8.20
5.00
0.25
0.09
SEATING
PLANE
7.80
7.40
8°
4°
0°
1
PIN 1
2.00 MAX
0.65
BSC
0.10
COMPLIANT TO JEDEC STANDARDS MO-150AE
0.38
0.22
1.85
1.75
1.65
10
Figure 24. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
13.00 (0.5118)
12.60 (0.4961)
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
1.27
0.51 (0.0201)
0.31 (0.0122)
BSC
COMPLIANT TO JEDEC STANDARDS MS-013AC
SEATING
PLANE
0.33 (0.0130)
0.20 (0.0079)
Wide Body (R-20)
0.95
0.75
0.55
0.75 (0.0295)
0.25 (0.0098)
8°
0°
× 45°
1.27 (0.0500)
0.40 (0.0157)
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG333ABN −40°C to +85°C 20-Lead Plastic Dual In-Line Package (PDIP) N-20
ADG333ABR −40°C to +85°C 20-Lead Standard Small Outline Package (SOIC) R-20
ADG333ABR-REEL −40°C to +85°C 20-Lead Standard Small Outline Package (SOIC) R-20
ADG333ABRZ
ADG333ABRZ-REEL
ADG333ABRS −40°C to +85°C 20-Lead Shrink Small Outline Package (SSOP) RS-20
ADG333ABRS-REEL −40°C to +85°C 20-Lead Shrink Small Outline Package (SSOP) RS-20
ADG333ABRSZ
ADG333ABRSZ-REEL
1
Z = Pb-free part.
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C01212–0–3/05(A)
1
1
−40°C to +85°C 20-Lead Standard Small Outline Package (SOIC) R-20
1
−40°C to +85°C 20-Lead Standard Small Outline Package (SOIC) R-20
−40°C to +85°C 20-Lead Shrink Small Outline Package (SSOP) RS-20
1
−40°C to +85°C 20-Lead Shrink Small Outline Package (SSOP) RS-20
Rev. A | Page 12 of 12
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