Datasheet ADG3233 Datasheet (Analog Devices)

Low Voltage 1.65 V to 3.6 V, Bidirectional

E

Logic Level Translation, Bypass Switch

FEATURES
Operates from 1.65 V to 3.6 V Supply Rails
Bidirectional Level Translation, Unidirectional

Signal Path
8-Lead SOT-23 and MSOP Packages
Bypass or Normal Operation
Short Circuit Protection

APPLICATIONS
JTAG Chain Bypassing
Daisy-Chain Bypassing
Digital Switching

GENERAL DESCRIPTION

The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.

This type of device may be used in applications that require a
bypassing function. It is ideally suited to bypassing devices in a
JTAG chain or in a daisy-chain loop. One switch could be used for
each device or a number of devices, thus allowing easy bypassing
of one or more devices in a chain. This may be particularly
useful in reducing the time overhead in testing devices in the
JTAG chain or in daisy-chain applications where the user does
not wish to change the settings of a particular device.

The bypass switch is packaged in two of the smallest footprints
available for its required pin count. The 8-lead SOT-23 package
requires only 8.26 mm ⫻ 8.26 mm board space, while the MSOP
package occupies approximately 15 mm ⫻ 15 mm board area.

ADG3233

*

FUNCTIONAL BLOCK DIAGRAM

V

CC1VCC2

V

CC1

A1

V

CC1

A2

N

V

CC1VCC2VCC2

0

1

GND

Y1

Y2

PRODUCT HIGHLIGHTS

1. Bidirectional level translation matches any voltage level from

1.65 V to 3.6 V.

2. The bypass switch offers high performance and is fully
guaranteed across the supply range.

3. Short circuit protection.

4. Tiny 8-lead SOT-23 package, 8.26 mm ⫻ 8.26 mm board area,
or 8-lead MSOP.

Table I. Truth Table

EN Signal Path Function

LA1→Y2, Y1→V

CC1

Enable Bypass Mode

HA1→Y1, A2→Y2 Enable Normal Mode

*Patent Pending

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

ADG3233–SPECIFICATIONS

1

CC1

otherwise noted.)

= 1.65 V to 3.6 V, GND = 0 V, All specifications T

CC2

MIN

to T

MAX

, unless

(V

= V

Parameter Symbol Conditions Min Typ2Max Unit

LOGIC INPUTS/OUTPUTS

Input High Voltage

Input Low Voltage

4

4

Output High Voltage (Y1) V

Output Low Voltage (Y1) V

LOGIC OUTPUTS

3

Output High Voltage (Y2) V

Output Low Voltage (Y2) V

SWITCHING CHARACTERISTICS

VCC = V

CC1

= V

CC2

Propagation Delay,

A1 to Y1 Normal Mode t
A2 to Y2 Normal Mode t
A1 to Y2 Bypass Mode t
ENABLE Time EN to Y1 t
DISABLE Time EN to Y1 t
ENABLE Time EN to Y2 t
DISABLE Time EN to Y2 t

= V

V

CC

CC1

= V

CC2

Propagation Delay, t

A1 to Y1 Normal Mode t
A2 to Y2 Normal Mode t
A1 to Y2 Bypass Mode t
ENABLE Time EN to Y1 t
DISABLE Time EN to Y1 t
ENABLE Time EN to Y2 t
DISABLE Time EN to Y2 t

= V

V

CC

CC1

= V

CC2

Propagation Delay, t

A1 to Y1 Normal Mode t
A2 to Y2 Normal Mode t
A1 to Y2 Bypass Mode t
ENABLE Time EN to Y1 t
DISABLE Time EN to Y1 t
ENABLE Time EN to Y2 t
DISABLE Time EN to Y2 t

3

4, 5

= 3.3 V ± 0.3 V

tPD

= 2.5 V ± 0.2 V

PD

= 1.8 V ± 0.15 V

PD

V

V

IH

IL

OH

OL

OH

OL

PHL

PHL

PHL

EN

DIS

EN

DIS

PHL

PHL

PHL

EN

DIS

EN

DIS

PHL

PHL

PHL

EN

DIS

EN

DIS

, t
, t
, t

, t
, t
, t

, t
, t
, t

PLH

PLH

PLH

PLH

PLH

PLH

PLH

PLH

PLH

(V

= 1.65 V to 3.6 V, GND = 0 V)

CC2

V

= 3.0 V to 3.6 V 1.35 V

CC1

= 2.3 V to 2.7 V 1.35 V

V

CC1

= 1.65 V to 1.95 V 0.65 V

V

CC1

V

= 3.0 V to 3.6 V 0.8 V

CC1

= 2.3 V to 2.7 V 0.7 V

V

CC1

= 1.65 V to 1.95 V 0.35 V

V

CC1

IOH = –100 µA, V

= –4 mA, V

I

OH

= –8 mA, V

I

OH

IOL = +100 µA, V

= +4 mA, V

I

OL

IOL = +8 mA, V

(V

= 1.65 V to 3.6 V, GND = 0 V)

CC1

IOH = –100 µA, V

= –4 mA, V

I

OH

= –8 mA, V

I

OH

IOL = +100 µA, V

= +4 mA, V

I

OL

IOL = +8 mA, V

= 3.0 V to 3.6 V 2.4 V

CC1

= 2.3 V to 2.7 V 2.0 V

V

CC1

= 1.65 V to 1.95 V VCC – 0.45 V

V

CC1

= 2.3 V to 2.7 V 2.0 V

CC1

= 1.65 V to 1.95 V VCC – 0.45 V

V

CC1

= 3.0 V to 3.6 V 2.4 V

CC1

= 3.0 V to 3.6 V 0.40 V

CC1

= 2.3 V to 2.7 V 0.40 V

V

CC1

= 1.65 V to 1.95 V 0.45 V

V

CC1

= 2.3 V to 2.7 V 0.40 V

CC1

= 1.65 V to 1.95 V 0.45 V

V

CC1

= 3.0 V to 3.6 V 0.40 V

CC1

= 3.0 V to 3.6 V 2.4 V

CC2

= 2.3 V to 2.7 V 2.0 V

V

CC2

= 1.65 V to 1.95 V VCC – 0.45 V

V

CC2

= 2.3 V to 2.7 V 2.0 V

CC2

= 1.65 V to 1.95 V VCC – 0.45 V

V

CC2

= 3.0 V to 3.6 V 2.4 V

CC2

= 3.0 V to 3.6 V 0.40 V

CC2

= 2.3 V to 2.7 V 0.40 V

V

CC2

= 1.65 V to 1.95 V 0.45 V

V

CC2

= 2.3 V to 2.7 V 0.40 V

CC2

= 1.65 V to 1.95 V 0.45 V

V

CC2

= 3.0 V to 3.6 V 0.40 V

CC2

CC

CC

V

V

CL = 30 pF, VT = VCC/2 3.5 5.4 ns
CL = 30 pF, VT = VCC/2 3.5 5.4 ns
CL = 30 pF, VT = VCC/2 4 6.5 ns
CL = 30 pF, VT = VCC/2 4 6 ns
CL = 30 pF, VT = VCC/2 2.8 4 ns
CL = 30 pF, VT = VCC/2 4.5 6.5 ns
CL = 30 pF, VT = VCC/2 4 6.5 ns

CL = 30 pF, VT = VCC/2 4.5 6.2 ns
CL = 30 pF, VT = VCC/2 4.5 6.2 ns
CL = 30 pF, VT = VCC/2 4.5 6.5 ns
CL = 30 pF, VT = VCC/2 5 7.2 ns
CL = 30 pF, VT = VCC/2 3.2 4.7 ns
CL = 30 pF, VT = VCC/2 5 7.7 ns
CL = 30 pF, VT = VCC/2 4.8 7.2 ns

CL = 30 pF, VT = VCC/2 6.7 10 ns
CL = 30 pF, VT = VCC/2 6.5 10 ns
CL = 30 pF, VT = VCC/2 6.5 10.25 ns
CL = 30 pF, VT = VCC/2 7 10.5 ns
CL = 30 pF, VT = VCC/2 4.4 6.5 ns
CL = 30 pF, VT = VCC/2 7 12 ns
CL = 30 pF, VT = VCC/2 6.5 10.5 ns

REV. 0–2–

ADG3233

Parameter Symbol Conditions Min Typ2Max Unit

SWITCHING CHARACTERISTICS

Input Leakage Current I
Output Leakage Current I

POWER REQUIREMENTS

Power Supply Voltages V

Quiescent Power Supply Current I

Increase in I

NOTES

1

Temperature range is as follows: B Version: –40°C to +85°C.

2

All typical values are at VCC = V

3

VIL and VIH levels are specified with respect to V
respect to V

4

Guaranteed by design, not subject to production test.

5

See Test Circuits and Waveforms.

Specifications subject to change without notice.

per Input ∆ I

CC

CC1

.

CC2

4, 5

(continued)

I

O

CC1

V

CC2

CC1

I

CC2

CC1

= V

, TA = 25°C, unless otherwise stated.

CC2

, VOH and VOL levels for Y1 are specified with respect to V

CC1

0 ⱕ VIN ⱕ 3.6 V ± 1 µA
0 ⱕ VIN ⱕ 3.6 V ± 1 µA

1.65 3.6 V

1.65 3.6 V
Digital Inputs = 0 V or V
Digital Inputs = 0 V or V
V

= 3.6 V, One Input at 3.0 V;

CC

CC

CC

2 µA
2 µA

Others at VCC or GND 0.75 µA

, and VOH and V

CC1

levels are specified for Y2 with

OL

REV. 0

–3–

ADG3233

ADG3233

TOP VIEW

(Not to Scale)

V

CC2

1

Y1

2

Y2

3

GND

4

V

CC1

A1

A2

EN

8

7

6

5

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)

VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V

Digital Inputs

to GND . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V

A1, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V

A2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V

CC1

+ 0.3V

DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA

Operating Temperature Range

Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C

IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C

*

Stresses above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.

Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

8-Lead MSOP

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W

␪

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 43°C/W

␪

JC

8-Lead SOT-23

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 211°C/W

␪

JA

ORDERING GUIDE

Model Temperature Range Package Description Branding Package Option

ADG3233BRJ-REEL –40°C to +85°C SOT-23 W1B RJ-8
ADG3233BRJ-REEL7 –40°C to +85°C SOT-23 W1B RJ-8
ADG3233BRM –40°C to +85°C MSOP W1B RM-8
ADG3233BRM-REEL –40°C to +85°C MSOP W1B RM-8
ADG3233BRM-REEL7 –40°C to +85°C MSOP W1B RM-8

PIN CONFIGURATIONS

8-Lead SOT-23 Package (RJ-8)

V

CC1

A1

A2

EN

1

2

ADG3233

3

TOP VIEW

(Not to Scale)

4

8

V

CC2

7

Y1

6

Y2

5

GND

8-Lead MSOP Package (RM-8)

PIN FUNCTION DESCRIPTIONS

Pin
RJ-8 RM-8 Mnemonic Description

18 V
81 V

CC1

CC2

27 A1 Input Referred to V
36 A2 Input Referred to V
72 Y1 Output Referred to V
63 Y2 Output Referred to V

Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V.
Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V.

.

CC1

.

CC2

.

CC1

. Voltage levels appearing at Y2 will be translated from V

voltage level.

V

CC2

CC2

voltage level to a

CC1

45 EN Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode.
54 GND Device Ground.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG3233 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

REV. 0–4–

Typical Performance Characteristics–ADG3233

5.0
TA = 25ⴗC

4.5

4.0

3.5

3.0

2.5

– nA

CC1

2.0

I

1.5

V

1.0

0.5

0

1.5 2.0 3.02.5 3.5 4.0

V

= 2.5V

CC2

TPC 1. I

30

V

= 3.3V

CC1

= 25ⴗC

T

A

25

20

– nA

15

CC2

I

10

5

0

–5

08070605040302010

TPC 4. I

V

CC2

V

= 3.3V

CC2

= 1.8V

CC2

V

– V

CC1

vs. V

CC1

V

= 1.8V

CC2

TEMPERATURE – ⬚C

CC2

V

CC2

= 2.5V

CC1

= 3.3V

vs. Temperature

5.0
TA = 25ⴗC

4.5

4.0

3.5

3.0

– nA

2.5

CC2

I

2.0

1.5

V

= 3.3V

CC1

1.0

0.5

0

1.5 2.0 3.02.5 3.5 4.0

TPC 2. I

2000

T

25ⴗC

=

A

1800

1600

1400

1200

–␮A

1000

CC1

I

800

600

400

200

0

10k 100k

TPC 5. I

=

V

V

CC1

CC2

V

=

V

CC1

CC2

FREQUENCY – Hz

CC1

= 2.5V

V

CC1

V

– V

CC2

vs. V

CC2

= 1.8V

= 3.3V

1M

CC2

10M 100M

vs. Frequency,

Normal Mode

30

V

= 3.3V

CC2

= 25ⴗC

T

A

25

V

V

CC1

= 1.8V

1M

= 3.3V

CC1

V

= 2.5V

CC1

= 1.8V

V

CC1

=

V

= 3.3V

CC2

10M 100M

20

– nA

15

CC1

I

10

5

= 1.8V

V

CC1

0

08070605040302010

TPC 3. I

80

T

=

A

70

60

50

40

–␮A

CC1

I

30

20

10

0

10k 100k

TPC 6. I

TEMPERATURE – ⬚C

vs. Temperature

CC1

25ⴗC

V

=

V

CC1

CC2

FREQUENCY – Hz

vs. Frequency,

CC1

Bypass Mode

2000

T

=

25ⴗC

A

1800

1600

1400

1200

–␮A

1000

CC2

I

800

600

400

200

0

10k 100k

TPC 7. I
Normal Mode

V

=

V

CC1

V

CC1

FREQUENCY – Hz

CC2

= 3.3V

CC2

=

V

= 1.8V

CC2

1M

vs. Frequency,

10M 100M

2000

=

T

A

1800

1600

1400

1200

–␮A

1000

CC2

I

800

600

400

200

0

10k 100k

TPC 8. I
Bypass Mode

25ⴗC

V

CC1

V

=

V

CC1

FREQUENCY – Hz

vs. Frequency,

CC2

=

CC2

V

1M

CC2

= 1.8V

= 3.3V

10M 100M

10

8

6

TIME – ns

4

2

TA = 25ⴗC

= V

V

CC1

0

1.5 2.0 3.02.5 3.5 4.0

t

CC2

t

DIS

SUPPLY – V

EN

TPC 9. Y1 Enable, Disable Time
vs. Supply

REV. 0

–5–

ADG3233

10

8

6

TIME – ns

4

2

TA = 25ⴗC

= V

V

CC1

0

1.5 2.0 3.02.5 3.5 4.0

CC2

t

EN

t

DIS

SUPPLY – V

TPC 10. Y2 Enable, Disable
Time vs. Supply

16

V

= 3.3V

CC1

= 1.8V

V

14

CC2

= 25ⴗC

T

A

DATA RATE 10Mbps

12

10

8

6

RISE/FALL TIME – ns

4

2

0

22 10292827262524232

t

, LOW-TO-HIGH TRANSITION

PLH

t

, HIGH-TO-LOW TRANSITION

PHL

CAPACITIVE LOAD – pF

TPC 13. Rise/Fall Time vs.
Capacitive Load, A1–Y1, A2–Y2

6

5

t

t

V

= V

CC1

EN

DIS

3.3V

CC2 =

TEMPERATURE – ⴗC

4

3

TIME – ns

2

1

0

–40 –20 200408060

TPC 11. Y1 Enable, Disable
Time vs. Temperature

16

V

= 3.3V

CC1

= 1.8V

V

CC2

14

= 25ⴗC

T

A

DATA RATE 10Mbps

12

10

8

6

RISE/FALL TIME – ns

4

2

0

22 10292827262524232

t

, LOW-TO-HIGH TRANSITION

PLH

t

, HIGH-TO-LOW TRANSITION

PHL

CAPACITIVE LOAD – pF

TPC 14. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode

6

5

4

3

TIME – ns

2

1

0

–40 –20 200408060

t

t

DIS

V

= V

CC1

EN

3.3V

CC2 =

TEMPERATURE – ⴗC

TPC 12. Y2 Enable, Disable
Time vs. Temperature

10

V

= 1.8V

CC1

= 3.3V

V

9

CC2

= 25ⴗC

T

A

8

DATA RATE 10Mbps

t

, LOW-TO-HIGH TRANSITION

PLH

7

6

5

4

3

RISE/FALL TIME – ns

2

1

0

22 10292827262524232

t

, HIGH-TO-LOW TRANSITION

PHL

CAPACITIVE LOAD – pF

TPC 15. Rise/Fall Time vs. Capacitive
Load, A1–Y1, A2–Y2

10

V

= 1.8V

CC1

= 3.3V

V

9

CC2

= 25ⴗC

T

A

8

DATA RATE 10Mbps

t

, LOW-TO-HIGH TRANSITION

LH

7

6

5

4

3

RISE/FALL TIME – ns

t

2

1

0

22 10292827262524232

, HIGH-TO-LOW TRANSITION

HL

CAPACITIVE LOAD – pF

TPC 16. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode

8

V

= 3.3V

CC1

= 3.3V

V

CC2

7

= 25ⴗC

T

A

DATA RATE 10Mbps

6

t

, LOW-TO-HIGH TRANSITION

PLH

5

4

3

2

PROPAGATION DELAY – ns

1

0

22 10292827262524232

t

, HIGH-TO-LOW TRANSITION

PHL

CAPACITIVE LOAD – pF

TPC 17. Propagation Delay
vs. Capacitive Load A1 to Y1

8

7

t

, LOW-TO-HIGH TRANSITION

PLH

6

5

4

3

2

PROPAGATION DELAY – ns

1

0

22 10292827262524232

t

, HIGH-TO-LOW TRANSITION

PHL

V

= 3.3V

CC1

= 3.3V

V

CC2

= 25ⴗC

T

A

DATA RATE 10Mbps

CAPACITIVE LOAD – pF

TPC 18. Propagation Delay
vs. Capacitive Load A2 to Y2

REV. 0–6–

ADG3233

8

7

t

, LOW-TO-HIGH TRANSITION

PLH

6

5

4

3

2

PROPAGATION DELAY – ns

1

0

22 10292827262524232

t

, HIGH-TO-LOW TRANSITION

PHL

V

= 3.3V

CC1

= 3.3V

V

CC2

= 25ⴗC

T

A

DATA RATE 10Mbps

CAPACITIVE LOAD – pF

TPC 19. Propagation Delay vs.
Capacitive Load A1 to Y2, Bypass Mode

4.0

t

, A2–Y2

PHL

3.5

3.0

2.5

2.0

t

, A2–Y2

PLH

1.5

1.0

PROPAGATION DELAY – ns

0.5

TA = 25ⴗC

= V

V

CC1

0

t

, A1–Y1

PHL

t

, A1–Y1

PLH

= 3.3V

CC2

TEMPERATURE – ⴗC

806040200–20–40

TPC 22. Propagation Delay
vs. Temperature, Normal Mode

8.0

7.0

6.0

5.0

4.0

3.0

2.0

PROPAGATION DELAY – ns

1.0

0

1.5 2.0 3.02.5 3.5 4.0

t

PHL

TA = 25ⴗC

= V

V

CC1

t

PLH

, A1–Y1

CC2

, A1–Y1

t

, A2–Y2

PHL

t

, A2–Y2

PLH

SUPPLY – V

TPC 20. Propagation Delay
vs. Supply, Normal Mode

4.0

t

, A1–Y2

PHL

3.0

2.0

1.0

PROPAGATION DELAY – ns

TA = 25ⴗC
V

CC1

0

t

PLH

= V

= 3.3V

CC2

TEMPERATURE – ⴗC

, A1–Y2

TPC 23. Propagation Delay vs.
Temperature, Bypass Mode

8.0

6.0

t

, A1–Y2

= V

PHL

CC2

t

, A1–Y2

PLH

SUPPLY – V

4.0

2.0

PROPAGATION DELAY – ns

TA = 25ⴗC
V

CC1

0

1.5 2.0 3.02.5 3.5 4.0

TPC 21. Propagation Delay
vs. Supply, Bypass Mode

TA = 25ⴗC
EN = HIGH

3
1

2

4

806040200–20–40

A1

A2

TPC 24. Normal Mode V

= 1.8 V

V

CC2

Y1

Y2

DATA RATE = 10MHz

CC1

3.3V

1.8V

3.3V

= 3.3 V,

TA = 25ⴗC
DATA RATE = 10MHz

A1

3

2

TPC 25. Bypass Mode, V
V

= 1.8 V

CC2

REV. 0

Y2

3.3V

1.8V

= 3.3 V,

CC1

A1

3

1

A2

4

2

Y1

Y2
TA = 25ⴗC
DATA RATE = 10MHz

TPC 26. Normal Mode V
V

= 3.3 V

CC2

–7–

1.8V

= 1.8 V,

CC1

3.3V

1.8V

3.3V

1.8V

A1

3

2

Y1

1

TA = 25ⴗC
DATA RATE = 10MHz

TPC 27. Bypass Mode, V
V

= 3.3 V

CC2

Y2

1.8V

= 1.8 V,

CC1

3.3V

ADG3233

E

Y

3.5

3

2.5

2

1.5

VOLTAGE – V

VCC = 1.8V

1

VCC = 1.8V

0.5
SINK

0

02015105

VCC = 3.3V

VCC = 2.5V

TA = 25ⴗC
V

CC = VCC1

SOURCE

VCC = 2.5V

CURRENT – mA

= V

CC2

VCC = 3.3V

TPC 28. Y1 and Y2 Source and Sink Current

V

INPUT

OUTPUT

t

t

PLH

PHL

CC1

V

T

0V

V

OH

V

T

V

OL

Figure 1. Propagation Delay

V

CC1

V

EN

Y1 (A1 @ GND)

t

EN

V

t

DIS

T

T

0V

V

OH

V

T

V

OL

Figure 2. Y1 Enable and Disable Times

N

t

EN

A1

A2

2

V

t

DIS

T

Figure 3. Y2 Enable and Disable Times

V

CC1

V

T

0V

V

CC1

0V

V

CC1

0V

V

OH

V

T

V

OL

REV. 0–8–

ADG3233

DESCRIPTION

The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.

A1 and EN Input

The A1 and enable (EN) inputs have VIL/VIH logic levels so that
the part can accept logic levels of V

from Device 0 or the

OL/VOH

controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1, EN) are capable
of accepting inputs outside the V
the V

supply applied to the bypass switch could be 1.8 V

CC1

supply range. For example,

CC1

while Device 0 could be operating from a 2.5 V or 3.3 V supply

SIGNAL INPUT

V

CC0

DEVICE 0

V

CC1

DEVICE 1

rail, there are no internal diodes to the supply rails, so the device
can handle inputs above the supply but inside the absolute
maximum ratings.

Normal Operation

Figure 4 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 to Y1 and A2 to Y2.
The device will level translate the signal applied to A1 to a V

CC1

logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which will
have standard V

OL/VOH

levels for V

supplies. The signal is

CC1

then passed through Device 1 and back to the A2 input pin of
the bypass switch.

The logic level inputs of A2 are with respect to the V
The signal will be level translated from V

CC1

to V

CC2

supply.

CC1

and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the V

supply.

CC2

V

CC2

DEVICE 2

SIGNAL OUTPUT

LOGIC 1

V

CC1VCC2

A1

A2

EN

BYPASS SWITCH

Y1

Y2

Figure 4. Bypass Switch in Normal Mode

REV. 0

–9–

ADG3233

V

CC1

DEVICE 1

V

CC1VCC2

BYPASS SWITCH

SIGNAL INPUT

V

CC0

DEVICE 0

LOGIC 0

A1

A2

EN

Figure 5. Bypass Switch in Bypass Mode

Bypass Operation

Figure 5 illustrates the device as used in bypass operation.
The signal path is now from A1 directly to Y2, thus bypassing
Device 1 completely. The signal will be level translated to a

logic level and available on Y2, where it may be applied

V

CC2

V

CC2

DEVICE 2

SIGNAL OUTPUT

Y1

Y2

directly to the input of Device 2. In bypass mode, Y1 is pulled
up to V

CC1

.

The three supplies in Figures 4 and 5 may be any combination
of supplies, i.e., V

CC0

, V

CC1

, and V

may be any combination

CC2

of supplies, for example, 1.8 V, 2.5 V, and 3.3 V.

REV. 0–10–

OUTLINE DIMENSIONS

8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

3.00
BSC

ADG3233

85

3.00
BSC

1

PIN 1

0.65 BSC

0.15

0.00

0.38

0.22

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187AA

4

SEATING
PLANE

4.90

BSC

1.10 MAX

0.23

0.08

8ⴗ
0ⴗ

8-Lead Small Outline Transistor Package [SOT-23]

(RJ-8)

Dimensions shown in millimeters

2.90 BSC

7

2

1.95

BSC

5 6

4

2.80 BSC

0.65 BSC

1.45 MAX

SEATING
PLANE

0.22

0.08

8ⴗ
4ⴗ
0ⴗ

1.60 BSC

PIN 1

1.30

1.15

0.90

0.15 MAX

8

1 3

0.38

0.22

COMPLIANT TO JEDEC STANDARDS MO-178BA

0.80

0.40

0.60

0.45

0.30

REV. 0

–11–

C03297–0–5/03(0)

–12–