Datasheet ADG1408 Datasheet (Analog Devices)

5 Ω Max Ron, 4- and 8-Channel

±15 V/12 V/±5 V iCMOS™ Multiplexers

Preliminary Technical Data

FEATURES

5 Ω max on resistance

0.5 Ω max on resistance flatness
33 V supply maximum ratings

Fully specified at ±15 V/12 V/±5 V
3 V logic compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP and 4 mm × 4 mm LFCSP packages
Typical power consumption (< 0.03 µW)

APPLICATIONS

Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
Relay replacement

GENERAL DESCRIPTION

The ADG1408 and ADG1409 are monolithic iCMOS analog
multiplexers comprising eight single channels and four
differential channels, respectively. The ADG1408 switches one
of eight inputs to a common output as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG1409 switches
one of four differential inputs to a common differential output
as determined by the 2-bit binary address lines A0 and A1. An
EN input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF.

The iCMOS (industrial-CMOS) modular manufacturing
process combines high-voltage CMOS (complementary metal­oxide semiconductor) and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 30-V operation in a footprint that no other
generation of high-voltage parts has been able to achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can tolerate high supply voltages, while providing
increased performance, dramatically lower power consumption,
and reduced package size.

ADG1408/ADG1409

FUNCTIONAL BLOCK DIAGRAMS

ADG1408

S1

S8

1 OF 8

DECODER

A2

A1

A0

SWITCHES SHOWN FOR A “1” LOGIC INPUT

EN

S1A

S4A

D

S1B

S4B

Figure 1.

The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and
gain switching applications, where low distortion is critical.
iCMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery
powered instruments

PRODUCT HIGHLIGHTS

1. 5 Ω max on resistance.

2. 0.5 Ω max on resistance flatness.

3. 3 V logic compatible digital input V

4. 16-lead TSSOP and 4 mm ×4 mm LFCSP package.

ADG1409

DA

DB

1 OF 4

DECODER

A0

EN

A1

= 2.0 V, VIL = 0.8 V.

IH

Rev. PrB

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

ADG1408/ADG1409 Preliminary Technical Data

TABLE OF CONTENTS

Specifications..................................................................................... 3

Pin Configurations—TSSOP ...........................................................8

Dual Supply................................................................................... 3

Single Supply................................................................................. 4

Dual Supply................................................................................... 5

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

REVISION HISTORY

Terminology .......................................................................................9

Typical Performance CharacteristicS........................................... 10

Test Circuits..................................................................................... 12

Outline Dimensions....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. PrB | Page 2 of 16

Preliminary Technical Data ADG1408/ADG1409

SPECIFICATIONS

DUAL SUPPLY1

VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

Parameter +25ºC

−40ºC to +85ºC −40ºC to +125ºC

ANALOG SWITCH

Analog Signal Range VSS to VDD V
RON 3

4 5 5

RON Flatness

0.5

∆RON 0.5

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF) ±0.01 nA typ VD = ±10 V, VS = −10 V;

±0.5 ±2.5 ±50 nA max ±0.5
Drain OFF Leakage ID (OFF) VD = ±10 V; VS = ±10 V;
ADG1408 ±1 ±100 ±100 nA max Test Circuit 3
ADG1409 ±1 ±50 ±50 nA max
Channel ON Leakage ID, IS (ON) VS = VD = ±10 V;
ADG1408 ±1 ±100 ±100 nA max Test Circuit 4
ADG1409 ±1 ±50 ±50 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

2.0 2.0 V min

INH

0.8 0.8 V max

INL

Input Current
I

or I

±0.005 µA max VIN= V

INL

INH

±0.5 ±0.5 µA max
CIN, Digital Input Capacitance 5 pF typ

DYNAMIC CHARACTERISTICS2

t

80 120 120 ns typ RL = 300 Ω, CL = 35 pF;

TRANSITION

250 250 ns max VS1 = ±10 V, VS8 = ±10 V;

T

10 10 10 ns typ RL = 300 Ω, CL = 35 pF;

BBM

1 ns min VS = 10 V; Test Circuit 6
tON(EN) 85 125 125 ns typ RL = 300 Ω CL = 35 pF;
150 225 225 ns max VS = 5 V; Test Circuit 7
t

(EN) 40 65 65 ns typ RL = 300 Ω, CL = 35 pF;

OFF

150 150 ns max VS = 5 V; Test Circuit 7
Charge Injection 20 20 pC typ

OFF Isolation 75 dB typ RL = 1 kΩ, f = 100 kHz;
V
Channel-to-Channel Crosstalk 85 dB typ RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
Total Harmonic Distortion,

0.002 % typ

THD + N

−3 dB Bandwidth

50 MHz typ R

Test Circuit 10
CS (OFF) 15 pF typ f = 1 MHz

Unit Test Conditions/Comments

Ω typ

Ω max

Ω typ

Ω max

Ω typ

Ω max

VD = ±10 V, IS = −10 mA

VD = +10 V, −10 V

VD = +10 V, −10 V

Test Circuit 2

or V

INH

INL

Test Circuit 5

= 0 V, RS = 0 Ω, CL = 10 nF;

V

S

Test Circuit 8

= 0 V; Test Circuit 9

EN

= 600 Ω, 5 V rms; f=20 Hz to

R

L

20 kHz

= 300 Ω, CL = 5 pF; Test Circuit 10

L

Rev. PrB | Page 3 of 16

ADG1408/ADG1409 Preliminary Technical Data

Parameter +25ºC

−40ºC to +85ºC −40ºC to +125ºC

DYNAMIC CHARACTERISTICS2

CD (OFF) f = 1 MHz
ADG1408 100 pF typ
ADG1409 50 pF typ
CD, CS(ON) f = 1 MHz
ADG1408 150 pF typ
ADG1409 75 pF typ

POWER REQUIREMENTS

IDD 0.001 µA typ Digital inputs= 0 V or VDD
5 5 µA max
IDD 150 µA typ Digital inputs= 5 V
300 µA max
ISS 0.001 µA typ Digital inputs= 0 V or VDD
5 5 µA max
I

0.001 µA typ Digital inputs= 0 V or VDD

GND

5 5 µA max
I

150 µA typ Digital inputs= 5 V

GND

5 300 µA max

1

Temperature ranges are as follows: B Version: −40°C to +85°C; T Version: −40°C to +125°C.

2

Guaranteed by design, not subject to production test.

SINGLE SUPPLY

VDD = 12 V V ± 10%,, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 2.

Parameter +25ºC −40ºC to +85ºC −40ºC to +125ºC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 to VDD V
RON 6 Ω typ VD = 3 V, 10 V, IS = –1 mA
7 8 9 Ω max
RON Flatness Ω typ VD = 3 V, 10 V, IS = –1 mA

1.5 Ω max
∆RON 0.5 Ω typ VD = 3 V, 10 V, IS = –1 mA
Ω max
Channel ON Leakage ID, IS (ON) VS = VD = 8 V/0 V;

ADG1408 ±1 ±100 ±100 nA max Test Circuit 4
ADG1409 ±1 ±50 ±50 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

IINL or I

INH

C

Digital Input Capacitance 8 pF typ f = 1 MHz

IN,

DYNAMIC CHARACTERISTICS2

t

T
1 ns min VS = 5 V; Test Circuit 6
tON (EN) 140 ns typ RL = 300 Ω CL = 35 pF;
V

130 ns typ RL = 300 Ω, CL = 35 pF;

TRANSITION

10 ns typ RL = 300 Ω, CL = 35 pF;

BBM

1

2.0 2.0 V min

INH

0.8 0.8 V max

INL

±10 ±10 µA max VIN = 0 or VDD

Unit Test Conditions/Comments

VDD = +16.5 V, VSS = −16.5 V

= 8 V/0 V, VS8 = 0 V/8 V;

V

S1

Test Circuit 5

= 5 V; Test Circuit 7

S

Rev. PrB | Page 4 of 16

Preliminary Technical Data ADG1408/ADG1409

Parameter +25ºC −40ºC to +85ºC −40ºC to +125ºC Unit Test Conditions/Comments

DYNAMIC CHARACTERISTICS2

t

(EN) 60 ns typ RL = 300 Ω, CL = 35 pF;

OFF

V

Charge Injection 5 pC typ

OFF Isolation –75 dB typ RL = 1 kΩ f = 100 kHz;
V
Channel-to-Channel Crosstalk 85 dB typ RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
Total Harmonic Distortion, THD + N 0.002 % typ RL = 600 Ω, 5 V rms; f=20 Hz to 20 kHz

−3 dB Bandwidth

50 MHz typ R
CS (OFF) 15 pF typ f = 1 MHz
CD (OFF) f = 1 MHz

ADG1408 100 pF typ
ADG1409 50 pF typ

CD, CS (ON) f = 1 MHz

ADG1408 150 pF typ
ADG1409 75 pF typ

POWER REQUIREMENTS VDD = 13.2 V

IDD 1 1 µA typ Digital inputs= 0 V or VDD
5 5 µA max
IDD 150 µA typ Digital inputs= 5

300 µA max

1

Temperature ranges are as follows: B Version: –40°C to +85° ; T Version: –55°C to +125°.

2

Guaranteed by design, not subject to production test.

DUAL SUPPLY

VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted.

Table 3.

Parameter +25ºC −40ºC to +85ºC −40ºC to +125ºC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS to VDD V
RON 6 Ω typ
7 8 10 Ω max
∆RON 0.5 Ω max
LEAKAGE CURRENTS

Source OFF Leakage IS (OFF) ±0.01 nA typ

±0.5 ±2.5 ±50 nA max
Drain OFF Leakage ID (OFF) VD = ±3.3. V; VS = ±3.3 V;

ADG1408 ±1 ±100 ±100 nA max Test Circuit 3
ADG1409 ±1 ±50 ±50 nA max

Channel ON Leakage ID, IS (ON) VS = VD = ±3.3 V;

ADG1408 ±1 ±100 ±100 nA max Test Circuit 4
ADG1409 ±1 ±50 ±50 nA max

1

= 5 V; Test Circuit 7

S

= 0 V, RS = 0 Ω, CL = 10 nF;

V

S

Test Circuit 8

= 0 V; Test Circuit 9

EN

= 300 Ω, CL = 5 pF; Test Circuit 10

L

V

= ±3.3 V, IS = −10 mA

D

V

= +3.3 V, −3.3 V

D

V

= ±3.3 V, VS = −3.3 V;

D

Test Circuit 2

Rev. PrB | Page 5 of 16

ADG1408/ADG1409 Preliminary Technical Data

Parameter +25ºC −40ºC to +85ºC −40ºC to +125ºC Unit Test Conditions/Comments

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

I

or I

INL

±0.005 µA max VIN= V

INH

±0.5 ±0.5 µA max

CIN, Digital Input Capacitance 5 pF typ

DYNAMIC CHARACTERISTICS2

t

120 120 ns typ RL = 300 Ω, CL = 35 pF;

TRANSITION

250 250 ns max

T

ns typ RL = 300 Ω, CL = 35 pF;

BBM

1 ns min VS = 5 V; Test Circuit 6
tON(EN) 85 125 125 ns typ RL = 300 Ω CL = 35 pF;
150 225 225 ns max VS = 5 V; Test Circuit 7
t

(EN) 65 65 ns typ RL = 300 Ω, CL = 35 pF;

OFF

150 150 ns max VS = 5 V; Test Circuit 7

Charge Injection 20 pC typ

OFF Isolation
V
Channel-to-Channel Crosstalk 85 85 dB typ RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
Total Harmonic Distortion, THD +

N

-3dB Bandwidth 50 MHz typ RL = 300 Ω, CL = 5 pF; Test Circuit 10
Test Circuit 10
CS (OFF) 15 pF typ f = 1 MHz
CD (OFF) f = 1 MHz

ADG1408 100 pF typ
ADG1409 50 pF typ

CD, CS(ON) f = 1 MHz

ADG1408 150 pF typ
ADG1409 75 pF typ

POWER REQUIREMENTS

IDD 0.001 µA typ Digital inputs= 0 V or VDD
5 5 µA max
IDD 150 µA typ Digital inputs= 5 V
300 µA max
ISS 0.001 µA typ Digital inputs= 0 V or VDD
5 5 µA max
I

0.001 µA typ Digital inputs= 0 V or VDD

GND

5 5 µA max
I

150 µA typ Digital inputs= 5 V

GND

5 300 µA max

1

Temperature ranges are as follows: B Version: −40°C to +85°C; Y Version: −40°C to +125°C.

2

Guaranteed by design, not subject to production test.

2.0 2.0 V min

INH

0.8 0.8 V max

INL

−75

−75

dB typ RL = 1 kΩ, f = 100 kHz;

0.002 % typ

or V

INH

INL

= ±10 V, VS8 = ±10 V;

V

S1

Test Circuit 5

VS = 0 V, RS = 0 Ω, CL = 10 nF; Test
Circuit 8

= 0 V; Test Circuit 9

EN

RL = 600 Ω, 5 V rms; f = 20 Hz to 20
kHz

= +16.5V, VSS = −16.5V

V

DD

Rev. PrB | Page 6 of 16

Preliminary Technical Data ADG1408/ADG1409

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings T

= 25°C, unless otherwise noted.

A

Table 4.

Parameter Rating

V

to VSS 36 V

DD

VDD to GND −0.3 V to +25 V
V

to GND +0.3 V to −25 V

SS

Analog, Digital Inputs1

Continuous Current, S or D 30 mA
Peak Current, S or D (Pulsed at 1 ms,

10% Duty Cycle max)
Operating Temperature Range

Industrial (B Version) −40° C to +85°C
Automotive (Y Version) –40° C to +125°C
Storage Temperature Range –65° C to +150°C

Junction Temperature 150°C
TSSOP Package, Power Dissipation 450 mW

θJA, Thermal Impedance 150.4°C/W
θJC, Thermal Impedance 50°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C

− 0.3 V to VDD + 0.3 V

V

SS

or 20 mA, whichever
occurs first

100 mA

1

Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should

be limited to the maximum ratings given

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. PrB | Page 7 of 16

ADG1408/ADG1409 Preliminary Technical Data

A

PIN CONFIGURATIONS

A0

EN

V

SS

S1

S2

S3

S4

D

1

2

3

ADG1408

4

TOP VIEW

(Not to Scale)

5

6

7

8

16

A1

15

A2

14

GND

V

13

DD

S5

12

S6

11

10

S7

9

S8

A0

EN

V

S1A

S2A

S3A

S4A

DA

SS

1

2

3

ADG1409

4

TOP VIEW

(Not to Scale)

5

6

7

8

A1

16

15

GND

14

V

DD

13

S1B

12

S2B

11

S3B

S4B

10

9

DB

Figure 2. Pin Configurations—TSSOP

0EN

Vss

S1
S2

S3

A1 A2

141516

13

1
2
3

4

ADG1408

TOP VIEW

(Not to Scale)

6

5

S4

D

12

GND

Vdd

11
10

S5

S6

9

8

7

S7

S8

Vss

S1A
S2A
S3A

Figure 3. Pin Configurations – 4mm x4mm LFCSP

1
2
3

4

A0EN

A1

141516

ADG1409

TOP VIEW

(Not to Scale)

6

7

5

DA

DB

S4A

GND

13

8

S4B

12

Vdd

1

S1B

1

10

S2B
S3B

9

Table 5. ADG1408 Truth Table

A2 A1 A0 EN ON SWITCH

X X X 0 NONE
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8

Table 6. ADG1409 Truth Table

Al A0 EN ON SWITCH PAIR

X X 0 NONE
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4

Rev. PrB | Page 8 of 16

Preliminary Technical Data ADG1408/ADG1409

TERMINOLOGY

Table 7.

Mnemonic Description

VDD Most positive power supply potential.
VSS Most negative power supply potential in dual supplies. In single supply applications, it may be connected to ground.
GND Ground (0 V) reference.
RON Ohmic resistance between D and S.
∆RON Difference between the RON of any two channels.
IS (OFF) Source leakage current when the switch is off.
ID (OFF) Drain leakage current when the switch is off.
ID, IS (ON) Channel leakage current when the switch is on.
VD (VS) Analog voltage on terminals D, S.
CS (OFF) Channel input capacitance for OFF condition.
CD (OFF) Channel output capacitance for OFF condition.
CD, CS (ON) ON switch capacitance.
CIN Digital input capacitance.
tON (EN) Delay time between the 50% and 90% points of the digital input and switch ON condition.
t

(EN) Delay time between the 50% and 90% points of the digital input and switch OFF condition.

OFF

Delay time between the 50% and 90% points of the digital inputs and the switch ON condition when switching from

t
t
V
V
I
I
ISS Negative supply current.
Off Isolation A measure of unwanted signal coupling through an OFF channel.
Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching.
Bandwidth The frequency at which the output is attenuated by 3dBs.
On Response The frequency response of the “ON” switch.
THD + N The ratio of the harmonic amplitude plus noise of the signal to the fundamental.

TRANSITION

OFF time measured between the 80% point of both switches when switching from one address state to another.

OPEN

Maximum input voltage for Logic 0.

INL

Minimum input voltage for Logic 1.

INH

(I

) Input current of the digital input.

INL

INH

Positive supply current.

DD

one address state to another.

Rev. PrB | Page 9 of 16

ADG1408/ADG1409 Preliminary Technical Data

TYPICAL PERFORMANCE CHARACTERISTICS

TBD

Figure 4. On Resistance as a Function of VD( VS) for Single Supply

TBD

TBD

Figure 7. On Resistance as a Function of VD( VS) for Different Temperatures,

Single Supply

TBD

Figure 5. On Resistance as a Function of VD( VS) for Dual Supply

TBD

Figure 6. On Resistance as a Function of VD( VS) for Different Temperatures,

Single Supply

Rev. PrB | Page 10 of 16

Figure 8. On Resistance as a Function of VD( VS) for Different Temperatures,

Dual Supply

TBD

Figure 9. Leakage Currents as a Function of V

D

(VS)

Preliminary Technical Data ADG1408/ADG1409

TBD

Figure 10. Leakage Currents as a function of Temperature

TBD

Figure 11. Supply Currents vs. Input Switching Frequency

TBD

Figure 14. Off Isolation vs. Frequency

TBD

Figure 15. Cross talk vs. Frequency

TBD

Figure 12. Charge Injection vs. Source Voltage

Figure 16. On Response vs. Frequency

TBD

Figure 13. TON/TOFF Times vs. Temperature)

Rev. PrB | Page 11 of 16

TBD

TBD

Figure 17. THD + N vs. Frequency

ADG1408/ADG1409 Preliminary Technical Data

TEST CIRCUITS

Figure 18. Test Circuit 1. On Resistance

Figure 19. Test Circuit 2. I

(OFF)

S

Figure 20. Test Circuit 3. I

Figure 21. Test Circuit 4. I

(OFF)

D

(ON)

D

Figure 22. Test Circuit 5. Switching Time of Multiplexer, t

Figure 23. Test Circuit 6. Break-Before-Make Delay, t

TRANSlTlON

OPEN

Rev. PrB | Page 12 of 16

Preliminary Technical Data ADG1408/ADG1409

(EN), t

Figure 24. Test Circuit 7. Enable Delay, t

ON

OFF

(EN)

Figure 25. Test Circuit 8. Charge Injection

Figure 26. Test Circuit 9. OFF Isolation

Figure 27. Test Circuit 10. Channel-to-Channel Crosstalk

Rev. PrB | Page 13 of 16

ADG1408/ADG1409 Preliminary Technical Data

OUTLINE DIMENSIONS

Figure 28. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)

Figure 29. 16-Lead Lead Frame Chip Scale Package [LFCSP]

Dimensions shown in inches and (millimeters)

4mm × 4 mm (CP-16)

ORDERING GUIDE

Model Temperature Range Description Package Option

ADG1408YRU
ADG1409YRU
ADG1409YCP
ADG1409YCP

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

Thin Shrink Small Outline Package (TSSOP) RU-16
Thin Shrink Small Outline Package (TSSOP) RU-16
Thin Shrink Small Outline Package (TSSOP) CP-16
Thin Shrink Small Outline Package (TSSOP) CP-16

Rev. PrB | Page 14 of 16

Preliminary Technical Data ADG1408/ADG1409

NOTES

Rev. PrB | Page 15 of 16

ADG1408/ADG1409 Preliminary Technical Data

NOTES

© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.

PR04861–0–11/04(PrB)

Rev. PrB | Page 16 of 16