Datasheet ADE7757A Datasheet (Analog Devices)

Energy Metering IC with Integrated

Oscillator and Reverse Polarity Indication

Preliminary Technical Data

FEATURES

On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies

instantaneous real power

Logic output REVP indicates potential miswiring or negative

power

Direct drive for electromechanical counters and 2-phase

stepper motors (F1 and F2)

Proprietary ADCs and DSP provide high accuracy over large

variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external

overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
AC input only

GENERAL DESCRIPTION

The ADE7757A1 is a high accuracy, electrical energy metering
IC. It is a pin reduction version of the ADE7755, enhanced with
a precise oscillator circuit that serves as a clock source to the
chip. The ADE7757A eliminates the cost of an external crystal
or resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor and
operates only with ac input.

1

U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.

ADE7757A

The ADE7757A specifications surpass the accuracy require­ments as quoted in the IEC62053-21 standard. The AN-679

Application Note can be used as a basis for a description of an

IEC 61036 (equivalent to IEC62053-21) low cost, watt-hour
meter reference design.

The only analog circuitry used in the ADE7757A is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.

The ADE7757A supplies average real power information on the
low frequency outputs F1 and F2. These outputs may be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.

The ADE7757A includes a power supply monitoring circuit on

supply pin. The ADE7757A remains inactive until the

the V

DD

supply voltage on V
falls below 4 V, the ADE7757A also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.

Internal phase matching circuitry ensures that the voltage and
current channels are phase matched while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7757A does not exhibit creep
when no load is present.

The part is available in a 16-lead, narrow-body, SOIC package.

reaches approximately 4 V. If the supply

DD

FUNCTIONAL BLOCK DIAGRAM

V

AGND

DD

1 6 13

POWER

SUPPLY MONITOR

2

V2P

+

3

V2N

4

V1N

5

+

V1P

2.5V

REFERENCE

Rev. PrE

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Anal og Devices. Trademarks and
registered trademarks are the property of their respective owners.

...110101...

Σ-∆

ADC

...11011001...

Σ-∆

ADC

INTERNAL

4kΩ

REF

OSCILLATOR

7 11 8 10 12 14 16 159

RCLKIN

IN/OUT

PHASE

CORRECTION

Figure 1.

DGND

ADE7757A

SIGNAL

PROCESSING

BLOCK

MULTIPLIER

LPF

Φ

HPF

DIGITAL-TO-FREQUENCY

CONVERTER

REVP

CF

S0

SCF

S1

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

F1

05330-001

F2

ADE7757A Preliminary Technical Data

TABLE OF CONTENTS

Specifications..................................................................................... 3

Digital-to-Frequency Conversion............................................ 14

Timing Characteristics ................................................................ 4

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Terminology ...................................................................................... 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics............................................. 8

Theory of Operation ......................................................................10

Power Factor Considerations.................................................... 10

Nonsinusoidal Voltage and Current ........................................ 11

Analog Inputs.................................................................................. 12

Channel V1 (Current Channel)................................................ 12

Channel V2 (Voltage Channel) ................................................ 12

Typical Connection Diagrams.................................................. 12

Power Supply Monitor ...................................................................13

HPF and Offset Effects .............................................................. 13

Connecting to a Microcontroller for Energy Measurement. 15

Power Measurement Considerations....................................... 15

Internal Oscillator (OSC).............................................................. 16

Transfer Function........................................................................... 17

Frequency Outputs F1 and F2.................................................. 17

Example ....................................................................................... 17

Frequency Output CF................................................................ 17

Selecting a Frequency for an Energy Meter Application........... 18

Frequency Outputs..................................................................... 18

No-Load Threshold........................................................................ 19

Negative Power Information..................................................... 19

Evaluation Board and Reference Design Board......................... 20

Outline Dimensions....................................................................... 21

Ordering Guide .......................................................................... 21

REVISION HISTORY

2/05—Preliminary Version

Rev. PrE | Page 2 of 24

Preliminary Technical Data ADE7757A

SPECIFICATIONS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
otherwise noted.

Table 1.

Parameter Value Unit Test Conditions/Comments

ACCURACY

Measurement Error1 on Channel V1 0.1 % reading typ

1, 2

Channel V2 with full-scale signal (±165 mV), 25°C over a
dynamic range 500 to 1, line frequency = 45 Hz to 65 Hz

Phase Error1 Between Channels

V1 Phase Lead 37° (PF = 0.8 Capacitive) ±0.1 Degrees (°) max
V1 Phase Lag 60° (PF = 0.5 Inductive) ±0.1 Degrees (°) max

AC Power Supply Rejection1

Output Frequency Variation (CF) 0.2 % reading typ

S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms @ 50
Hz, ripple on V

DD

DC Power Supply Rejection1

Output Frequency Variation (CF) ±0.3 % Reading typ

S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms,
VDD = 5 V ± 250 mV

ANALOG INPUTS See the Analog Inputs section

Channel V1 Maximum Signal Level ±30 mV max V1P and V1N to AGND
Channel V2 Maximum Signal Level ±165 mV max V2P and V2N to AGND
Input Impedance (DC) 320

kΩ min

OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
Bandwidth (–3 dB) 7 kHz nominal OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
ADC Offset Error

1, 2

±18 mV max

See the Terminology and Typical Performance

Characteristics sections
Gain Error1 ±4 % ideal typ

External 2.5 V reference, V1 = 21.2 mV rms,

V2 = 116.7 mV rms

OSCILLATOR FREQUENCY (OSC) 450 kHz nominal RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C

Oscillator Frequency Tolerance1 ±12 % reading typ
Oscillator Frequency Stability1 ±30 ppm/°C typ

REFERENCE INPUT

REF

Input Voltage Range 2.65 V max 2.45 V nominal

IN/OUT

2.25 V min 2.45 V nominal
Input Capacitance 10 pF max

ON-CHIP REFERENCE 2.45 V nominal

Reference Error ±200 mV max
Temperature Coefficient ±20 ppm/°C typ

LOGIC INPUTS3

SCF, S0, S1

Input High Voltage, V
Input Low Voltage, V

2.4 V min VDD = 5 V ± 5%

INH

0.8 V max VDD = 5 V ± 5%

INL

Input Current, IIN ±1 µA max Typically 10 nA, VIN = 0 V to VDD
Input Capacitance, CIN 10 pF max

LOGIC OUTPUTS3

F1 and F2

Output High Voltage, VOH 4.5 V min I

= 10 mA, VDD = 5 V, I

SOURCE

Output Low Voltage, VOL 0.5 V max

CF

Output High Voltage, VOH 4 V min I

= 5 mA, VDD = 5 V, I

SOURCE

Output Low Voltage, VOL 0.5 V max

Frequency Output Error

1, 2

(CF) ±10 % ideal typ

External 2.5 V reference, V1 = 21.2 mV rms,

V2 = 116.7 mV rms

MIN

to T

= −40°C to +85°C, unless

MAX

of 200 mV rms @ 100 Hz

= 10 mA, VDD = 5 V

SINK

= 5 mA, VDD = 5 V

SINK

Rev. PrE | Page 3 of 24

ADE7757A Preliminary Technical Data

Parameter Value Unit Test Conditions/Comments

POWER SUPPLY For specified performance

VDD 4.75 V min 5 V – 5%

5.25 V max 5 V + 5%
IDD 5 mA max Typically 4 mA

1

See the Terminology section for an explanation of specifications.

2

See plots in the Typical Performance Characteristics section.

3

Sample tested during initial release and after any redesign or process change that may affect this parameter.

TIMING CHARACTERISTICS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
otherwise noted.

Sample tested during initial release and after any redesign or process change that may affect this parameter. See Figure 2.

Table 2.

Parameter Specifications Unit Test Conditions/Comments

1

t

120 ms F1 and F2 pulse width (logic low).

1

t2 See Table 6 sec Output pulse period. See the Transfer Function section.
t3 1/2 t2 sec Time between F1 falling edge and F2 falling edge.

1, 2

t

90 ms CF pulse width (logic high).

4

t5 See Table 7 sec CF pulse period. See the Transfer Function section.
t6 2 µs Minimum time between F1 and F2 pulses.

1

The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.

2

The CF pulse is always 35 µs in high frequency mode. See the Frequency Outputs section and Table 7.

to T

MIN

= –40°C to +85°C, unless

MAX

t

1

F1

t

6

t

2

F2

CF

t

3

t

4

t

5

05330-002

Figure 2. Timing Diagram for Frequency Outputs

Rev. PrE | Page 4 of 24

Preliminary Technical Data ADE7757A

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Values

VDD to AGND

VDD to DGND –0.3 V to +7 V
Analog Input Voltage to AGND

V1P, V1N, V2P, and V2N –6 V to +6 V

Reference Input Voltage to AGND –0.3 V to VDD + 0.3 V
Digital Input Voltage to DGND –0.3 V to VDD + 0.3 V
Digital Output Voltage to DGND –0.3 V to VDD + 0.3 V
Operating Temperature Range

Industrial (A, B Versions) –40°C to +85°C

Storage Temperature Range –65°C to +150°C
Junction Temperature 150°C
16-Lead Plastic SOIC, Power Dissipation 350 mW

θJA Thermal Impedance1

Lead Temperature, Soldering

Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C

1

JEDEC 1S standard (2-layer) board data.

−0.3 V to +7 V

124.9°C/W

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada­tion or loss of functionality.

Rev. PrE | Page 5 of 24

ADE7757A Preliminary Technical Data

TERMINOLOGY

Measurement Error

The error associated with the energy measurement made by the
ADE7757A is defined by the following formula:

7757

−

% ×

=

Error

Phase Error Between Channels

The high-pass filter (HPF) in the current channel (Channel V1)
has a phase-lead response. To offset this phase response and
equalize the phase response between channels, a phase­correction network is also placed in Channel V1. The phase­correction network matches the phase to within 0.1° over a
range of 45 Hz to 65 Hz, and 0.2° over a range 40 Hz to 1 kHz
(see Figure 23 and Figure 24).

Power Supply Rejection

This quantifies the ADE7757A measurement error as a
percentage of reading when the power supplies are varied.

For the ac PSR measurement, a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading is obtained under the
same input signal levels. Any error introduced is expressed as a
percentage of reading—see the Measurement Error definition.

For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supplies are then varied 5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.

EnergyTrue

EnergyTrueADEbyRegisteredEnergy

%100

ADC Offset Error

This refers to the small dc signal (offset) associated with the
analog inputs to the ADCs. However, the HPF in Channel V1
eliminates the offset in the circuitry. Therefore, the power
calculation is not affected by this offset.

Frequency Output Error (CF)

The frequency output error of the ADE7757A is defined as the
difference between the measured output frequency (minus the
offset) and the ideal output frequency. The difference is
expressed as a percentage of the ideal frequency. The ideal
frequency is obtained from the ADE7757A transfer function.

Gain Error

The gain error of the ADE7757A is defined as the difference
between the measured output of the ADCs (minus the offset)
and the ideal output of the ADCs. The difference is expressed
as a percentage of the ideal output of the ADCs.

Oscillator Frequency Tolerance

The oscillator frequency tolerance of the ADE7757A is defined
as the part-to-part frequency variation in terms of percentage
at room temperature (25°C). It is measured by taking the
difference between the measured oscillator frequency and the
nominal frequency defined in the Specifications section.

Oscillator Frequency Stability

The frequency variation in terms of the parts-per-million drift
over the operating temperature range. In a metering application,
the temperature range is −40°C to +85°C. Oscillator frequency
stability is measured by taking the difference between the
measured oscillator frequency at –40°C and +85°C and the
measured oscillator frequency at +25°C.

Rev. PrE | Page 6 of 24

Preliminary Technical Data ADE7757A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 VDD

Power Supply. This pin provides the supply voltage for the circuitry in the ADE7757A. The supply voltage
should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 µF
capacitor in parallel with a ceramic 100 nF capacitor.

2, 3 V2P, V2N

Analog Inputs for Channel V2 (Voltage Channel). These inputs provide a fully differential input pair. The
maximum differential input voltage is ±165 mV for specified operation. Both inputs have internal ESD
protection circuitry; an overvoltage of ±6 V can be sustained on these inputs without risk of permanent
damage.

4, 5 V1N, V1P

Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum signal level of ±30 mV with respect to the V1N pin for specified operation. Both inputs have
internal ESD protection circuitry and, in addition, an overvoltage of ±6 V can be sustained on these inputs
without risk of permanent damage.

6 AGND

This pin provides the ground reference for the analog circuitry in the ADE7757A, that is, the ADCs and
reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the
ground reference for all analog circuitry, such as antialiasing filters, current and voltage sensors, and so forth.
For accurate noise suppression, the analog ground plane should be connected to the digital ground plane at
only one point. A star ground configuration helps to keep noisy digital currents away from the analog
circuits.

7 REF

IN/OUT

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.45 V
and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at
this pin. In either case, this pin should be decoupled to AGND with a 1 µF tantalum capacitor and a 100 nF
ceramic capacitor. The internal reference cannot be used to drive an external load.

8 SCF

Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF.
Table 7 shows calibration frequencies selection.

9, 10 S1, S0

These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
With this logic input, designers have greater flexibility when designing an energy meter. See the Selecting a
Frequency for an Energy Meter Application section.

11 RCLKIN

To enable the internal oscillator as a clock source to the chip, a precise low temperature drift resistor at a
nominal value of 6.2 kΩ must be connected from this pin to DGND.

12 REVP

This logic output goes high when negative power is detected, such as when the phase angle between the
voltage and current signals is greater than 90°. This output is not latched and is reset when positive power is
once again detected. The output goes high or low at the same time that a pulse is issued on CF.

13 DGND

This pin provides the ground reference for the digital circuitry in the ADE7757A, that is, the multiplier, filters,
and digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The digital
ground plane is the ground reference for all digital circuitry, for example, counters (mechanical and digital),
MCUs, and indicator LEDs. For accurate noise suppression, the analog ground plane should be connected to
the digital ground plane at one point only—a star ground.

14 CF

Calibration Frequency Logic Output. The CF logic output provides instantaneous real power information. This
output is intended for calibration purposes (also see the SCF pin description).

15, 16 F2, F1

Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can be
used to directly drive electromechanical counters and 2-phase stepper motors. See the Transfer Function
section.

V

1

DD

V2P

2
3

V2N

ADE7757A

V1N

4

TOP VIEW

(Not to Scale)

V1P

5
6

AGND

REF

IN/OUT

SCF

7
8

Figure 3. Pin Configuration

16
15
14
13
12
11
10

9

F1
F2
CF
DGND
REVP
RCLKIN
S0
S1

05330-003

Rev. PrE | Page 7 of 24

ADE7757A Preliminary Technical Data

2

TYPICAL PERFORMANCE CHARACTERISTICS

V

DD

+

10µF

16
15
14

820Ω

12

6.2kΩ

11

10

9
8

10nF 10nF 10nF

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100

U3

1

2 3

K7

4

K8

PS2501-1

V

DD

10kΩ

05330-004

CURRENT CHANNEL (% of Full Scale)

–40°C

+25°C

+85°C

05330-021

602kΩ

1µF

200Ω

+

150nF

150nF

+

–40°C

20V

40A TO

40mA

350µΩ

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

+25°C

100nF

1

V

DD

U1

RCLKIN

DGND

13

F1
F2

CF

REVP

S0
S1

SCF

200Ω

200Ω

150nF

200Ω

150nF

100nF

2

V2P

ADE7757A

3

V2N

5

V1P

4

V1N

7

REF

IN/OUT

AGND

6

Figure 4. Test Circuit for Performance Curves

+85°C

05330-019

Figure 5. Error as a % of Reading over Temperature

with On-Chip Reference (PF = 1)

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

+25°C, PF = 0.5 IND

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

+85°C, PF = 0.5 IND

+25°C, PF = 1

–40°C, PF = 0.5 IND

05330-020

Figure 6. Error as a % of Reading over Temperature

with On-Chip Reference (PF = 0.5)

Rev. PrE | Page 8 of 24

Figure 7. Error as a % of Reading over Temperature

with External Reference (PF = 1)

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

–40°C, PF = 0.5 IND

+25°C, PF = 1

+25°C, PF = 0.5 IND

+85°C, PF = 0.5 IND

Figure 8. Error as a % of Reading over Temperature

with External Reference (PF = 0.5)

05330-022

Preliminary Technical Data ADE7757A

40

MEAN = 2.247828
SDs = 1.367176
MIN = –2.09932
MAX = 5.28288
NO. OF POINTS = 100

30

20

FREQUENCY

10

EXTERNAL REFERENCE

TEMPERATURE = 25°C

Figure 9. Error as a % of Reading over Input Frequency

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100

5.25V

5V

4.75V

CURRENT CHANNEL (% of Full Scale)

Figure 10. PSR with Internal Reference, PF = 1

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

ERROR (% of Reading)

–0.6

–0.8

–1.0

0.1 101 100
CURRENT CHANNEL (% of Full Scale)

5.25V

5V

4.75V

05330-023

05330-024

0

–5–4–3–2–10123456789

CHANNEL V1 OFFSET (mV)

Figure 12. Channel V1 Offset Distribution

50

MEAN = –1.563484
SDs = 2.040699
MIN = –6.82969
MAX = 2.6119

40

NO. OF POINTS = 100

30

20

FREQUENCY

10

0

–12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12

CHANNEL V2 OFFSET (mV)

EXTERNAL REFERENCE

TEMPERATURE = 25°C

Figure 13. Channel V2 Offset Distribution

1000

MEAN = 0%
SDs = 1.55%
MIN = –11.79%
MAX = 6.08%

800

NO. OF POINTS = 3387

600

400

FREQUENCY

200

0

–10 –8 –6 –4 –2 0 2 4 6 8 10 12

DEVIATION FROM MEAN (%)

EXTERNAL REFERENCE

TEMPERATURE = 25°C

05330-025

05330-026

05330-027

Figure 11. PSR with External Reference, PF = 1

Figure 14. Part-to-Part CF Distribution from Mean

Rev. PrE | Page 9 of 24

ADE7757A Preliminary Technical Data

THEORY OF OPERATION

The two ADCs in the ADE7757A digitize the voltage signals
from the current and voltage sensors. These ADCs are 16-bit
Σ-Δ with an oversampling rate of 450 kHz. This analog input
structure greatly simplifies sensor interfacing by providing a
wide dynamic range for direct connection to the sensor and also
simplifies the antialiasing filter design. A high-pass filter in the
current channel removes any dc component from the current
signal. This eliminates any inaccuracies in the real power
calculation due to offsets in the voltage or current signals.
Because the HPF is always enabled, the IC operates only with ac
input (see the HPF and Offset Effects section).

The real power calculation is derived from the instantaneous
power signal. The instantaneous power signal is generated by
a direct multiplication of the current and voltage signals. In
order to extract the real power component (that is, the dc
component), the instantaneous power signal is low-pass filtered.
Figure 15 illustrates the instantaneous real power signal and
shows how the real power information can be extracted by low­pass filtering the instantaneous power signal. This scheme
correctly calculates real power for sinusoidal current and
voltage waveforms at all power factors. All signal processing is
carried out in the digital domain for superior stability over
temperature and time.

DIGITAL-TO-

CH1

CH2

ADC

MULTIPLIER

ADC

HPF

LPF

FREQUENCY

DIGITAL-TO­FREQUENCY

F1
F2

CF

POWER FACTOR CONSIDERATIONS

The method used to extract the real power information from
the instantaneous power signal (that is, by low-pass filtering) is
still valid even when the voltage and current signals are not in
phase. Figure 16 displays the unity power factor condition and
a displacement power factor (DPF) = 0.5—that is, the current
signal lagging the voltage by 60. Assuming the voltage and
current waveforms are sinusoidal, the real power component of
the instantaneous power signal (the dc term) is given by

IV

×

⎞

⎛
⎜

2

⎝

This is the correct real power calculation.

POWER

V × I

2

0V

POWER

V × I

COS (60°)

2

0V

()

⎟

60cos

⎠

INSTANTANEOUS

POWER SIGNAL

CURRENT
VOLTAGE

INSTANTANEOUS

POWER SIGNAL

°×

(1)

INSTANTANEOUS REAL

POWER SIGNAL

TIME

INSTANTANEOUS REAL

POWER SIGNAL

TIME

INSTANTANEOUS

POWER SIGNAL – p(t)

TIME TIME

Figure 15. Signal Processing Block Diagram

INSTANTANEOUS REAL

POWER SIGNAL

The low frequency outputs (F1, F2) of the ADE7757A are
generated by accumulating this real power information. This
low frequency inherently means a long accumulation time
between output pulses. Consequently, the resulting output
frequency is proportional to the average real power. This
average real power information is then accumulated (for
example, by a counter) to generate real energy information.
Conversely, due to its high output frequency and hence shorter
integration time, the CF output frequency is proportional to the
instantaneous real power. This is useful for system calibration,
which can be done faster under steady load conditions.

Rev. PrE | Page 10 of 24

05330-005

VOLTAGE CURRENT

Figure 16. DC Component of Instantaneous Power Signal Conveys Real

60°

Power Information, PF < 1

05330-006

Preliminary Technical Data ADE7757A

NONSINUSOIDAL VOLTAGE AND CURRENT

The real power calculation method also holds true for non­sinusoidal current and voltage waveforms. All voltage and
current waveforms in practical applications have some
harmonic content. Using the Fourier Transform, instantaneous
voltage and current waveforms can be expressed in terms of
their harmonic content.

∑

∞

0h

≠

()

thVVtv

αω

sin2)( (2)

h0

+××+=

h

where:

v(t) is the instantaneous voltage.
V

is the average value.

0

Vh is the rms value of voltage harmonic h.

α

is the phase angle of the voltage harmonic.

h

∑

∞

≠

oh

()

+××+=

ω

sin2)( (3)

hO

βthIIti

h

where:

i(t) is the instantaneous current.
I

is the dc component.

0

Ih is the rms value of current harmonic h.

β is the phase angle of the current harmonic.

h

Using Equations 1 and 2, the real power
terms of its fundamental real power (

PH) as P = P1 + PH

power (

where

IVP

φ

cos×= (4)

1111

−=

αφ

β

11

1

and

∞

IVP

φ

cos×=

∑

hH

1h

≠

−=

αφ

β

hh

h

(5)

hh

In Equation 5, a harmonic real power component is generated
for every harmonic, provided that harmonic is present in both
the voltage and current waveforms. The power factor calcula­tion has previously been shown to be accurate in the case of a
pure sinusoid. Therefore, the harmonic real power must also
correctly account for the power factor because it is made up of a
series of pure sinusoids.

Note that the input bandwidth of the analog inputs is 7 kHz at
the nominal internal oscillator frequency of 450 kHz.

P can be expressed in

P

) and harmonic real

1

Rev. PrE | Page 11 of 24

ADE7757A Preliminary Technical Data

+

–

ANALOG INPUTS

CHANNEL V1 (CURRENT CHANNEL)

The voltage output from the current sensor is connected to the
ADE7757A here. Channel V1 is a fully differential voltage
input. V1P is the positive input with respect to V1N.

The maximum peak differential signal on Channel V1 should
be less than ±30 mV (21 mV rms for a pure sinusoidal signal)
for specified operation.

V1

30mV

V

30mV

DIFFERENTIAL INPUT

CM

±30mV MAX PEAK

COMMON MODE

±6.25mV MAX

AGND

V1P

V1

V1N

V

CM

05330-007

Figure 17. Maximum Signal Levels, Channel V1

The diagram in Figure 17 illustrates the maximum signal
levels on V1P and V1N. The maximum differential voltage is
±30 mV. The differential voltage signal on the inputs must be
referenced to a common mode, such as AGND. The maximum
common-mode signal is ±6.25 mV, as shown in Figure 17.

CHANNEL V2 (VOLTAGE CHANNEL)

The output of the line voltage sensor is connected to the
ADE7757A at this analog input. Channel V2 is a fully
differential voltage input with a maximum peak differential
signal of ±165 mV.

Figure 18 illustrates the maximum signal levels that can be
connected to the ADE7757A Channel V2.

V2

+165mV

DIFFERENTIAL INPUT

V

–165mV

CM

±165mV MAX PEAK

COMMON MODE

±25mV MAX

Figure 18. Maximum Signal Levels, Channel V2

AGND

V2P

V2

V2N

V

CM

05330-008

Channel V2 is usually driven from a common-mode voltage,
that is, the differential voltage signal on the input is referenced
to a common mode (usually AGND). The analog inputs of the
ADE7757A can be driven with common-mode voltages of up
to 25 mV with respect to AGND. However, best results are
achieved using a common mode equal to AGND.

TYPICAL CONNECTION DIAGRAMS

Figure 19 shows a typical connection diagram for Channel V1.
A shunt is the current sensor selected for this example because
of its low cost compared to other current sensors such as the
current transformer (CT). This IC is ideal for low current
meters.

R

F

SHUNT

AGND

PHASE NEUTRAL

±30mV

R

F

Figure 19. Typical Connection for Channel V1

Figure 20 shows a typical connection for Channel V2. Typically,
the ADE7757A is biased around the phase wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of R
convenient way of carrying out a gain calibration on a meter.

R

B

RA*

R

F

PHASENEUTRAL

Figure 20. Typical Connections for Channel V2

*RA>> RB + R

V1P

C

F

V1N

C

F

05330-009

, RB, and RF is also a

A

V2P

±165mV

C

F

R

F

V2N

C

F

F

05330-010

Rev. PrE | Page 12 of 24

Preliminary Technical Data ADE7757A

A

V

POWER SUPPLY MONITOR

The ADE7757A contains an on-chip power supply monitor.
The power supply (V

) is continuously monitored by the

DD

ADE7757A. If the supply is less than 4 V, the ADE7757A
becomes inactive. This is useful to ensure proper device
operation at power-up and power-down. The power supply
monitor has built in hysteresis and filtering that provide a high
degree of immunity to false triggering from noisy supplies.

In Figure 21, the trigger level is nominally set at 4 V. The toler­ance on this trigger level is within ±5%. The power supply and
decoupling for the part should be such that the ripple at V

DD

does not exceed 5 V ± 5% as specified for normal operation.

V

DD

5V
4V

0V

TIME

INTERNAL

CTIVATION

INACTIVE ACTIVE INACTIVE

05330-011

Figure 21. On-Chip Power Supply Monitor

HPF AND OFFSET EFFECTS

Figure 22 illustrates the effect of offsets on the real power
calculation. As can be seen, offsets on Channel V1 and Channel
V2 contribute a dc component after multiplication. Because this
dc component is extracted by the LPF and used to generate the
real power information, the offsets contribute a constant error
to the real power calculation. This problem is easily avoided by
the built-in HPF in Channel V1. By removing the offsets from
at least one channel, no error component can be generated at dc
by the multiplication. Error terms at the line frequency (
removed by the LPF and the digital-to-frequency conversion
(see the Digital-to-Frequency Conversion section).

Equation 6 shows how the power calculation is affected by the
dc offsets in the current and voltage channels.

(){}(){}

coscos (6)

ItIVtV +×+

ωω

OSOS

ω) are

× I

OS

OS

V × I

2

Figure 22. Effect of Channel Offset on the Real Power Calculation

The HPF in Channel V1 has an associated phase response that
is compensated for on chip. Figure 23 and Figure 24 show the
phase error between channels with the compensation network
activated. The ADE7757A is phase compensated up to 1 kHz as
shown. This ensures correct active harmonic power calculation
even at low power factors.

0.30

0.25

0.20

0.15

0.10

0.05

PHASE (Degrees)

0

–0.05

–0.10

0 100 200 300 400 500 600 700 800 900 1000

Figure 23. Phase Error between Channels (0 Hz to 1 kHz)

0.30

0.25

0.20

0.15

0.10

0.05

PHASE (Degrees)

0

DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION

IOS× V
V

× I

OS

0

FREQUENCY (RAD/s)

FREQUENCY (Hz)

05330-012

05330-013

IV

×

=

2

IV

×

+

2

×

()

t

ω

2cos

() ()

×+×+×+

OSOSOSOS

tVItIVIV

ωω

coscos

Rev. PrE | Page 13 of 24

–0.05

–0.10

40 45 50 55 60 65 70

FREQUENCY (Hz)

Figure 24. Phase Error between Channels (40 Hz to 70 Hz)

05330-014

ADE7757A Preliminary Technical Data

DIGITAL-TO-FREQUENCY CONVERSION

As previously described, the digital output of the low-pass
filter after multiplication contains the real power information.
However, because this LPF is not an ideal brick wall filter
implementation, the output signal also contains attenuated
components at the line frequency and its harmonics—that is,
cos(h

ωt), where h = 1, 2, 3 . . . and so on.

The magnitude response of the filter is given by

fH+=

()

1

(7)

2

f

1

2

45.4

For a line frequency of 50 Hz, this gives an attenuation of
the 2

ω (100 Hz) component of approximately 22 dB. The

dominating harmonic is twice the line frequency (2

ω) due

to the instantaneous power calculation.

Figure 25 shows the instantaneous real power signal at the
output of the LPF that still contains a significant amount of
instantaneous power information, i.e., cos(2

ωt). This signal is

then passed to the digital-to-frequency converter where it is
integrated (accumulated) over time in order to produce an
output frequency. The accumulation of the signal suppresses
or averages out any non-dc components in the instantaneous
real power signal. The average value of a sinusoidal signal is
zero. Thus, the frequency generated by the ADE7757A is
proportional to the average real power. Figure 25 shows the
digital-to-frequency conversion for steady load conditions,
that is, constant voltage and current.

F1

DIGITAL-TO-

MULTIPLIER

V × I

2

V

I

LPF TO EXTRACT

REAL POWER

(DC TERM)

ATTENUATED BY LPF

LPF

COS (2ω)

FREQUENCY

DIGITAL-TO-

FREQUENCY

F1
F2

CF

CF

FREQUENCY FREQUENCY

TIME

TIME

Figure 25 shows that the frequency output CF varies over time,
even under steady load conditions. This frequency variation is
primarily due to the cos(2

ωt) component in the instantaneous

real power signal. The output frequency on CF can be up to
2048 times higher than the frequency on F1 and F2. This
higher output frequency is generated by accumulating the
instantaneous real power signal over a much shorter time while
converting it to a frequency. This shorter accumulation period
means less averaging of the cos(2

ωt) component. Consequently,

some of this instantaneous power signal passes through the
digital-to-frequency conversion. This is not a problem in the
application. Where CF is used for calibration purposes, the
frequency should be averaged by the frequency counter, which
removes any ripple. If CF is being used to measure energy, for
example in a microprocessor based application, the CF output
should also be averaged to calculate power.

Because the outputs F1 and F2 operate at a much lower
frequency, a lot more averaging of the instantaneous real power
signal is carried out. The result is a greatly attenuated sinusoidal
content and a virtually ripple-free frequency output.

0

INSTANTANEOUS REAL POWER SIGNAL

ω

FREQUENCY (RAD/s)

(FREQUENCY DOMAIN)

Figure 25. Real Power-to-Frequency Conversion

2ω

05330-015

Rev. PrE | Page 14 of 24

Preliminary Technical Data ADE7757A

CONNECTING TO A MICROCONTROLLER FOR ENERGY MEASUREMENT

The easiest way to interface the ADE7757A to a micro­controller is to use the CF high frequency output with the
output frequency scaling set to 2048 × F1, F2. This is done
by setting SCF = 0 and S0 = S1 = 1 (see Table 7). With full-scale
ac signals on the analog inputs, the output frequency on CF is
approximately 2.867 kHz. Figure 26 illustrates one scheme that
could be used to digitize the output frequency and carry out the
necessary averaging mentioned in the previous section.

CF

FREQUENCY

RIPPLE

POWER MEASUREMENT CONSIDERATIONS

Calculating and displaying power information always has some
associated ripple that depends on the integration period used
in the MCU to determine average power and also on the load.
For example, at light loads, the output frequency may be 10 Hz.
With an integration period of two seconds, only about 20 pulses
are counted. The possibility of missing one pulse always exists,
because the output frequency of the ADE7757A is running
asynchronously to the MCU timer. This results in a 1-in-20 or
5% error in the power measurement.

AVERAGE

FREQUENCY

TIME

ADE7757A

CF

Figure 26. Interfacing the ADE7757A to an MCU

COUNTER

MCU

TIMER

±

10%

05330-016

As shown, the frequency output CF is connected to an MCU
counter or port. This counts the number of pulses in a given
integration time, which is determined by an MCU internal
timer. The average power proportional to the average frequency
is given by

PowerAverageFrequencyAverage ==

Counter

Time

(8)

The energy consumed during an integration period is given by

Counter

TimePowerAverageEnergy =×=×=

Time

)9(CounterTime

For the purpose of calibration, this integration time could be
10 seconds to 20 seconds in order to accumulate enough pulses
to ensure correct averaging of the frequency. In normal
operation, the integration time could be reduced to one or two
seconds, depending, for example, on the required update rate of
a display. With shorter integration times on the MCU, the
amount of energy in each update may still have some small
amount of ripple, even under steady load conditions. However,
over a minute or more the measured energy has no ripple.

Rev. PrE | Page 15 of 24

ADE7757A Preliminary Technical Data

INTERNAL OSCILLATOR (OSC)

The nominal internal oscillator frequency is 450 kHz when
used with RCLKIN, with a nominal value of 6.2 kΩ. The
frequency outputs are directly proportional to the oscillator
frequency, thus RCLKIN must have low tolerance and low
temperature drift to ensure stability and linearity of the chip.
The oscillator frequency is inversely proportional to the
RCLKIN, as shown in Figure 27. Although the internal
oscillator operates when used with RCLKIN values between

5.5 kΩ and 20 kΩ, choosing a value within the range of the
nominal value, as shown in Figure 27, is recommended.

490

480

470

460

450

440

430

FREQUENCY (kHz)

420

410

400

5.8 5.9 6.1 6.3 6.7

Figure 27. Effect of RCLKIN on Internal Oscillator Frequency (OSC)

6.0 6.2 6.4 6.5 6.6
RESISTANCE (k

Ω)

05330-017

Rev. PrE | Page 16 of 24

Preliminary Technical Data ADE7757A

TRANSFER FUNCTION

FREQUENCY OUTPUTS F1 AND F2

The ADE7757A calculates the product of two voltage signals
(on Channel V1 and Channel V2) and then low-pass filters this
product to extract real power information. This real power
information is then converted to a frequency. The frequency
information is output on F1 and F2 in the form of active low
pulses. The pulse rate at these outputs is relatively low, for
example, 0.175 Hz maximum for ac signals with S0 = S1 = 0
(see Table 6). This means that the frequency at these outputs is
generated from real power information accumulated over a
relatively long period of time. The result is an output frequency
that is proportional to the average real power. The averaging of
the real power signal is implicit to the digital-to-frequency
conversion. The output frequency or pulse rate is related to the
input voltage signals by the following equation:

Freq

75.494

=

V

REF

FV2V1

×××

41rmsrms

−

2

(10)

where:

Freq = Output frequency on F1 and F2 (Hz).
V1

= Differential rms voltage signal on Channel V1 (V).

rms

V2

= Differential rms voltage signal on Channel V2 (V).

rms

V

= The reference voltage (2.45 V ±200 mV) (V).

REF

F

= One of four possible frequencies selected by using the

1-4

logic inputs S0 and S1 (see Table 5).

Table 5. F

S1 S0 OSC Relation1 F

Frequency Selection

1–4

at Nominal OSC (Hz)

1–4

2

0 0 OSC/219 0.86
0 1 OSC/218 1.72
1 0 OSC/217 3.43
1 1 OSC/216 6.86

1

F

is a binary fraction of the internal oscillator frequency (OSC).

1–4

2

Values are generated using the nominal frequency of 450 kHz.

EXAMPLE

In this example, with ac voltages of ±30 mV peak applied to
V1 and ±165 mV peak applied to V2, the expected output
frequency is calculated as follows:

F

= OSC/219 Hz, S0 = S1 = 0

1–4

V1

= 0.03/√2 V

rms

V2

= 0.165/√2 V

rms

V

= 2.45 V (nominal reference value)

REF

Note that if the on-chip reference is used, actual output
frequencies may vary from device to device due to the reference
tolerance of ±200 mV.

165.003.075.494

×××

F

=

Freq

××

1

2

45.222

F

1

(11)

175.0204.0

=×=

Table 6. Maximum Output Frequency on F1 and F2

S1 S0 OSC Relation Max Frequency1 or AC Inputs (Hz)

0 0 0.204 × F1 0.175
0 1 0.204 × F2 0.35
1 0 0.204 × F3 0.70
1 1 0.204 × F4 1.40

1

Values are generated using the nominal frequency of 450 kHz.

FREQUENCY OUTPUT CF

The pulse output CF (calibration frequency) is intended for
calibration purposes. The output pulse rate on CF can be up to
2048 times the pulse rate on F1 and F2. The lower the F
frequency selected, the higher the CF scaling (except for the
high frequency mode SCF = 0, S1 = S0 = 1). Table 7 shows
how the two frequencies are related, depending on the states
of the logic inputs S0, S1, and SCF. Due to its relatively high
pulse rate, the frequency at CF logic output is proportional to
the instantaneous real power. As with F1 and F2, CF is derived
from the output of the low-pass filter after multiplication.
However, because the output frequency is high, this real
power information is accumulated over a much shorter time.
Therefore, less averaging is carried out in the digital-to­frequency conversion. With much less averaging of the real
power signal, the CF output is much more responsive to power
fluctuations (see the signal processing block in Figure 15).

Table 7. Maximum Output Frequency on CF

SCF S1 S0 CF Max for AC Signals (Hz)1

1 0 0 128 × F1, F2 = 22.4
0 0 0 64 × F1, F2 = 11.2
1 0 1 64 × F1, F2 = 22.4
0 0 1 32 × F1, F2 = 11.2
1 1 0 32 × F1, F2 = 22.4
0 1 0 16 × F1, F2 = 11.2
1 1 1 16 × F1, F2 = 22.4
0 1 1 2048 × F1, F2 = 2.867 kHz

1

Values are generated using the nominal frequency of 450 kHz.

1–4

Rev. PrE | Page 17 of 24

ADE7757A Preliminary Technical Data

SELECTING A FREQUENCY FOR AN ENERGY METER APPLICATION

As shown in Table 5, the user can select one of four frequencies.
This frequency selection determines the maximum frequency
on F1 and F2. These outputs are intended for driving an energy
register (electromechanical or other). Because only four
different output frequencies can be selected, the available
frequency selection has been optimized for a meter constant
of 100 imp/kWh with a maximum current of between 10 A
and 120 A. Table 8 shows the output frequency for several
maximum currents (I

) with a line voltage of 220 V. In all

MAX

cases, the meter constant is 100 imp/kWh.

Table 8. F1 and F2 Frequency at 100 imp/kWh

I

(A) F1 and F2 (Hz)

MAX

12.5 0.076

25.0 0.153

40.0 0.244

60.0 0.367

80.0 0.489

120.0 0.733

The F

frequencies allow complete coverage of this range of

1–4

output frequencies (F1, F2). When designing an energy meter,
the nominal design voltage on Channel V2 (voltage) should be
set to half-scale to allow for calibration of the meter constant.
The current channel should also be no more than half-scale
when the meter sees maximum load. This allows over current
signals and signals with high crest factors to be accommodated.
Table 9 shows the output frequency on F1 and F2 when both
analog inputs are half-scale. The frequencies listed in Table 9
align very well with those listed in Table 8 for maximum load.

Table 9. F1 and F2 Frequency with Half-Scale AC Inputs

Frequency on F1 and F2—

S1 S0 F

0 0 0.86

1–4

(Hz)

CH1 and CH2 Half-Scale AC Input1

0.051 × F

1

0.044 Hz

0 1 1.72 0.051 × F2 0.088 Hz
1 0 3.43 0.051 × F3 0.176 Hz
1 1 6.86 0.051 × F4 0.352 Hz

1

Values are generated using the nominal frequency of 450 kHz.

When selecting a suitable F
the frequency output at I

frequency for a meter design,

1–4

(maximum load) with a meter

MAX

constant of 100 imp/kWh should be compared with column
four of Table 9. The closest frequency in Table 9 determines
the best choice of frequency (F

). For example, if a meter

1–4

with a maximum current of 25 A is being designed, the output
frequency on F1 and F2 with a meter constant of 100 imp/kWh
is 0.153 Hz at 25 A and 220 V (from Table 8). In Table 9, the
closest frequency to 0.153 Hz in column four is 0.176 Hz.
Therefore, F3 (3.43 Hz) is selected for this design (see Table 5).

FREQUENCY OUTPUTS

Figure 2 shows a timing diagram for the various frequency
outputs. The outputs F1 and F2 are the low frequency outputs
that can be used to directly drive a stepper motor or
electromechanical impulse counter. The F1 and F2 outputs
provide two alternating low frequency pulses. The F1 and F2
pulse widths (t1) are set such that if they fall below 240 ms
(0.24 Hz) they are set to half of their period. The maximum
output frequencies for F1 and F2 are shown in Table 6.

The high frequency CF output is intended to be used for
communications and calibration purposes. CF produces a
90-ms-wide active high pulse (t
to active power. The CF output frequencies are given in Table 7.
As with F1 and F2, if the period of CF (t
the CF pulse width is set to half the period. If the CF frequency,
for example, is 20 Hz, the CF pulse width is 25 ms.

When the high frequency mode is selected (that is, SCF = 0,
S1 = S0 = 1), the CF pulse width is fixed at 35 µs. Therefore, t
is always 35 µs, regardless of output frequency on CF.

) at a frequency proportional

4

) falls below 180 ms,

5

4

Rev. PrE | Page 18 of 24

Preliminary Technical Data ADE7757A

NO-LOAD THRESHOLD

The ADE7757A also includes a no-load threshold and start-up
current feature that eliminates any creep effects in the meter.
The ADE7757A is designed to issue a minimum output
frequency. Any load generating a frequency lower than this
minimum frequency does not cause a pulse to be issued on F1,
F2, or CF. The minimum output frequency is given as 0.00244%
for each of the F

frequency selections (see Table 5).

1–4

For example, for an energy meter with a meter constant of
100 imp/kWh on F1, F2 using F

(3.43 Hz), the minimum

3

output frequency at F1 or F2 would be 0.00244% of 3.43 Hz or

8.38 × 10

–5

Hz. This would be 2.68 × 10–3 Hz at CF (32 × F1 Hz)

when SCF = S0 = 1, S1 = 0. In this example, the no-load

threshold would be equivalent to 3 W of load or a start-up
current of 13.72 mA at 220 V. Compare this value to the
IEC62053-21 specification which states that the meter must
start up with a load equal to or less than 0.4% Ib. For a
5 A (Ib) meter, 0.4% of Ib is equivalent to 20 mA.

NEGATIVE POWER INFORMATION

The ADE7757A detects when the current and voltage channels
have a phase shift greater than 90°. This mechanism can detect
wrong connection of the meter or generation of negative power.
The REVP pin output goes active high when negative power is
detected and active low if positive power is detected. The REVP
pin output changes state as a pulse is issued on CF.

Rev. PrE | Page 19 of 24

ADE7757A Preliminary Technical Data

EVALUATION BOARD AND REFERENCE DESIGN BOARD

The evaluation board EVAL-ADE7757AEB can be used to
verify the functionality and the performance of the ADE7757A.
Documentation for the board can be downloaded from

http://www.analog.com/ADE7757A.

In addition, the reference design board ADE7757AAR-REF
and its Application Note (AN-679) can be used in the design
of a low cost watt-hour meter that surpasses IEC62053-21
accuracy specifications. The application note can be
downloaded from http://www.analog.com/UploadedFiles/

Application_Notes/3019622515113759387AN-679_0.pdf

Rev. PrE | Page 20 of 24

Preliminary Technical Data ADE7757A

OUTLINE DIMENSIONS

10.00 (0.3937)

9.80 (0.3858)

4.00 (0.1575)

3.80 (0.1496)

16

1

9

6.20 (0.2441)

5.80 (0.2283)

8

1.27 (0.0500)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

BSC

0.10

COMPLIANT TO JEDEC STANDARDS MS-012AC

1.75 (0.0689)

1.35 (0.0531)

0.51 (0.0201)

0.31 (0.0122)

SEATING
PLANE

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0197)

0.25 (0.0098)

8°
0°

1.27 (0.0500)

0.40 (0.0157)

× 45°

Figure 28. 16-Lead Standard Small Outline Package [SOIC]

Narrow Body [R-16]

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADE7757AAR −40°C to +85°C SOIC Narrow Body R-16
ADE7757AAR-RL −40°C to +85°C SOIC Narrow Body in Reel R-16
ADE7757AARZ1 −40°C to +85°C Lead-Free SOIC Narrow Body R-16
ADE7757AARZ-RL1 −40°C to +85°C Lead-Free SOIC Narrow Body in Reel R-16
EVAL-ADE7757AEB Evaluation Board
ADE7757AAR-REF Reference Design Board

1

Z = Pb-free part.

Rev. PrE | Page 21 of 24

ADE7757A Preliminary Technical Data

NOTES

Rev. PrE | Page 22 of 24

Preliminary Technical Data ADE7757A

NOTES

Rev. PrE | Page 23 of 24

ADE7757A Preliminary Technical Data

NOTES

© 2005 Analog Devices, Inc. All rights reserved. Trade marks and
registered trade marks are the property of their respective owners.

PR05330-0-3/05(PrE)

Rev. PrE | Page 24 of 24