0.2% resolution and 0.1% accuracy
Mask programmable voltage regulator: 0.4% accuracy
Upper 6 buffers swing to V
Lower 6 buffers swing to GND
Single-supply operation: 7.5 V to 16 V
Gamma current drive: 15 mA per channel
peak output current: 250 mA
V
COM
Outputs stable under load conditions
48-lead, Pb-free LFCSP package
APPLICATIONS
LCD TV panels
LCD monitor panels
PRODUCT OVERVIEW
The ADD8707 is a 12-channel integrated gamma reference with
VCOM for use in LCD TV and monitor panels. The output
buffers feature high current drive and low offset voltage to
provide an accurate and stable gamma curve. The top six
channels swing to VDD and the lower six channels swing to
GND.
Integrating the gamma setup resistors drastically reduces the
external component count while increasing the gamma curve
accuracy. To accommodate multiple column drivers and panel
architectures, the ADD8707 is mask-programmable to a 0.2%
resolution using the on-chip 500 resistor string. An on-board
voltage regulator provides a fixed input for the resistor string,
isolating the gamma curve from supply ripple.
The ADD8707 is specified over the temperature range of
–40°C to +105°C and comes in a 48-lead, Pb-free, lead frame
chip-scale package.
DD
with V
FUNCTIONAL BLOCK DIAGRAM
MASK-PROGRAMMABLE
REGULATOR RESISTORS
GND
V
11
IN
V
10
IN
V
8
IN
V
7
IN
V
6
IN
V
5
IN
V
3
IN
V
2
IN
1
V
IN
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
*ESD PROTECTION RESISTORS
and Regulator
COM
FB
700Ω*
+
1.2V
–
PROGRAMMABLE
GAMMA RESISTORS
MASK-
Figure 1. 48-Lead LFCSP
ADD8707
COM IN–
V
V
GAMMA
BUFFERS
COM IN+
V
COM
V
COM OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
12
11
10
9
8
7
6
5
4
3
2
1
04712-001
REG OUT
V
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Gamma curve accuracy includes resistor matching and buffer errors, but excludes the regulator error.
2
∆V
is the shift from the desired output voltage under the specified current load.
COM
3
Total error is defined as the difference between the designed and actual output voltage divided by the actual regulator output voltage or full-scale voltage.
4
Total error includes regulator error, resistor string error, bias current effects, and buffer offset voltage.
4
V
TOTAL ERROR
DD
SY
–40°C ≤ TA ≤ +105°C 0.5 3 %
7.5 16 V
No load, –40°C ≤ TA ≤ +105°C 8.3 15 mA
Rev. A | Page 4 of 20
ADD8707
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage (VDD) 18 V
Input Voltage
Storage Temperature Range
Operating Temperature Range
1
−0.5 V to V
DD
−65°C to +150°C
−40°C to +105°C
Lead Temperature Range (Soldering 10 sec) 300°C
Junction Temperature 150°C
ESD Tolerance (HBM) ±3000 V
ESD Tolerance (MM) ±100 V
Table 3. Thermal Resistance
Package Type
2
θ
JA
3
θ
JA
Unit
48-Lead LFCSP (CP) 28.3 47.7 °C/W
1
See the Applications Information section.
2
θJA for exposed pad soldered to JEDEC 4-layer board.
3
θJA for exposed pad not soldered down.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 20
ADD8707
PIN CONFIGURATION AND FUNCTION DESCRIPTION
12
11
10
9
8
7
OUT
OUT
OUT
OUT
OUT
OUT
DD
GND
V
V
2
1
–
IN
IN
V
V
COM IN
V
V
REG OUT
GND
V
V
V
V
V
ADD8707
TOP VIEW
(Not to Scale)
5
IN
NC
V
V
3
IN
V
NC
V
48 47 46 45 44 43 42 41 40 39 38 37
1
NC
2
V
3
DD
4
5
FB
NC
6
NC
7
8
11
IN
9
10
IN
10
NC
V
11
8
IN
12
NC
13 14 15 16 17 18 19 20 21 22 23 24
7
6
IN
IN
NC
V
V
Figure 2. 48-Lead LFCSP
6
OUT
V
+
COM IN
V
5
V
NC
OUT
NC
NC
36
35
34
33
32
31
30
29
28
27
26
25
NC
NC
NC
V
OUT
V
OUT
V
OUT
V
OUT
V
DD
GND
V
COM OUT
NC
NC
4
3
2
1
04712-0-002
Table 4. Pin Function Descriptions
Pin No. Name Description
1 NC
2 GND Ground. Normally 0 V.
3 V
4 V
DD
REG OUT
Supply voltage. Normally 16 V.
Regulator output voltage. Provides reference voltage to resistor string and is internally connected to the top of
the resistor string.
5 FB
Regulator feedback pin. Compares a percentage of the regulator output to the internal 1.2V voltage reference.
Internal resistors are used to program the desired regulator output voltage.
6 NC
7 NC
8 VIN11
9 VIN10
External resistors can be added to modify the internal resistor string to change the gamma voltage. An external resistor calculator is available upon request.
Rev. A | Page 6 of 20
ADD8707
Pin No. Name Description
25 NC
26 NC
27 V
COM OUT
28 GND Ground. Normally 0 V.
29 V
30 V
31 V
32 V
33 V
DD
OUT
OUT
OUT
OUT
1
2
3
4
34 NC
35 NC
36 NC
37 NC
38 V
39 V
OUT
OUT
5
6
40 GND Ground. Normally 0 V.
41 V
42 V
43 V
44 V
45 V
46 V
47 V
DD
OUT
OUT
OUT
OUT
OUT
OUT
7
8
9
10
11
12
48 NC
V
amplifier output.
COM
Supply voltage. Normally 16 V.
Buffer outputs. These buffers can swing to ground.
Buffer outputs. These buffers can swing to ground.
Supply voltage. Normally 16 V.
Buffer outputs. These buffers can swing to V
.
DD
Rev. A | Page 7 of 20
ADD8707
TYPICAL PERFORMANCE CHARACTERISTICS
20
15
10
5
0
–5
–10
–15
–20
–25
OUTPUT VOLTAGE ERROR (mV)
–30
–35
–20–100102030405060708090100110120
I
SOURCE
I
SINK
= 25mA
Figure 3. Output Voltage Error vs. Temperature
35
I
= 25mA
SINK
= 15mA
I
SOURCE
TEMPERATURE (°C)
= 15mA
I
LOAD
I
= 0mA
I
SOURCE
SINK
= 5mA
= 5mA
04712-003
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1110100
CH6 SOURCE
CH3 SOURCE
CH6 SINK
CH3 SINK
LOAD CURRENT (mA)
Figure 6. Output Voltage Error vs. Load Current (Channels 3 and 6)
30
04712-006
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1110100
LOAD CURRENT (mA)
CH11 SOURCE
CH12 SOURCE
CH11 SINK
CH12 SINK
Figure 4. Output Voltage Error vs. Load Current (Channels 11 and 12)
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1110100
CH7 SOURCE
CH10 SOURCE
CH10 SINK
CH7 SINK
LOAD CURRENT (mA)
Figure 5. Output Voltage Error vs. Load Current (Channels 7 and 10)
04712-004
04712-005
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1110100
CH2 SOURCE
CH1 SOURCE
CH1 SINK
CH2 SINK
LOAD CURRENT (mA)
Figure 7. Output Voltage Error vs. Load Current (Channels 1 and 2)
15
14
13
12
11
10
9
8
8
7
6
5
4
3
OUTPUT VOLTAGE ERROR (mV)
2
1
0
0.1110100
LOAD CURRENT (mA)
Figure 8. Output Voltage Error vs. Load Current ( V
V
SINK
COM
V
SOURCE
COM
)
COM
04712-007
04712-008
Rev. A | Page 8 of 20
ADD8707
1000
900
800
700
600
500
400
300
NUMBER OF AMPLIFIERS
200
100
0
–0.30 –0.18 –0.10 –0.02 0.060.140.220.30
GAMMA OUTPUT ERROR DUE TO OFFSET AND
RESISTOR MATCHING (% OF FS)
Figure 9. Gamma Output Voltage Error
35
30
25
20
15
10
NUMBER OF AMPLIFIERS
5
0
–10.0 –7.52.510.0
–5.0 –2.57.55.0
OUTPUT VOLTAGE ERROR (mV)
Figure 10. V
0
Offset Voltage
COM
04712-009
04712-010
0.3
MAX ERROR EACH STEP
0.2
0.1
0
ERROR (%)
–0.1
–0.2
–0.3
TYPICAL UNIT B
TYPICAL UNIT A
0123456789101112
OUTPUT CHANNEL
TYPICAL UNIT C
MIN ERROR EACH STEP
Figure 12. Gamma Output Error per Channel (920 Parts)
Figure 21. Gamma Buffers Transient Load Response vs. Capacitive Loading
Rev. A | Page 11 of 20
ADD8707
V
APPLICATION NOTES
The ADD8707 is a mask-programmable gamma reference
generator that allows source drivers to be optimized for the
different combinations of liquid crystals, glass sizes, etc. in
large LCD panels. It generates 12 gamma reference outputs
that can be mask-programmed in 0.2% increments using the
500 matched internal resistors (Figure 23), so that every point
on the curve can be targeted within 0.1% of the desired value.
TAP POINT 4
TAP POINT 3
TAP POINT 2
TAP POINT 1
EACH R = 30Ω
TYPICALLY
Figure 23. 500 Mask-Programmable Resistor String
In a typical panel application, the selected source drivers have
an internal gamma curve that is not ideal for the specific panel
(Figure 24). The ADD8707 allows the gamma curve in the
source drivers to be adjusted appropriately, and also insures that
all the source drivers have the same gamma curve.
16
14
12
10
8
6
PANEL GAMMA CURVE
CORRECTED BY ADD8707
GAMMA VOLTAGE (V)
4
2
0
Figure 24. Original and Corrected Gamma Cur ves
ORIGINAL GAMMA CURVE
IN SOURCE DRIVERS
GAMMA REFERENCE INPUT POINTS
TAP POINT 500
TAP POINT 499
TAP POINT 498
TAP POINT 497
04712-023
04712-024
The matching and tracking accuracy of the internal resistors is
typically 0.1% with worst-case deviation from the desired curve
within 0.4% of the ideal gamma curve, over temperature.
The ADD8707 also includes a low dropout linear regulator to
provide a stable reference level for the gamma curve for
optimum panel performance.
TAP POINT SELECTION
The ADD8707 uses a single resistor string consisting of 500
individual elements. The tap points are mask programmable
and completely independent of each other. Refer to the Tap
Point and Regulator Voltage Request Form in this data sheet.
V
REG OUT
500–TP
X
IN
X
TP
X
V
X
OUT
04712-025
Figure 25. Gamma Buffers Tap Point Circuit.
Tap point voltages can be derived from the following equation:
TP
X
V×=
where TP
XOUT
is the desired tap point for the Xth channel.
X
500
V
OUTREG
Table 5. Typical Mask Implementation
= 16 V, V
V
DD
= 14.4 V, 0 ≤ X ≤ 500
REG OUT
Tap Point (X) Voltage Units
V
12 500 14.400 V
OUT
V
11 419 12.067 V
OUT
V
10 365 10.512 V
OUT
V
9 349 10.051 V
OUT
V
8 343 9.878 V
OUT
V
7 297 8.554 V
OUT
V
6 213 6.134 V
OUT
V
5 173 4.982 V
OUT
V
4 163 4.694 V
OUT
V
3 146 4.205 V
OUT
V
2 95 2.736 V
OUT
V
1 7 0.202 V
OUT
Rev. A | Page 12 of 20
ADD8707
VOLTAGE REGULATOR
The on-board voltage regulator provides a regulated voltage to
the resistor chain to provide stable gamma voltages.
The output of the regulator is set by the two mask programmable internal resistors R1 and R2, and a reference voltage. In
the ADD8707, the typical values of these parts are shown in
Figure 26. To request a different regulator voltage, please refer
to the Tap Point and Regulator Voltage Request Form in this
data sheet.
R
2
R
5kΩ
V
REF
1.2V
Figure 26. Voltage Regulator
The internal resistors have a typical accuracy of 0.1%. External
resistors can be used to adjust the regulator voltage, though it is
not recommended. Contact a sales office for further details.
55kΩ
1
V
REG OUT
+
–
04712-026
LAND PATTERN
The LFCSP package comes with a thermal pad. Soldering
down this thermal pad dramatically improves the heat
dissipation of the package. It is necessary to attach vias that
connect the soldered thermal pad to another layer on the board.
This provides an avenue to dissipate the heat away from the
part. Without vias, the heat is isolated directly under the part.
Subdivide the solder paste, or stencil layer, for the thermal pad.
This reduces solder balling and splatter. It is not critical how the
subdivisions are arranged, as long as the total coverage of the
solder paste for the thermal pad is greater than 50%. The land
pattern is critical to heat dissipation. A suggested land pattern is
shown in Figure 27.
The thermal pad is attached to the substrate. In the ADD8707,
the substrate is connected to V
thermal pad should be soldered to an area on the board that is
electrically isolated or connected to V
pad to ground adversely affects the performance of the part.
. To be electrically safe, the
DD
. Attaching the thermal
DD
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADD8707 package
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, the glass transition temperature, the properties of the plastic change. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the parametric performance of the ADD8707. Exceeding a junction
temperature of 175°C for an extended period can result in
changes in the silicon devices, potentially causing failure.
Rev. A | Page 13 of 20
ADD8707
OPERATING TEMPERATURE RANGE
The junction temperature is as follows:
= T
T
J
where:
T
AMB
= junction-to-ambient thermal resistance, in °C/watt.
θ
JA
P
= power dissipated in the device, in watts.
DIS
For the ADD8707, P
where:
× IDQ = nominal system power requirements.
V
DD
I
OUT X(+)
dissipation (current comes from V
−I
OU XT(-)
dissipation (current goes to GND).
(V
DD
In this example, T
values in Table 6.
Table 6.
V
V
12 14.400 8.3 0.0133
OUT
V
11 12.067 7.9 0.0311
OUT
V
10 10.512
OUT
V
9 10.051
OUT
V
8 9.878 5.6 0.0343
OUT
V
7 8.554
OUT
V
6 6.134
OUT
V
5 4.982 5.7 0.0628
OUT
V
4 4.694 3.5 0.0396
OUT
V
3 4.205 9.6 0.113
OUT
V
2 2.736 9.5 0.126
OUT
V
1 0.202
OUT
Σ(I
OUT X(+)
+ θJA × P
AMB
DIS
= ambient temperature specified on the data sheet.
can be calculated by
DIS
= VDD × IDQ + Σ(I
P
DIS
Σ(−I
OUT X(-)
× (VDD − V
× V
– V
= negative-current amplifier load power
OUT X
) × I
REG OUT
OUT X
× (VDD − V
× V
) = positive-current amplifier load power
OUT X
= regulator load power dissipation.
LOAD
= 95°C. To calculate P
AMB
(V) I
)) + Σ(−I
OUT X
× (VDD − V
OUT X(+)
) + (VDD – V
OUTX
−4.5
−4.2
−3.3
−6.9
−7.2
OUT X(-)
OUT X
REG OUT
).
DD
, assume the
DIS
(mA) P (W)
OUT X
× V
)
OUT X
)) +
) × I
LOAD
0.0473
0.0422
0.0282
0.0423
0.00145
0.582
× IDQ = 16 V × 15 mA = 0.240 W.
V
DD
– V
(V
DD
= 0.240W + 0.582W + 0.008W = 0.830W.
P
DIS
REG OUT
) × I
= (16 V – 14.4 V) × 5 mA = 0.008 W.
LOAD
Example 1
Exposed pad soldered down with via θJA = 28.3°C/W:
T
= 95°C + (28.3°C/W) × (0.830 W) = 118.5°C
J
The maximum junction temperature that is guaranteed before
the part breaks down is 150°C. is The maximum process limit
is 125°C. Because T
is < 150°C and < 125°C, this example
J
demonstrates a condition where the part should perform within
process limits.
Example 2
Exposed pad not soldered down θJA = 47.7°C/W:
T
= 95°C + (47.7°C/W) × (0.830 W) = 134.6°C
J
In this example, T
is < 150°C but > 125°C. Although the part
J
should not exhibit any damage here, the process limits have
been exceeded. The part may no longer operate as intended.
These examples show that soldering down the exposed pad is
important for proper heat dissipation. Under the same powerup and loading conditions, the unsoldered part has a higher
temperature than the soldered part. Therefore, it is strongly
advised that the exposed pad be soldered down.
Rev. A | Page 14 of 20
ADD8707
7.31mm
SOLDER PASTE AREA
HEAT SINK
1.90mm
5.40mm
5.93mm
1.60mm
0.5mm
0.33mm DIAMETER
THERMAL VIA
1.60mm
0.69mm
0.075mm
0.075mm
0.28mm
5.78mm
04712-020
Figure 27. 48-Lead LFCSP (CP-48) Land Pattern—Dimensions shown in millimeters
Notes:
1. Gray area represents the board metallization.
2. White area represents the solder mask and vias.
3. Hatched area is for the heat sink solder paste.
4. The thermal pad is electrically active. The solder mask opening should be 0.150 mm larger than the pad size, resulting in
0.075 mm of clearance between the copper pad and solder mask.
For development purposes, the ADD8707 is available in a generic form without the tap points (see Figure 29). The typical applications
circuit for this part is shown in Figure 30. To order this version, refer to the Ordering Guide. The model listed is the development version.
V
REG OUT
FB
V
11
IN
10
IN
V
8
IN
V
7
IN
V
6
IN
V
5
IN
V
3
IN
V
2
IN
V
1
IN
700Ω*
1.2V
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
700Ω*
V
REG
+
–
V
COM IN–
V
COM IN+
V
GAMMA
BUFFERS
COM
V
COM OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
12
11
10
9
8
7
6
5
4
3
2
1
04712-029
*ESD PROTECTION RESISTORS
Figure 29. Block Diagram for ADD8707 Development Version (with No Tap Points)