Datasheet ADD8707 Datasheet (Analog Devices)

12-Channel Gamma Buffers

FEATURES

12 precision gamma reference outputs Mask-programmable gamma resistors:
0.2% resolution and 0.1% accuracy Mask programmable voltage regulator: 0.4% accuracy Upper 6 buffers swing to V Lower 6 buffers swing to GND Single-supply operation: 7.5 V to 16 V Gamma current drive: 15 mA per channel
peak output current: 250 mA
V
COM
Outputs stable under load conditions 48-lead, Pb-free LFCSP package

APPLICATIONS

LCD TV panels LCD monitor panels

PRODUCT OVERVIEW

The ADD8707 is a 12-channel integrated gamma reference with VCOM for use in LCD TV and monitor panels. The output buffers feature high current drive and low offset voltage to provide an accurate and stable gamma curve. The top six channels swing to VDD and the lower six channels swing to GND.
Integrating the gamma setup resistors drastically reduces the external component count while increasing the gamma curve accuracy. To accommodate multiple column drivers and panel architectures, the ADD8707 is mask-programmable to a 0.2% resolution using the on-chip 500 resistor string. An on-board voltage regulator provides a fixed input for the resistor string, isolating the gamma curve from supply ripple.
The ADD8707 is specified over the temperature range of –40°C to +105°C and comes in a 48-lead, Pb-free, lead frame chip-scale package.
DD
with V

FUNCTIONAL BLOCK DIAGRAM

MASK-PROGRAMMABLE REGULATOR RESISTORS
GND
V
11
IN
V
10
IN
V
8
IN
V
7
IN
V
6
IN
V
5
IN
V
3
IN
V
2
IN
1
V
IN
700*
700*
700*
700*
700*
700*
700*
700*
700*
*ESD PROTECTION RESISTORS
and Regulator
COM
FB
700*
+
1.2V –
PROGRAMMABLE
GAMMA RESISTORS
MASK-
Figure 1. 48-Lead LFCSP
ADD8707
COM IN–
V
V
GAMMA BUFFERS
COM IN+
V
COM
V
COM OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
12
11
10
9
8
7
6
5
4
3
2
1
04712-001
REG OUT
V
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADD8707
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 5
Pin Configuration and Function Description .............................. 6
Typical Performance Characteristics ............................................. 8
Application Notes ........................................................................... 12
Tap Point Selection ..................................................................... 12
Volt a ge R e gu l ator ....................................................................... 13
Maximum Power Dissipation ...................................................13
Land Pattern................................................................................ 13
Operating Temperature Range ................................................. 14
Typical Applications Ci r c u it ..........................................................16
Development Circuit...................................................................... 17
Tap Point and Regulator Voltage Request Form......................... 19
Regulator Section—V
...................................................... 19
REG OUT
Tap Point S ec t ion ........................................................................ 19
Outline Dimensions ....................................................................... 20
Ordering Guide........................................................................... 20
REVISION HISTORY
10/04—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Product Overview Section .......................................... 1
Changes to Figure 1.......................................................................... 1
Changes to Electrical Characteristics Section .............................. 3
Changes to Absolute Maximum Ratings Section......................... 5
Changes to Pin Configuration and Function Description.......... 6
Changes to Typical Performance Characteristics Section........... 8
Changes to Applications Notes Section....................................... 12
Changes to Figure 28, Typical Applications Circuit................... 16
Added Development Circuit Section........................................... 17
Added Tap Point and Regulator Voltage Request Form............ 19
Changes to Ordering Guide.......................................................... 20
7/04—Revision 0: Initial Version
Rev. A | Page 2 of 20
ADD8707

ELECTRICAL CHARACTERISTICS

VDD = 16 V, TA @ +25oC, unless otherwise noted.
Table 1.
Parameter Symbol Condition Min Typ Max Unit
GAMMA CURVE CHARACTERISTICS
Accuracy R Programming Resolution R Total Resistor String Value R
BUFFER CHARACTERISTICS
OUTPUTS
Output Voltage Range (Ch12 to Ch7) V Output Voltage Range (Ch6 to Ch1) V
Output vs. Load (Ch12, Ch11, Ch2, Ch1) Output vs. Load (Ch10 to Ch3)
INPUTS
Offset Voltage V Offset Voltage Drift
Input Bias Current I
Input Voltage Range (Ch12 to Ch7) V Input Voltage Range (Ch6 to Ch1) V
V
CHARACTERISTICS
COM
Offset Voltage V Input Range V
Peak Output Current I Continuous Output Current I Output vs. Load
BUFFER AND V
DYNAMIC PERFORMANCE
COM
Slew Rate SR RL = 10 kΩ, CL = 200 pF 4 6 V/µs Bandwidth BW −3dB, RL = 10 kΩ, CL = 200 pF 4.5 MHz Settling Time to 0.1%
Phase Margin Power Supply Rejection Ratio PSRR
VOLTAGE REGULATOR
Programmable Range V
Initial Regulator Accuracy V Dropout Voltage V
I Line Regulation REG Load Regulation REG
Maximum Load Current I
Feedback Reference Voltage V Feedback Input Bias Current I
ACC
RES
TOTAL
OUT
OUT
VV
OS
V
B
IN
IN
OS
IN
PK
OUT
V
t
S
φ
o
REG OUT
ACC
DO
O
REF
B FB
OUT
OUT
OS
COM
1
/T
LINE
LOAD
0.1 0.4 % 500 segments 0.2 % 15 kΩ
IL = 100 µA IL = 100 µA
2
IL = 20 mA 15 mV
2
IL = 5 mA 5 mV
1.4 V 0
V
DD
DD
1.4
V V
5 15 mV
40°C T
+105°C
A
40°C TA ≤ +105°C
1.4 V 0
20
0.5 1.5
DD
V
1.4
DD
µV/°C
µA
V V
5 15 mV
1.4
V
DD
1.4
V
250 mA 50 mA
2
IL = 30 mA 10 mV
1V step, RL = 10 kΩ, CL = 200 pF 1.1 µs RL = 10 kΩ, CL = 200 pF 55 Degrees
V
= 7 V to 17 V, −40°C ≤ TA +105°C
DD
5
No Load. V
= 14.4V 0.4 1.5 %
REG OUT
IL = 100 µA
= 5 mA 310 350 mV
L
VIN = 8.5 V to 16.5 V, V
= 8V 0.01 0.20 %/V
OUT
IO = 100 µA to 5 mA
40°C ≤ TA ≤ +105°C
68 90 dB
V
DD
0.6
V
100 150 mV
0.02 0.10 %/mA 5 mA
1.2 V
40°C ≤ TA ≤ +105°C −150
10 150 nA
Rev. A | Page 3 of 20
ADD8707
Parameter Symbol Condition Min Typ Max Unit
SYSTEM ACCURACY 10
Total Error3, POWER SUPPLY
Supply Voltage V
Supply Current I
1
Gamma curve accuracy includes resistor matching and buffer errors, but excludes the regulator error.
2
V
is the shift from the desired output voltage under the specified current load.
COM
3
Total error is defined as the difference between the designed and actual output voltage divided by the actual regulator output voltage or full-scale voltage.
4
Total error includes regulator error, resistor string error, bias current effects, and buffer offset voltage.
4
V
TOTAL ERROR
DD
SY
–40°C ≤ TA ≤ +105°C 0.5 3 %
7.5 16 V No load, –40°C ≤ TA ≤ +105°C 8.3 15 mA
Rev. A | Page 4 of 20
ADD8707

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
Supply Voltage (VDD) 18 V Input Voltage
Storage Temperature Range Operating Temperature Range
1
0.5 V to V
DD
65°C to +150°C
40°C to +105°C
Lead Temperature Range (Soldering 10 sec) 300°C Junction Temperature 150°C ESD Tolerance (HBM) ±3000 V ESD Tolerance (MM) ±100 V
Table 3. Thermal Resistance
Package Type
2
θ
JA
3
θ
JA
Unit
48-Lead LFCSP (CP) 28.3 47.7 °C/W
1
See the Applications Information section.
2
θJA for exposed pad soldered to JEDEC 4-layer board.
3
θJA for exposed pad not soldered down.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. A | Page 5 of 20
ADD8707

PIN CONFIGURATION AND FUNCTION DESCRIPTION

12
11
10
9
8
7
OUT
OUT
OUT
OUT
OUT
OUT
DD
GND
V
V
2
1
IN
IN
V
V
COM IN
V
V
REG OUT
GND
V V
V
V
V
ADD8707
TOP VIEW
(Not to Scale)
5
IN
NC
V
V
3
IN
V
NC
V
48 47 46 45 44 43 42 41 40 39 38 37
1
NC
2
V
3
DD
4
5
FB NC
6
NC
7
8
11
IN
9
10
IN
10
NC
V
11
8
IN
12
NC
13 14 15 16 17 18 19 20 21 22 23 24
7
6
IN
IN
NC
V
V
Figure 2. 48-Lead LFCSP
6
OUT
V
+
COM IN
V
5
V
NC
OUT
NC
NC
36
35
34
33
32
31
30
29
28
27
26
25
NC NC NC V
OUT
V
OUT
V
OUT
V
OUT
V
DD
GND V
COM OUT
NC NC
4 3 2 1
04712-0-002
Table 4. Pin Function Descriptions
Pin No. Name Description
1 NC 2 GND Ground. Normally 0 V. 3 V 4 V
DD
REG OUT
Supply voltage. Normally 16 V. Regulator output voltage. Provides reference voltage to resistor string and is internally connected to the top of
the resistor string.
5 FB
Regulator feedback pin. Compares a percentage of the regulator output to the internal 1.2V voltage reference.
Internal resistors are used to program the desired regulator output voltage. 6 NC 7 NC 8 VIN11 9 VIN10
Buffer inputs. Normally floating.
1
10 NC 11 VIN8 Buffer inputs. Normally floating.1 12 NC 13 NC 14 VIN7 15 VIN6
Buffer inputs. Normally floating.
1
16 VIN5 17 NC 18 VIN3 19 VIN2
Buffer inputs. Normally floating.
1
20 VIN1 21 V 22 V
COM IN
COM IN
- V + V
amplifier inverting input.
COM
amplifier non-inverting input.
COM
23 NC 24 NC
1
External resistors can be added to modify the internal resistor string to change the gamma voltage. An external resistor calculator is available upon request.
Rev. A | Page 6 of 20
ADD8707
Pin No. Name Description
25 NC 26 NC 27 V
COM OUT
28 GND Ground. Normally 0 V. 29 V 30 V 31 V 32 V 33 V
DD
OUT
OUT
OUT
OUT
1 2 3
4 34 NC 35 NC 36 NC 37 NC 38 V 39 V
OUT
OUT
5
6 40 GND Ground. Normally 0 V. 41 V 42 V 43 V 44 V 45 V 46 V 47 V
DD
OUT
OUT
OUT
OUT
OUT
OUT
7
8
9
10
11
12 48 NC
V
amplifier output.
COM
Supply voltage. Normally 16 V.
Buffer outputs. These buffers can swing to ground.
Buffer outputs. These buffers can swing to ground.
Supply voltage. Normally 16 V.
Buffer outputs. These buffers can swing to V
.
DD
Rev. A | Page 7 of 20
ADD8707

TYPICAL PERFORMANCE CHARACTERISTICS

20 15 10
5 0
–5 –10 –15 –20 –25
OUTPUT VOLTAGE ERROR (mV)
–30 –35
–20–100102030405060708090100110120
I
SOURCE
I
SINK
= 25mA
Figure 3. Output Voltage Error vs. Temperature
35
I
= 25mA
SINK
= 15mA
I
SOURCE
TEMPERATURE (°C)
= 15mA
I
LOAD
I
= 0mA
I
SOURCE
SINK
= 5mA
= 5mA
04712-003
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1 1 10 100
CH6 SOURCE
CH3 SOURCE
CH6 SINK
CH3 SINK
LOAD CURRENT (mA)
Figure 6. Output Voltage Error vs. Load Current (Channels 3 and 6)
30
04712-006
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1 1 10 100 LOAD CURRENT (mA)
CH11 SOURCE
CH12 SOURCE
CH11 SINK
CH12 SINK
Figure 4. Output Voltage Error vs. Load Current (Channels 11 and 12)
30
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1 1 10 100
CH7 SOURCE
CH10 SOURCE
CH10 SINK
CH7 SINK
LOAD CURRENT (mA)
Figure 5. Output Voltage Error vs. Load Current (Channels 7 and 10)
04712-004
04712-005
25
20
15
10
OUTPUT VOLTAGE ERROR (mV)
5
0
0.1 1 10 100
CH2 SOURCE
CH1 SOURCE
CH1 SINK
CH2 SINK
LOAD CURRENT (mA)
Figure 7. Output Voltage Error vs. Load Current (Channels 1 and 2)
15 14 13 12 11 10
9 8 8 7 6 5 4 3
OUTPUT VOLTAGE ERROR (mV)
2 1 0
0.1 1 10 100 LOAD CURRENT (mA)
Figure 8. Output Voltage Error vs. Load Current ( V
V
SINK
COM
V
SOURCE
COM
)
COM
04712-007
04712-008
Rev. A | Page 8 of 20
ADD8707
1000
900
800
700
600
500
400
300
NUMBER OF AMPLIFIERS
200
100
0
–0.30 –0.18 –0.10 –0.02 0.06 0.14 0.22 0.30
GAMMA OUTPUT ERROR DUE TO OFFSET AND
RESISTOR MATCHING (% OF FS)
Figure 9. Gamma Output Voltage Error
35
30
25
20
15
10
NUMBER OF AMPLIFIERS
5
0
–10.0 –7.5 2.5 10.0
–5.0 –2.5 7.55.0
OUTPUT VOLTAGE ERROR (mV)
Figure 10. V
0
Offset Voltage
COM
04712-009
04712-010
0.3 MAX ERROR EACH STEP
0.2
0.1
0
ERROR (%)
–0.1
–0.2
–0.3
TYPICAL UNIT B
TYPICAL UNIT A
0123456789101112
OUTPUT CHANNEL
TYPICAL UNIT C
MIN ERROR EACH STEP
Figure 12. Gamma Output Error per Channel (920 Parts)
15 14 13 12 11 10
9 8 7 6 5
OUTPUT VOLTAGE (V)
4 3 2 1 0
17 012345678910111213141516
INPUT VOLTAGE (V)
I
LOAD
I
LOAD
= 10mA
= 0mA
I
LOAD
= 5mA
Figure 13. Dropout Characteristics
04712-012
04712-013
35
30
25
20
15
10
NUMBER OF AMPLIFIERS
5
0
–500 –470 –440 –410 –380 –350 –320
Figure 11. V
INPUT BIAS CURRENT (nA)
Input Bias Current Distribution
COM
04712-0-011
Rev. A | Page 9 of 20
0
100
200
300
400
500
600
700
DROPOUT VOLTAGE (mV)
800
900
1000
01234567891011121314151617181920
OUTPUT CURRENT (mA)
Figure 14. Dropout Voltage vs. Output Current
04712-014
ADD8707
800 750 700 650 600 550 500 450 400 350 300 250 200
DROPOUT VOLTAGE (mV)
150 100
50
0
–25–15–5 5 152535455565758595105115
14.5
14.4
14.3
14.2
14.1
14.0
13.9
REGULATOR OUTPUT (V)
13.8
13.7
13.6 0 2 4 6 8 10 12 14 16 18 20
Figure 16. Regulator Output vs. I
14.45
14.40
14.35
14.30
REGULATOR OUTPUT (V)
14.25
14.20 –20–100 102030405060708090100110
10mA
TEMPERATURE (°C)
Figure 15. Dropout Voltage vs. Temperature
+25°C
+55°C
+85°C
+95°C
+105°C
LOAD CURRENT (mA)
over Temperature
LOAD
TEMPERATURE (°C)
Figure 17. Regulator Output vs. Temperature
5mA
0mA
0mA
5mA
–20°C
0°C
10mA
04712-015
04712-016
04712-017
18
17
16
INPUT VOLTAGE (V)
15
14
TIME (100µs/DIV)
C
LOAD
= 1µF
Figure 18. Regulator Line Transient Response
C
= 1µF
LOAD
0.1
LOAD CURRENT (mA)
5
TIME (100µs/DIV)
Figure 19. Regulator Load Transient Response
11 10
9 8 7 6 5 4 3
SUPPLY CURRENT (mA)
2 1 0
024681012141618
SUPPLY VOLTAGE (V)
Figure 20. Supply Current vs. Supply Voltage
400
200
0
–200
–400
OUTPUT VOLTAGE CHANGE (mV)
04712-0-018
40
20
0
–20
–40
OUTPUT VOLTAGE CHANGE (mV)
04712-0-019
04712-020
Rev. A | Page 10 of 20
ADD8707
8.8
8.7
8.6
8.5
8.4
8.3
SUPPLY CURRENT (mA)
8.2
8.1 –20 120100806040200
TEMPERATURE (°C)
Figure 22. Supply Current vs. Temperature
04712-022
AMPLITUDE (V)
11 10
9 8 7 6 5 4 3 2 1 0
–200 180016001400120010008006004002000
TIME (ns)
10V PULSE 120pF 320pF 520pF 1nF 10nF
04712-021
Figure 21. Gamma Buffers Transient Load Response vs. Capacitive Loading
Rev. A | Page 11 of 20
ADD8707
V

APPLICATION NOTES

The ADD8707 is a mask-programmable gamma reference generator that allows source drivers to be optimized for the different combinations of liquid crystals, glass sizes, etc. in large LCD panels. It generates 12 gamma reference outputs that can be mask-programmed in 0.2% increments using the 500 matched internal resistors (Figure 23), so that every point on the curve can be targeted within 0.1% of the desired value.
TAP POINT 4
TAP POINT 3
TAP POINT 2
TAP POINT 1
EACH R = 30 TYPICALLY
Figure 23. 500 Mask-Programmable Resistor String
In a typical panel application, the selected source drivers have an internal gamma curve that is not ideal for the specific panel (Figure 24). The ADD8707 allows the gamma curve in the source drivers to be adjusted appropriately, and also insures that all the source drivers have the same gamma curve.
16
14
12
10
8
6
PANEL GAMMA CURVE
CORRECTED BY ADD8707
GAMMA VOLTAGE (V)
4
2
0
Figure 24. Original and Corrected Gamma Cur ves
ORIGINAL GAMMA CURVE
IN SOURCE DRIVERS
GAMMA REFERENCE INPUT POINTS
TAP POINT 500
TAP POINT 499
TAP POINT 498
TAP POINT 497
04712-023
04712-024
The matching and tracking accuracy of the internal resistors is typically 0.1% with worst-case deviation from the desired curve within 0.4% of the ideal gamma curve, over temperature.
The ADD8707 also includes a low dropout linear regulator to provide a stable reference level for the gamma curve for optimum panel performance.

TAP POINT SELECTION

The ADD8707 uses a single resistor string consisting of 500 individual elements. The tap points are mask programmable and completely independent of each other. Refer to the Tap Point and Regulator Voltage Request Form in this data sheet.
V
REG OUT
500–TP
X
IN
X
TP
X
V
X
OUT
04712-025
Figure 25. Gamma Buffers Tap Point Circuit.
Tap point voltages can be derived from the following equation:
TP
X
V ×=
where TP
XOUT
is the desired tap point for the Xth channel.
X
500
V
OUTREG
Table 5. Typical Mask Implementation
= 16 V, V
V
DD
= 14.4 V, 0 ≤ X ≤ 500
REG OUT
Tap Point (X) Voltage Units
V
12 500 14.400 V
OUT
V
11 419 12.067 V
OUT
V
10 365 10.512 V
OUT
V
9 349 10.051 V
OUT
V
8 343 9.878 V
OUT
V
7 297 8.554 V
OUT
V
6 213 6.134 V
OUT
V
5 173 4.982 V
OUT
V
4 163 4.694 V
OUT
V
3 146 4.205 V
OUT
V
2 95 2.736 V
OUT
V
1 7 0.202 V
OUT
Rev. A | Page 12 of 20
ADD8707

VOLTAGE REGULATOR

The on-board voltage regulator provides a regulated voltage to the resistor chain to provide stable gamma voltages.
The output of the regulator is set by the two mask program­mable internal resistors R1 and R2, and a reference voltage. In the ADD8707, the typical values of these parts are shown in Figure 26. To request a different regulator voltage, please refer to the Tap Point and Regulator Voltage Request Form in this data sheet.
R
2
R
5k
V
REF
1.2V
Figure 26. Voltage Regulator
The internal resistors have a typical accuracy of 0.1%. External resistors can be used to adjust the regulator voltage, though it is not recommended. Contact a sales office for further details.
55k
1
V
REG OUT
+ –
04712-026

LAND PATTERN

The LFCSP package comes with a thermal pad. Soldering down this thermal pad dramatically improves the heat dissipation of the package. It is necessary to attach vias that connect the soldered thermal pad to another layer on the board. This provides an avenue to dissipate the heat away from the part. Without vias, the heat is isolated directly under the part.
Subdivide the solder paste, or stencil layer, for the thermal pad. This reduces solder balling and splatter. It is not critical how the subdivisions are arranged, as long as the total coverage of the solder paste for the thermal pad is greater than 50%. The land pattern is critical to heat dissipation. A suggested land pattern is shown in Figure 27.
The thermal pad is attached to the substrate. In the ADD8707, the substrate is connected to V thermal pad should be soldered to an area on the board that is electrically isolated or connected to V pad to ground adversely affects the performance of the part.
. To be electrically safe, the
DD
. Attaching the thermal
DD

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADD8707 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, the glass transition tempera­ture, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the para­metric performance of the ADD8707. Exceeding a junction temperature of 175°C for an extended period can result in changes in the silicon devices, potentially causing failure.
Rev. A | Page 13 of 20
ADD8707

OPERATING TEMPERATURE RANGE

The junction temperature is as follows:
= T
T
J
where:
T
AMB
= junction-to-ambient thermal resistance, in °C/watt.
θ
JA
P
= power dissipated in the device, in watts.
DIS
For the ADD8707, P
where:
× IDQ = nominal system power requirements.
V
DD
I
OUT X(+)
dissipation (current comes from V
−I
OU XT(-)
dissipation (current goes to GND). (V
DD
In this example, T values in Table 6.
Table 6.
V
V
12 14.400 8.3 0.0133
OUT
V
11 12.067 7.9 0.0311
OUT
V
10 10.512
OUT
V
9 10.051
OUT
V
8 9.878 5.6 0.0343
OUT
V
7 8.554
OUT
V
6 6.134
OUT
V
5 4.982 5.7 0.0628
OUT
V
4 4.694 3.5 0.0396
OUT
V
3 4.205 9.6 0.113
OUT
V
2 2.736 9.5 0.126
OUT
V
1 0.202
OUT
Σ(I
OUT X(+)
+ θJA × P
AMB
DIS
= ambient temperature specified on the data sheet.
can be calculated by
DIS
= VDD × IDQ + Σ(I
P
DIS
Σ(−I
OUT X(-)
× (VDD − V
× V
V
= negative-current amplifier load power
OUT X
) × I
REG OUT
OUT X
× (VDD V
× V
) = positive-current amplifier load power
OUT X
= regulator load power dissipation.
LOAD
= 95°C. To calculate P
AMB
(V) I
)) + Σ(−I
OUT X
× (VDD − V
OUT X(+)
) + (VDD – V
OUTX
4.5
4.2
3.3
6.9
7.2
OUT X(-)
OUT X
REG OUT
).
DD
, assume the
DIS
(mA) P (W)
OUT X
× V
)
OUT X
)) +
) × I
LOAD
0.0473
0.0422
0.0282
0.0423
0.00145
0.582
× IDQ = 16 V × 15 mA = 0.240 W.
V
DD
– V
(V
DD
= 0.240W + 0.582W + 0.008W = 0.830W.
P
DIS
REG OUT
) × I
= (16 V – 14.4 V) × 5 mA = 0.008 W.
LOAD
Example 1
Exposed pad soldered down with via θJA = 28.3°C/W:
T
= 95°C + (28.3°C/W) × (0.830 W) = 118.5°C
J
The maximum junction temperature that is guaranteed before the part breaks down is 150°C. is The maximum process limit is 125°C. Because T
is < 150°C and < 125°C, this example
J
demonstrates a condition where the part should perform within process limits.
Example 2
Exposed pad not soldered down θJA = 47.7°C/W:
T
= 95°C + (47.7°C/W) × (0.830 W) = 134.6°C
J
In this example, T
is < 150°C but > 125°C. Although the part
J
should not exhibit any damage here, the process limits have been exceeded. The part may no longer operate as intended.
These examples show that soldering down the exposed pad is important for proper heat dissipation. Under the same power­up and loading conditions, the unsoldered part has a higher temperature than the soldered part. Therefore, it is strongly advised that the exposed pad be soldered down.
Rev. A | Page 14 of 20
ADD8707
7.31mm
SOLDER PASTE AREA
HEAT SINK
1.90mm
5.40mm
5.93mm
1.60mm
0.5mm
0.33mm DIAMETER THERMAL VIA
1.60mm
0.69mm
0.075mm
0.075mm
0.28mm
5.78mm
04712-020
Figure 27. 48-Lead LFCSP (CP-48) Land Pattern—Dimensions shown in millimeters
Notes:
1. Gray area represents the board metallization.
2. White area represents the solder mask and vias.
3. Hatched area is for the heat sink solder paste.
4. The thermal pad is electrically active. The solder mask opening should be 0.150 mm larger than the pad size, resulting in
0.075 mm of clearance between the copper pad and solder mask.
Rev. A | Page 15 of 20
ADD8707

TYPICAL APPLICATIONS CIRCUIT

V
V
V
V
V
OPEN
NORMALLY
V
V
V
V
NORMALLY OPEN
FB
700*
5k
+
1.2V –
VOLTAGE REGULATOR
700*
11
IN
700*
10
IN
700*
8
IN
700*
7
IN
700*
6
IN
700*
5
IN
700*
3
IN
700*
2
IN
700*
1
IN
*ESD PROTECTION RESISTORS
0.1µF
V
REG OUT
55k
TP12 = 500
TP11 = 419
TP10 = 365
TP9 = 349
TP8 = 343
TP7 = 297
TP6 = 213
TP5 = 173
TP4 = 163
TP3 = 146
TP2 = 95
TP1 = 7
14.4V
V
COM IN+
V
COM IN–
V
14.4V
0
2.43
1.62
480
180
1.38k
2.52
1.20
300
510
1.53k
2.64k
COM
GAMMA BUFFERS
V
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
V
COM OUT
12
14.4V
11
12.067V
10
10.512V
9
10.051V
8
9.878V
7
8.554V
6
6.134V
5
4.982V
4
4.694V
3
4.205V
2
2.736V
1
0.202V
210
GND GND
Figure 28. Typical Applications Circuit
8.2k
4.7k
2k
PANEL V
0.1µF
ITO
3.3µF
COM
V 16V
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2
DD
GAMMA 1
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2 GAMMA 1
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2 GAMMA 1
04712-028
04712-028
Rev. A | Page 16 of 20
ADD8707
V

DEVELOPMENT CIRCUIT

For development purposes, the ADD8707 is available in a generic form without the tap points (see Figure 29). The typical applications circuit for this part is shown in Figure 30. To order this version, refer to the Ordering Guide. The model listed is the development version.
V
REG OUT
FB
V
11
IN
10
IN
V
8
IN
V
7
IN
V
6
IN
V
5
IN
V
3
IN
V
2
IN
V
1
IN
700*
1.2V
700*
700*
700*
700*
700*
700*
700*
700*
700*
V
REG
+ –
V
COM IN–
V
COM IN+
V
GAMMA BUFFERS
COM
V
COM OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
12
11
10
9
8
7
6
5
4
3
2
1
04712-029
*ESD PROTECTION RESISTORS
Figure 29. Block Diagram for ADD8707 Development Version (with No Tap Points)
Rev. A | Page 17 of 20
ADD8707
0.1µF V
COM IN+
14.4V
8.2k
4.7k
5k
V
V
IN
IN
V
V
V
V
V
V
V
PROTECTION
FB
11
10
8
IN
7
IN
6
IN
5
IN
3
IN
2
IN
1
IN
55k
ESD
RESISTOR
700
+
1.2V
ESD
PROTECTION
RESISTORS
700
700
700
700
700
700
700
700
700
V
REG OUT
VOLTAGE REGULATOR
14.4V
4.53k
TP9 = 349
5.58k
TP4 = 163
4.89k
GND
V
COM IN–
V
GAMMA BUFFERS
COM
V
COM OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
12
11
10
9
8
7
6
5
4
3
2
1
2k
PANEL V
ITO
0.1µF
3.3µF
COM
14.4V
10.051V
4.694V
V 16V
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2
DD
GAMMA 1
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2 GAMMA 1
GAMMA 12 GAMMA 11 GAMMA 10 GAMMA 9 GAMMA 8 GAMMA 7 GAMMA 6 GAMMA 5 GAMMA 4 GAMMA 3 GAMMA 2 GAMMA 1
04712-028
04712-030
Figure 30. Typical Applications Circuit for ADD8707 Development Version (with No Tap Points)
Rev. A | Page 18 of 20

TAP POINT AND REGULATOR VOLTAGE REQUEST FORM

REGULATOR SECTION—V
To ensure correct regulator operation VDD must exceed V
= 15.0 V.
V
DD
Parameter Value (6.9 V – 15.4 V) V
REG OUT
TAP POINT SECTION
Gamma output voltages are calculated using the following formula:
VTP
×
V
=
OUT
OUTREG
500
REG OUT
by 600 mV minimum—that is, a V
REG
= 14.4 V requires a minimum
REG
ADD8707
A Microsoft® Excel spreadsheet is available which automatically calculates the best tap point based on V voltages for each gamma output.
Output Tap Point V
18
OUT
V
17
OUT
V
16
OUT
V
15
OUT
V
14
OUT
V
13
OUT
V
12
OUT
V
11
OUT
V
10
OUT
V
9
OUT
V
8
OUT
V
7
OUT
V
6
OUT
V
5
OUT
V
4
OUT
V
3
OUT
V
2
OUT
V
1
OUT
and the desired output
REG OUT
CUSTOMER INFORMATION
Name: ____________________________________________
Company: ____________________________________________
Address: ____________________________________________
____________________________________________
Date: ____________________________________________
Please return this form to your local sales office.
Rev. A | Page 19 of 20
ADD8707

OUTLINE DIMENSIONS

BSC SQ
PIN 1 INDICATOR
7.00
0.60 MAX
37
36
0.60 MAX
0.30
0.23
0.18
PIN 1
48
INDICATOR
1
1.00
12° MAX
0.85
0.80
SEATING PLANE

ORDERING GUIDE

1
Model
ADD8707WCPZ-REEL7
1
Available in reels only.
2
Z = Pb-free part.
3
Development version.
Temperature Package Package Description Package Outline
2, 3
–40°C to +105°C 48-Lead Lead Frame Chip Scale Package CP-48
(BOTTOM VIEW)
25
24
EXPOSED
TOP
VIEW
0.80 MAX
0.65 TYP
0.50 BSC
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
6.75
BSC SQ
0.20REF
0.50
0.40
0.30
0.05 MAX
0.02 NOM COPLANARITY
0.08
Figure 31. 48-Lead Lead Frame Chip Scale Package [LFCSP]
7 mm × 7 mm Body
(CP-48)
Dimensions shown in millimeters
PAD
5.50 REF
5.25
5.10 SQ
4.95
12
13
0.25 MIN
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
D04712-0-10/04(A)
Rev. A | Page 20 of 20
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