16 V Quad
+
FEATURES
Single-supply operation: 4.5 V to 16.5 V
Upper/lower buffers swing to V
Continuous output current: 35 mA
V
peak output current: 250 mA
COM
Offset voltage: 15 mV
Slew rate: 6 V/µs
Unity gain stable with large capacitive loads
Supply current: 700 µA per amplifier
Drop-in replacement for EL5420
APPLICATIONS
TFT LCD monitor panels
TFT LCD notebook panels
Communications equipment
Portable instrumentation
Electronic games
GENERAL DESCRIPTION
The ADD8704 is a single-supply quad operational amplifier that
has been optimized for today’s low cost TFT LCD notebook and
monitor panels. Output channels A and D swing to the rail for
use as end-point gamma references. Output channels B and C
provide high continuous and peak current drive for use as V
or repair amplifiers; they can also be used as midpoint gamma
references. All four amplifiers have excellent transient response
and have high slew rate and capacitive load drive capability. The
ADD8704 is specified over the –40°C to +85°C temperature
range and is available in either a 14-lead TSSOP or a 16-lead
LFCSP package for thin, portable applications.
Table 1. Input/Output Characteristics
Channel VIH V
A VDD – 1.7 V GND 15 150
B VDD – 1.7 V GND 35 250
C VDD GND 35 250
D VDD GND + 1.7 V 15 150
/GND
DD
I
IL
(mA) ISC (mA)
O
COM
Operational Amplifier
ADD8704
PIN CONFIGURATIONS
1
OUT A
+–
2
–IN A
3
+IN A
4
V+ V–
ADD8704
5
+IN B
6
–IN B
OUT B
+–
7
Figure 1. 14-Lead TSSOP (RU Suffix)
OUT A14OUT D13NC
16NC15
1
–IN A
+IN A
2
ADD8704
V+
3
TOP VIEW
IN B
4
5
–IN A
OUT B6OUT C
Figure 2. 16-Lead CSP (CP Suffix)
14
OUT D
+–
13
–IN D
12
+IN D
11
10
+IN C
9
–IN C
+–
8
OUT C
00001-0-0-1
12
–IN D
11
+IN D
10
V–
9
+IN C
7
8
–IN C
00001-0-002
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.
ADD8704
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
Application Information................................................................ 12
Theory.......................................................................................... 12
REVISION HISTORY
Revision 0: Initial Version
Input............................................................................................. 12
Output.......................................................................................... 12
Important Note........................................................................... 12
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. 0 | Page 2 of 16
ADD8704
ELECTRICAL CHARACTERISTICS
Table 2. VS = 16 V, VCM = VS/2, TA @ 25°C, unless otherwise noted
Parameter Symbol Condition Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 2 15 mV
Offset Voltage Drift
∆V
OS
Input Bias Current IB 200 1100 nA
–40°C ≤ TA ≤ +85°C 1500 nA
Input Offset Current IOS 10 100 nA
–40°C ≤ TA ≤ +85°C 250 nA
Common-Mode Rejection Ratio CMRR –40°C ≤ TA ≤ +85°C
Amp A VCM = 0 to (VS – 1.7 V) 54 95 dB
Amp B VCM = 0 to (VS – 1.7 V) 54 95 dB
Amp C VCM = 0 to VS 54 95 dB
Amp D VCM = 1.7 V to VS 54 95 dB
Large Signal Voltage Gain AVO RL = 10 kΩ, VO = 0.5 to (VS – 0.5 V) 1 10 V/mV
Input Impedance ZIN 400 kΩ
Input Capacitance CIN 1 pF
OUTPUT CHARACTERISTIS
Output Voltage High (A) VOH I
Optimized for Low Swing IL = 5 mA 15.6 15.75 V
–40°C ≤ TA ≤ +85°C 15.5 V
Output Voltage High (B) VOH I
Optimized for V
I
COM
–40°C ≤ TA ≤ +85°C 15.75 V
Output Voltage High (C) VOH I
Optimized for Midrange IL = 5 mA 15.8 15.9 V
–40°C ≤ TA ≤ +85°C 15.75 V
Output Voltage High (D) VOH I
Optimized for High Swing IL = 5 mA 15.75 15.85 V
–40°C ≤ TA ≤ +85°C 15.65 V
Output Voltage Low (A) VOL I
Optimized for Low Swing IL = 5 mA 80 200 mV
–40°C ≤ TA ≤ +85°C 300 mV
Output Voltage Low (B) VOL I
Optimized for V
I
COM
–40°C ≤ TA ≤ +85°C 250 mV
Output Voltage Low (C) VOL I
Optimized for Midrange IL = 5 mA 50 150 mV
–40°C ≤ TA ≤ +85°C 250 mV
Output Voltage Low (D) VOL I
Optimized for High Swing IL = 5 mA 375 500 mV
–40°C ≤ TA ≤ +85°C 600 mV
Continuous Output Current (A and D) I
Continuous Output Current (B and C) I
15 mA
OUT
35 mA
OUT
Peak Output Current (A and D) IPK V
Peak Output Current (B and C) IPK V
SUPPLY CHARACTERISTICS
Supply Voltage VS 4.5 16 V
Power Supply Rejection Ratio PSRR VS = 4 V to 17 V, –40°C ≤ TA ≤ +85°C 70 90 dB
Total Supply Current ISY V
–40°C ≤ TA ≤ +85°C 4 mA
/∆T
–40°C ≤ T
= 100 µA 15.985 V
L
= 100 µA 15.995 V
L
= 5 mA 15.8 15.9 V
L
= 100 µA 15.995 V
L
= 100 µA 15.99 V
L
= 100 µA 20 mV
L
= 100 µA 5 mV
L
= 5 mA 50 150 mV
L
= 100 µA 5 mV
L
= 100 µA 50 mV
L
= 16 V 50 mA
S
= 16 V 200 mA
S
= VS/2, No Load 2.8 3.4 mA
O
≤ +85°C 10 µV/°C
A
Rev. 0 | Page 3 of 16
ADD8704
ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameter Symbol Condition Min Typ Max Unit
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ, CL = 200 pF 4 6 V/µs
Gain Bandwidth Product GBP RL = 10 kΩ, CL = 40 pF 5.8 MHz
–3 dB Bandwidth BW RL = 10 kΩ, CL = 40 pF 6.8 MHz
Phase Margin Øo RL = 10 kΩ, CL = 40 pF 55 Degrees
Channel Separation 75 dB
NOISE PERFORMANCE
Voltage Noise Density (A, B, and C) en f = 1 kHz 26 nV/√Hz
e
Voltage Noise Density (D) en f = 1 kHz 36 nV/√Hz
e
Current Noise Density in f = 10 kHz 0.8 pA/√Hz
f = 10 kHz 25 nV/√Hz
n
f = 10 kHz 35 nV/√Hz
n
Rev. 0 | Page 4 of 16
ADD8704
ABSOLUTE MAXIMUM RATINGS
Table 3. ADD8704 Stress Ratings1
Parameter Rating
Supply Voltage (VS) 18 V
Input Voltage –0.5 V to VS + 0.5 V
Differential Input Voltage VS
Storage Temperature Range –65°C to +150°C
Operating Temperature Range –40°C to +85°C
Junction Temperature Range –65°C to +150°C
Lead Temperature Range 300°C
ESD Tolerance (HBM) ±1500 V
ESD Tolerance (MM) 175 V
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this part features proprietary
ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
Table 4. Package Characteristics
Package Type θ
2
θJC Unit
JA
14-Lead TSSOP (RU) 180 35 °C/W
16-Lead LFCSP (CP) 383 303 °C/W
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
2
θJA is specified for worst-case conditions, i.e., θJA is specified for devices
soldered onto a circuit board for surface-mount packages.
3
DAP is soldered down to PCB.
Rev. 0 | Page 5 of 16
ADD8704
TYPICAL PERFORMANCE CHARACTERISTICS
600
VS = 16V
500
400
300
200
QUANTITY OF AMPLIFIERS
100
0
–9–7–5–3–11357911
20
18
16
14
12
10
8
6
QUANTITY OF AMPLIFIERS
4
2
0
0 10010 20 30 40 50 60 70 80 90
Figure 4. Input Offset Voltage Drift, V
10
= 16V
V
S
8
= VS/2
V
CM
6
4
2
0
–2
–4
INPUT BIAS CURRENT (nA)
–6
–8
–10
–60 –40 –20
Figure 5. Input Bias Current vs. Temperature
INPUT OFFSET VOLTAGE (mV)
Figure 3. Input Offset Voltage, V
TCVOS (µV/°C)
0 20 40 60 80 100
TEMPERATURE (°C)
= 16 V
S
= 16 V
S
VS = 16V
A
D
B
C
00001-0-003
00001-0-004
00005-0-005
10
VS=16V
8
6
4
2
0
–2
–4
OFFSET VOLTAGE (mV)
–6
–8
–10
024
6 8 10 12 14 16
COMMON-MODE VOLTAGE (V)
D
Figure 6. Offset Voltage vs. Common-Mode Voltage
400
200
0
–200
–400
–600
INPUT BIAS CURRENT (nA)
–800
–1000
–60 –40 –20
TEMPERATURE (°C)
A
D
0 20 40 60 80 100
Figure 7. Input Bias Current vs. Temperature
80
VS = 16V
60
40
20
–20
–40
INPUT OFFSET CURRENT (nA)
–60
–80
0
–60 –20–40
D
C
B
0 20 40 60 80 100
TEMPERATURE (°C)
Figure 8. Input Offset Current vs. Temperature
C
B
A
00001-0-006
VS = 16V
B
C
00001-0-007
A
00001-0-006
Rev. 0 | Page 6 of 16
ADD8704
100k
10k
= 16V
V
S
CHANNEL A
100k
10k
V
= 16V
S
CHANNEL D
1k
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.0001 0.001
SOURCE
SINK
0.01 0.1 1 10 100
LOAD CURRENT (mA)
Figure 9. Channel A Output Voltage vs. Load Current
10k
VS = 16V
CHANNEL B
1k
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.0001 0.001 0.1 10
SOURCE
0.01 1 100
LOAD CURRENT (mA)
Figure 10. Channel B Output Voltage vs. Load Current
10k
VS = 16V
CHANNEL C
1k
SINK
00001-0-009
00001-0-010
1k
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.0001 0.001
0.01 0.1 1 10 100
LOAD CURRENT (mA)
SINK
SOURCE
Figure 12. Channel D Output Voltage vs. Load Current
10k
VS = 4.5V
SOURCE
1k
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.001 0.01
A
0.1 101 100
LOAD CURRENT (mA)
B, C
D
Figure 13. Output Source Voltage vs. Load Current, All Channels
10k
VS = 4.5V
SINK
1k
00001-0-010
00001-0-013
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.0001 0.001
SOURCE
0.01 0.1 1 10 100
LOAD CURRENT (mA)
Figure 11. Channel C Output Voltage vs. Load Current
SINK
00001-0-011
Rev. 0 | Page 7 of 16
D
100
10
∆OUTPUT VOLTAGE (mV)
1
0.1
0.001 0.01
0.1 1 10 100
LOAD CURRENT (mA)
A
B, C
Figure 14. Output Sink Voltage vs. Load Current, All Channels
00001-0-014
ADD8704
16.00
15.95
15.90
15.85
15.80
OUTPUT VOLTAGE (V)
15.75
15.70
–60 –40
Figure 15. Output Source Voltage vs. Temperature
500
VS = 16V
450
I
SINK
400
350
300
250
200
150
OUTPUT VOLTAGE (V)
100
50
0
–60 –40 –20
Figure 16. Output Sink Voltage vs. Temperature
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
SUPPLY CURRENT PER AMPLIFIER (mA)
0
024
VS = 16V
I
SOURCE
C
D
A
020–20 40 60 80 100
TEMPERATURE (°C)
= 5mA
0 20 40 60 80 100
TEMPERATURE (°C)
6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
D
A
B
C
Figure 17. Supply Current vs. Supply Voltage
= 5mA
B
00001-0-015
00001-0-016
00001-0-017
0.80
0.75
0.70
0.65
SUPPLY CURRENT PER AMPLIFIER (mA)
0.60
GAIN (dB)
–20
GAIN (dB)
–20
–60 –40
80
60
40
20
0
1k
80
40
60
20
0
1k
VS = 16V
–20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 18. Supply Current vs. Temperature
100k10k 1M 10M 100M
FREQUENCY (Hz)
Figure 19. Frequency vs. Gain and Sh ift
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 20. Frequency vs. Gain and Sh ift
VS = 16V
R
= 10kΩ
L
C
= 40pF
L
VS = 4.5V
R
= 10kΩ
L
C
= 40pF
L
0
45
90
135
180
225
0
45
90
135
180
225
00001-0-018
(
PHASE SHIFT (Degrees)
00001-0-019
PHASE SHIFT (Degrees)
00001-0-020
Rev. 0 | Page 8 of 16
ADD8704
50
40
= 16V
V
S
RL = 10kΩ
CL = 40pF
120
VS = 16V
100
AV = 100
30
A
= 10
V
20
A
= 1
V
CLOSED-LOOP GAIN (dB)
10
0
100
1k 1M100k10k 10M
FREQUENCY (Hz)
00001-0-021
Figure 21. Closed-Loop Gain vs. Frequency
16
14
12
10
8
6
OUTPUT SWING (V p-p)
4
2
0
100
10k1k 100k 1M 10M
FREQUENCY (Hz)
VS = 16V
RL = 10kΩ
AV = 1
00001-0-020
Figure 22. Output Swing vs. Frequency
675
AV = 1
600
525
450
)
Ω
375
300
225
IMPEDANCE (
150
75
0
100
10k1k 100k 1M 10M
FREQUENCY (Hz)
VS = 4.5V
V
= 16V
S
00001-0-023
Figure 23. Impedance vs. Frequency
80
60
40
20
COMMON-MODE REJECTION (dB)
0
100 1k
10k 100k 1M 10M
FREQUENCY (Hz)
Figure 24. Commo n-Mode Re jection vs. Frequen cy
100
80
60
40
20
COMMON-MODE REJECTION (dB)
0
100
+PSRR
PSRR
ٛ
1k 100k 1M10k 10M
FREQUENCY (Hz)
Figure 25. Commo n-Mode Re jection vs. Frequen cy
100
= ±8V
V
S
= ±50mV
V
IN
90
A
= 1
V
R
= 2k
Ω
L
80
70
60
50
40
OVERSHOOT (%)
30
20
10
0
10
100 1k 10k
CAPACITIVE LOAD (pF)
Figure 26. Overshoot vs. Capacitive Load
+OS
–OS
VS = 16V
00001-0-024
00001-0-025
00001-0-026
Rev. 0 | Page 9 of 16
ADD8704
20
RL = 10kΩ
10
0
–10
–20
GAIN (dB)
–30
–40
–50
100k
540pF
1040pF
1M 10M 30M
FREQUENCY (Hz)
Figure 27.Gain vs. Capacitive Load
20
VS = 16V
15
10
5
0
–5
–10
GAIN (dB)
–15
–20
–25
–30
100k
150Ω
1M 10M 100M
FREQUENCY (Hz)
1kΩ
2kΩ
10kΩ
Figure 28. Gain vs. Resistive Load
11
10
9
8
120pF
7
6
5
4
AMPLITUDE (V)
3
2
1
0
–200
320pF
520pF
200 600 1000 1400 1800
TIME (ns)
1nF
Figure 29. Transient Load Response
V
= 16V
S
10nF
100pF
50pF
00001-0-027
00001-0-028
00001-0-029
VOLTAGE (3V/DIV)
TIME (40µs/DIV)
00001-0-030
Figure 30. No Phase Reversal
VS = 16V
R
= 2k
Ω
L
C
= 100pF
LOAD
VOLTAGE (50mV/DIV)
TIME (0.2µs/DIV)
00001-0-031
Figure 31. Small-Signal Transient Response
VOLTAGE (20mV/DIV)
VS = 16V
R
SERIES = 33Ω
OUT
= 0.1µF
C
LOAD
TIME (20µs/DIV)
00001-0-032
Figure 32. Small-Signal Transient Response
Rev. 0 | Page 10 of 16
ADD8704
VDD = 16V
= 2kΩ
R
L
= 100pF
C
L
70
VS = 16V
MARKER SET @ 10kHz
60
MARKER READING = 36.6nV/ Hz
CHANNEL D
50
40
30
VOLTAGE (2V/DIV)
Figure 33. Large Signal Transient Response
70
VS = 16V
MARKER SET @ 10kHz
60
MARKER READING = 25.7nV/ Hz
CHANNEL A, B, C
50
40
30
20
10
VOLTAGE NOISE DENSITY (nV/ Hz)
0
–10
05
Figure 34. Voltage Noise Density vs. Frequency
TIME (2µs/DIV)
10 15 20 25
FREQUENCY (Hz)
00001-0-033
00001-0-034
20
10
VOLTAGE NOISE DENSITY (nV/ Hz)
0
–10
05
10 15 20 25
FREQUENCY (Hz)
00001-0-035
Figure 35. Voltage Noise Density vs. Frequency
Rev. 0 | Page 11 of 16
ADD8704
APPLICATION INFORMATION
THEORY
The ADD8704 is designed for use in LCD gamma correction
circuits. Depending on the panel architecture, between 4 and 18
different gamma voltages may be needed. These gamma
voltages provide the reference voltages for the column driver
RDACs. Due to the capacitive nature of LCD panels, it is
necessary for these drivers to provide high capacitive load drive.
In addition to providing gamma reference voltages, these parts
are also capable of providing the V
voltage. V
COM
center voltage common to all the LCD pixels. Since the V
circuit is common to all the pixels in the panel, the V
is designed to supply continuous currents up to 35 mA.
INPUT
The ADD8704 has four amplifiers specifically designed for the
needs of an LCD panel. F shows a typical gamma
correction curve for a normally white twisted nematic LCD
panel. The symmetric curve comes from the need to reverse the
polarity on the LC pixels to avoid “burning” in the image. The
application therefore requires gamma voltages that come close
to both supply rails. To accommodate this transfer function, the
ADD8704 has been designed to have four different amplifiers in
one package.
V
DD
V
G1
igure 36
COM
is the
driver
COM
COM
Amplifier C is a rail-to-rail input range that makes the
ADD8704 suitable for use anywhere on the RDAC as well as for
V
applications.
COM
Amplifier D has an NPN follower input stage. This covers the
upper rail to GND plus 1.7 V. This amplifier is suitable for the
upper range of the RDAC.
OUTPUT
The outputs of the amplifiers have been designed to match the
performance needs of the gamma correction circuit. All four of
the amplifiers have rail-to-rail outputs, but the current drive
capabilities differ. Since amplifier A is suited for voltages close
(GND), the output is designed to sink more current than
to V
SS
it sources; it can sink 15 mA of continuous current. Likewise,
since amplifier D is primarily used for voltages close to V
sources more current. Amplifier D can source 15 mA of
continuous current. Amplifiers B and C are designed for use as
either midrange gamma or V
amplifiers. They therefore sink
COM
and source equal amounts of current. Since they are used as
amplifiers, they have a drive capability of up to 35 mA of
V
COM
continuous current.
The nature of LCD panels introduces a large amount of
parasitic capacitance from the column drivers as well as the
capacitance associated with the liquid crystals via the common
plane. This makes capacitive drive capability an important
factor when designing the gamma correction circuit.
DD
, it
V
G2
V
G3
V
G4
V
G5
V
G6
V
G7
V
GAMMA VOLTAGE
G8
V
G9
V
G10
V
SS
016324864
Figure 36. LCD Gamma Correction Curve
GRAY SCALE BITS
00001-0-038
Amplifier A has a single-supply PNP input stage followed by a
folded cascode stage. This provides an input range that goes to
the bottom rail. This amplifier can therefore be used to provide
the bottom voltage on the RDAC string.
Amplifier B (PNP folded cascode) swings to the low rail as well,
but it provides 35 mA continuous output current versus 15 mA.
This buffer is suitable for lower RDAC range, middle RDAC
range, or V
applications.
COM
IMPORTANT NOTE
Because of the asymmetric nature of amplifiers A and D, care
must be taken to connect an input that forces the amplifiers to
operate in their most productive output states. Amplifier D has
very limited sink capabilities, while amplifier A does not source
well. If more than one ADD8704 is used, set the amplifier D
input to enable the amplifier output to source current and set
the amplifier A input to force a sinking output current. This
means making sure the input is above the midpoint of the
common-mode input range for amplifier D and below the
midpoint for amplifier A. Mathematically speaking, make sure
> VS/2 for amplifier D and VIN < VS/2 for amplifier A.
V
IN
Figure 37 shows an example using 4 ADD8704s to generate 10
gamma outputs. Note that the top three resistor tap-points are
connected to the amplifier D inputs, thus assuring these
channels will source current. Likewise, the bottom three resistor
tap-points are connected to the amplifier A inputs to provide
sinking output currents.
Rev. 0 | Page 12 of 16
ADD8704
RESISTOR STRING
TP 1
TP 2
TP 3
TP 4
TP 5
TP 6
TP 1
TP 4
TP 5
TP 8
TP 2
TP 6
V
DD
ADD8704
C
B
A
V
DD
ADD8704
C
GAMMA 1D
GAMMA 4
GAMMA 5
GAMMA 8
GAMMA 2D
GAMMA 6
TO COLUMN DRIVER
TP 7
TP 7
TP 8
TP 9
B
A
V
DD
GAMMA 7
GAMMA 9
ADD8704
TP 3
V
TP 9
TP 10
DD
NC
TP 10
C
A
B
V
COM
GAMMA 3D
NC
GAMMA 10
Figure 37. Using Four ADD8704s to Generate 10 Gamma Outputs
00001-0-039
Rev. 0 | Page 13 of 16
ADD8704
OUTLINE DIMENSIONS
5.10
5.00
4.90
1.05
1.00
0.80
4.50
4.40
4.30
PIN 1
14
0.65
BSC
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
0.30
0.19
8
6.40
BSC
71
1.20
MAX
SEATING
PLANE
0.20
0.09
COPLANARITY
0.10
8°
0°
0.75
0.60
0.45
Figure 38. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU)
Dimensions shown in millimeters
PIN 1
INDICATOR
1.00
0.85
0.80
12° MAX
SEATING
PLANE
4.0
BSC SQ
TOP
VIEW
0.80 MAX
0.65 TYP
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
0.35
0.28
0.25
3.75
BSC SQ
0.20 REF
0.60 MAX
0.65 BSC
0.05 MAX
0.02 NOM
COPLANARITY
0.75
0.60
0.50
0.08
13
12
9
8
0.60 MAX
BOTTOM
VIEW
16
1
4
5
1.95 BSC
PIN 1
INDICATOR
2.25
2.10 SQ
1.95
0.25 MIN
Figure 39. 16-Terminal Leadless Frame Chip Scale Package [LFCSP] (CP)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADD8704ARU –40°C to +85°C 14-Lead Thin Shrink SOIC RU-14
ADD8704ARU-REEL –40°C to +85°C 14-Lead Thin Shrink SOIC RU-14
ADD8704ARUZ1 –40°C to +85°C 14-Lead Thin Shrink SOIC RU-14
ADD8704ARUZ-REEL1 –40°C to +85°C 14-Lead Thin Shrink SOIC RU-14
ADD8704ACPZ-R21 –40°C to +85°C 16-Terminal Leadless Frame Chip Scale CP-16
ADD8704ACPZ-REEL71 –40°C to +85°C 16-Terminal Leadless Frame Chip Scale CP-16
1
Z = Pb-free part.
Rev. 0 | Page 14 of 16
ADD8704
NOTES
Rev. 0 | Page 15 of 16
ADD8704
NOTES
© 2003 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C04417–0–10/03(0)
Rev. 0 | Page 16 of 16
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