Datasheet AD8614, AD8644 Datasheet (Analog Devices)

Single and Quad +18 V

1

2

3

5

4

2IN

+IN

V+

OUT A

AD8614

V2

14

13

12

11

10

9

8

1

2

3

4

5

6

7

–IN A
+IN A

V+
+IN B
–IN B

OUT B

OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C

OUT A

AD8644

a

FEATURES
Unity Gain Bandwidth: 5.5 MHz
Low Voltage Offset: 1.0 mV
Slew Rate: 7.5 V/␮s
Single-Supply Operation: 5 V to 18 V
High Output Current: 70 mA
Low Supply Current: 800 ␮A/Amplifier
Stable with Large Capacitive Loads
Rail-to-Rail Inputs and Outputs

APPLICATIONS
LCD Gamma and V
Modems
Portable Instrumentation
Direct Access Arrangement

GENERAL DESCRIPTION

The AD8614 (single) and AD8644 (quad) are single-supply,

5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD
monitor applications.

They are processed using Analog Devices high voltage, high speed,
complementary bipolar process—HV XFCB. This proprietary
process includes trench isolated transistors that lower internal
parasitic capacitance which improves gain bandwidth, phase mar­gin and capacitive load drive. The low supply current of 800 µA
(typ) per amplifier is critical for portable or densely packed designs.
In addition, the rail-to-rail output swing provides greater dynamic
range and control than standard video amplifiers provide.

These products operate from supplies of 5 V to as high as
18 V. The unique combination of an output drive of 70 mA,
high slew rates, and high capacitive drive capability makes the
AD8614/AD8644 an ideal choice for LCD applications.

The AD8614 and AD8644 are specified over the temperature
range of –20°C to +85°C. They are available in 5-lead SOT-23,
14-lead TSSOP and 14-lead SOIC surface mount packages in
tape and reel.

COM

Drivers

Operational Amplifiers

AD8614/AD8644

PIN CONFIGURATIONS

5-Lead SOT-23

(RT Suffix)

14-Lead TSSOP

(RU Suffix)

OUT A

2IN A
1IN A

1IN B
2IN B

OUT B

114

V1

78

AD8644

14-Lead Narrow Body SO

(R Suffix)

OUT D

2IN D
1IN D
V2
1IN C
2IN C

OUT C

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1999

AD8614/AD8644–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(5 V ≤ VS ≤ 18 V, V

= VS/2, TA = 25ⴗC unless otherwise noted)

CM

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS␣

Offset Voltage V

Input Bias Current I

Input Offset Current I

B

OS

OS

–20°C ≤ T
–20°C ≤ T
–20°C ≤ T

≤ +85°C3mV

A

≤ +85°C 500 nA

A

≤ +85°C 200 nA

A

Input Voltage Range 0V
Common-Mode Rejection Ratio CMRR V
Voltage Gain A

VO

= 0 V to V

CM

V

= 0.5 V to VS –0.5 V, R

OUT

S

= 10 kΩ 10 150 V/mV

L

60 75 dB

1.0 2.5 mV

80 400 nA

5 100 nA

S

V

OUTPUT CHARACTERISTICS␣

I

Output Voltage High V
Output Voltage Low V
Output Short Circuit Current I

OH
OL

SC

= 10 mA VS –0.15 V

LOAD

I

= 10 mA 65 150 mV

LOAD

35 70 mA

–20°C ≤ TA ≤ +85°C30 mA

POWER SUPPLY␣

PSRR PSRR V

= ±2.25 V to ±9.25 V 80 110 dB

S

Supply Current / Amplifier Isy 0.8 1.1 mA

–20°C ≤ TA ≤ +85°C 1.5 mA

DYNAMIC PERFORMANCE␣

Slew Rate SR C

= 200 pF 7.5 V/µs

L

Gain Bandwidth Product GBP 5.5 MHz
Phase Margin Φo 65 Degrees
Settling Time t

S

0.01%, 10 V Step 3 µs

NOISE PERFORMANCE

Voltage Noise Density e

Current Noise Density i

NOTE
All typical values are for V
Specifications subject to change without notice.

= 18 V.

S

ABSOLUTE MAXIMUM RATINGS

n

e

n

n

1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range . . . . . . . . . . . –20°C to +85°C

Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability.

f = 1 kHz 12 nV/√Hz
f = 10 kHz 11 nV/√Hz
f = 10 kHz 1 pA/√Hz

Package Type ␪

5-Lead SOT-23 (RT) 230 140 °C/W

S

14-Lead TSSOP (RU) 180 35 °C/W

1

JA

␪

JC

Unit

14-Lead SOIC (R) 120 56 °C/W

NOTE

1

θJA is specified for worst-case conditions, i.e., θ

onto a circuit board for surface mount packages.

is specified for device soldered

JA

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD8614ART
AD8644ARU
AD8644AR

NOTES

1

Available in 3,000 or 10,000 piece reels.

2

Available in 2,500 piece reels only.

1

–20°C to +85°C 5-Lead SOT-23 RT-5

2

–20°C to +85°C 14-Lead TSSOP RU-14

2

–20°C to +85°C 14-Lead SOIC R-14

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.

WARNING!

Although the AD8614/AD8644 features proprietary ESD protection circuitry, permanent dam­age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.

ESD SENSITIVE DEVICE

–2– REV. 0

Typical Performance Characteristics –

GAIN – dB

FREQUENCY – Hz

1k

100M

10k 100k 1M 10M

80
60
40
20

0

45
90
135
180

5V # VS # 18V
R

L

= 1MV
CL = 40pF
T

A

= 258C

PHASE SHIFT – Degrees

TIME – 500ns/Div

VS = 5V # VS # 18V
R

L

= 2kV
CL = 200pF
AV = 1
T

A

= 258C

V

S

2

VOLTAGE – 50mV/Div

COMMON-MODE VOLTAGE – Volts

400

0

2400

22.5

2.5

21.5 20.5

0.5 1.5

300

200

2200

2300

100

2100

VS = 62.5V

INPUT BIAS CURRENT – nA

AD8614/AD8644

50

VS = 18V
R

= 2kV

45

L

T

= 258C

A

40
35

30
25
20
15
10

SMALL SIGNAL OVERSHOOT – %

5
0

10 10k100 1k

+OS

2OS

CAPACITANCE – pF

Figure 1. Small Signal Overshoot vs.
Load Capacitance

7.5
VS = 5V

6.5

R

= 2kV

L

CL = 200pF

5.5
AV = 1

= 258C

T

4.5

A

3.5

2.5

1.5

VOLTAGE – 1V/Div

0.5

20.5

21.5

22.5

TIME – 1ms/Div

Figure 4. Large Signal Transient
Response

12

8

0.1%

4

0

24

28

OUTPUT SWING FROM 0 TO 6 V

212

0

0.1%

1.0 1.5 2.0 2.5 3.0

0.5 3.5
SETTLING TIME – ms

0.01%

0.01%

Figure 2. Settling Time

29

VS = 18V

25

R

= 2kV

L

CL = 200pF

21

AV = 1

17

= 258C

T

A

13

9
5

VOLTAGE – 4V/Div

1

23
27

211

TIME – 1ms/Div

Figure 5. Large Signal Transient
Response

Figure 3. Open-Loop Gain and Phase
vs. Frequency

Figure 6. Small Signal Transient
Response

10k

1k

100

10

DOUTPUT VOLTAGE – mV

1

0.001 100

Figure 7. Output Voltage to Supply
Rail vs. Load Current

5V # VS # 18V
T

= 258C

A

0.01
LOAD CURRENT – mA

SINK

SOURCE

0.1 1 10

1,000

900

TA = 258C

800
700
600
500
400

300
200

SUPPLY CURRENT/AMPLIFIER – mA

100

0

010123456789

SUPPLY VOLTAGE – 6Volts

Figure 8. Supply Current vs. Supply
Voltage

–3–REV. 0

Figure 9. Input Bias Current vs.
Common-Mode Voltage

AD8614/AD8644

TEMPERATURE – 8C

SUPPLY CURRENT/AMPLIFIER – mA

1.0

0.9

0.5
235 215

5 25456585

0.8

0.7

0.6

VS = 18V

VS = 5V

400

300

VS = 69V

200

100

0

2100

2200

INPUT BIAS CURRENT – nA

2300

2400

29927 25 23 21

COMMON-MODE VOLTAGE – Volts

01357

Figure 10. Input Bias Current vs.
Common-Mode Voltage

6

5

VS = 5V
A

= 1

VCL

4

R

= 2kV

L

= 258C

T

A

3

2

OUTPUT SWING – V p-p

1

0

100 1k 10M

10k 100k 1M

FREQUENCY – Hz

Figure 13. Maximum Output Swing
vs. Frequency

180
160
140

120
100

80
60

QUANTITY – Amplifiers

40
20

0

21.5 2120.5

22

INPUT OFFSET VOLTAGE – mV

2.5V # VS # 9V
T

= 258C

A

0 0.5 1 1.5

2

Figure 11. Input Offset Voltage
Distribution

20
18
16

VS = 18V

14

A

= 1

VCL

R

= 2kV

L

12

= 258C

T

A

10

8
6

OUTPUT SWING – V p-p

4
2

0

100 1k 10M10k 100k 1M

FREQUENCY – Hz

Figure 14. Maximum Output Swing
vs. Frequency

Figure 12. Supply Current vs.
Temperature

300

5V # VS # 18V

= 258C

T

A

240

180

120

IMPEDANCE – V

60

0

1k 10k 100k 1M 10M

AV = 10

AV = 100

FREQUENCY – Hz

AV = 1

Figure 15. Closed-Loop Output
Impedance vs. Frequency

5V # VS # 18V
T

= 258C

A

40

20

GAIN – dB

0

1k 10k 100M

Figure 16. Closed-Loop Gain vs.
Frequency

FREQUENCY – Hz

100k 1M 10M

140

5V # VS # 18V
T

= 258C

120

A

100

80

60

40

20

COMMON-MODE REJECTION – dB

0

100 1k 10M

10k 100k 1M

FREQUENCY – Hz

Figure 17. Common-Mode Rejection
vs. Frequency

–4– REV. 0

100

80

60

40

20

POWER-SUPPLY REJECTION – dB

0

100 1k

10k 100k

FREQUENCY – Hz

VS = 18V
T

PSRR+

PSRR2

= 258C

A

1M

10M

Figure 18. Power-Supply Rejection
vs. Frequency

AD8614/AD8644

VOLTAGE NOISE DENSITY – nV Hz

FREQUENCY – Hz

100

10

1

10 100 10k1k

VS = 18V
T

A

= 258C

9
8
7
6
5
4
3

SLEW RATE – V/ms

AV = 1

2

R

= 2kV

L

CL = 200pF

1

= 258C

T

A

0

4681012141618

220

0

SUPPLY VOLTAGE – V

SR+

SR2

Figure 19. Slew Rate vs. Supply
Voltage

100

10

VOLTAGE NOISE DENSITY – nV Hz

1

10 100 10k1k

FREQUENCY – Hz

Figure 20. Voltage Noise Density
vs. Frequency

APPLICATIONS SECTION
Theory of Operation

The AD8614/AD8644 are processed using Analog Devices’ high
voltage, high speed, complementary bipolar process—HV XFCB.
This process includes trench isolated transistors that lower parasitic
capacitance.

Figure 22 shows a simplified schematic of the AD8614/AD8644.
The input stage is rail-to-rail, consisting of two complementary
differential pairs, one NPN pair and one PNP pair. The input stage
is protected against avalanche breakdown by two back-to-back
diodes. Each input has a 1.5 kΩ resistor that limits input current
during over-voltage events and furnishes phase reversal protection
if the inputs are exceeded. The two differential pairs are connected
to a double-folded cascode. This is the stage in the amplifier with
the most gain. The double folded cascode differentially feeds the
output stage circuitry. Two complementary common emitter tran­sistors are used as the output stage. This allows the output to swing
to within 125 mV from each rail with a 10 mA load. The gain of the
output stage, and thus the open loop gain of the op amp, depends on
the load resistance.

VS = 5V
T

= 258C

A

Figure 21. Voltage Noise Density vs.
Frequency

The AD8614/AD8644 have no built-in short circuit protection.
The short circuit limit is a function of high current roll-off of the
output stage transistors and the voltage drop over the resistor
shown on the schematic at the output stage. The voltage over this
resistor is clamped to one diode during short circuit voltage events.

Output Short-Circuit Protection

To achieve a wide bandwidth and high slew rate, the output of
the AD8614/AD8644 is not short-circuit protected. Shorting
the output directly to ground or to a supply rail may destroy the
device. The typical maximum safe output current is 70 mA.

In applications where some output current protection is needed,
but not at the expense of reduced output voltage headroom, a low
value resistor in series with the output can be used. This is shown
in Figure 23. The resistor is connected within the feedback loop
of the amplifier so that if V

is shorted to ground and V

OUT

IN

swings up to 18 V, the output current will not exceed 70 mA.
For 18 V single supply applications, resistors less than 261 Ω are

not recommended.

V

CC

2

1.5kV

V

EE

+

1.5kV
V

V

CC

CC

Figure 22. Simplified Schematic

–5–REV. 0

V

OUT

AD8614/AD8644

18V

V

IN

AD86x4

261V

V

OUT

Figure 23. Output Short-Circuit Protection

Input Overvoltage Protection

As with any semiconductor device, whenever the condition exists for
the input to exceed either supply voltage, attention needs to be paid
to the input overvoltage characteristic. As an overvoltage occurs, the
amplifier could be damaged, depending on the voltage level and the
magnitude of the fault current. When the input voltage exceeds
either supply by more than 0.6 V, internal pin junctions energize,
allowing current to flow from the input to the supplies. Observing
Figure 22, the AD8614/AD8644 has 1.5 kΩ resistors in series with
each input, which helps limit the current. This input current is not
inherently damaging to the device as long as it is limited to 5 mA or
less. If the voltage is large enough to cause more than 5 mA of cur­rent to flow, an external series resistor should be added. The size of
this resistor is calculated by dividing the maximum overvoltage by
5 mA and subtracting the internal 1.5 kΩ resistor. For example, if
the input voltage could reach 100 V, the external resistor should be
(100 V/5 mA) – 1.5 kΩ = 18.5 kΩ. This resistance should be placed
in series with either or both inputs if they are subjected to the over­voltages. For more information on general overvoltage characteristics
of amplifiers refer to the 1993 System Applications Guide, available
from the Analog Devices Literature Center.

Output Phase Reversal

The AD8614/AD8644 is immune to phase reversal as long as the
input voltage is limited to within the supply rails. Although the
device’s output will not change phase, large currents due to
input overvoltage could result, damaging the device. In applica­tions where the possibility of an input voltage exceeding the
supply voltage exists, overvoltage protection should be used, as
described in the previous section.

Power Dissipation

The maximum power that can be safely dissipated by the
AD8614/AD8644 is limited by the associated rise in junction
temperature. The maximum safe junction temperature is 150°C,
and should not be exceeded or device performance could suffer.
If this maximum is momentarily exceeded, proper circuit opera­tion will be restored as soon as the die temperature is reduced.
Leaving the device in an “overheated” condition for an extended
period can result in permanent damage to the device.

To calculate the internal junction temperature of the AD86x4,
the following formula can be used:

T

= P

J

DISS

× θ

JA

+ T

A

where: TJ = AD86x4 junction temperature;

P

= AD86x4 power dissipation;

DISS

θ

= AD86x4 package thermal resistance, junction-to-

JA

ambient; and

T

= Ambient temperature of the circuit.

A

The power dissipated by the device can be calculated as:

P

where: I

= I

DISS

is the AD86x4 output load current;

LOAD

V

is the AD86x4 supply voltage; and

S

V

is the AD86x4 output voltage.

OUT

LOAD

× (V

– V

S

OUT

)

Figure 24 provides a convenient way to see if the device is being
overheated. The maximum safe power dissipation can be found
graphically, based on the package type and the ambient tem­perature around the package. By using the previous equation, it
is a simple matter to see if P

exceeds the device’s power

DISS

derating curve. To ensure proper operation, it is important to
observe the recommended derating curves shown in Figure 24.

1.5

14-LEAD SOIC PACKAGE

u

= 1208C/W

JA

1.0
14-LEAD TSSOP PACKAGE

u

= 1808C/W

JA

0.5

5-LEAD SOT-23 PACKAGE

u

= 2308C/W

JA

MAXIMUM POWER DISSIPATION – Watts

0

–35 –15 5 25 45 65 85

AMBIENT TEMPERATURE – 8C

Figure 24. Maximum Power Dissipation vs. Temperature
for 5-Lead and 14-Lead Package Types

Unused Amplifiers

It is recommended that any unused amplifiers in the quad pack­age be configured as a unity gain follower with a 1 kΩ feedback
resistor connected from the inverting input to the output, and
the noninverting input tied to the ground plane.

Capacitive Load Drive

The AD8614/AD8644 exhibits excellent capacitive load driving
capabilities. Although the device is stable with large capacitive
loads, there is a decrease in amplifier bandwidth as the capacitive
load increases.

When driving heavy capacitive loads directly from the AD8614/
AD8644 output, a snubber network can be used to improve the
transient response. This network consists of a series R-C connected
from the amplifier’s output to ground, placing it in parallel with the
capacitive load. The configuration is shown in Figure 25. Although
this network will not increase the bandwidth of the amplifier, it will
significantly reduce the amount of overshoot.

5V

V

AD86x4

V

IN

R

X

C

X

OUT

C

L

Figure 25. Snubber Network Compensation for Capacitive
Loads

–6– REV. 0

The optimum values for the snubber network should be determined

U1-A

R1

2kV

4

C1

100mF

5V

1

10

2

3

5

5V

V

DD

V

DD

LEFT

OUT

AD1881
(AC'97)

RIGHT

OUT

V

SS

R3

20V

7

8

6

9

R4

20V

C2

100mF

NOTE: ADDITIONAL PINS
OMITTED FOR CLARITY

U1-B

U1 = AD8644

R2

2kV

28

35

36

U1-A

R1

2kV

4

C1

100mF

5V

1

10

2

3

5

5V

V

DD

V

DD

LEFT

OUT

AD1881

(AC97)

RIGHT

OUT

V

SS

R3

20V

7

8

6

9

R4

20V

C2

100mF

NOTE: ADDITIONAL PINS
OMITTED FOR CLARITY

U1-B

U1 = AD8644

R2

2kV

R6

20kV

R6

20kV

V

REF

R5

10kV

R5

10kV

AV = = +6dB WITH VALUES SHOWN

R6
R5

38

35

27

36

empirically based on the size of the capacitive load. Table I shows a
few sample snubber network values for a given load capacitance.

Table I. Snubber Networks for Large Capacitive Loads

Load Capacitance Snubber Network
(CL)(R

, CS)

S

0.47 nF 300 Ω, 0.1 µF

4.7 nF 30 Ω, 1 µF
47 nF 5 Ω, 1 µF

Direct Access Arrangement

Figure 26 shows a schematic for a 5 V single supply transmit/receive
telephone line interface for 600 Ω transmission systems. It allows
full duplex transmission of signals on a transformer-coupled 600 Ω
line. Amplifier A1 provides gain that can be adjusted to meet the
modem output drive requirements. Both A1 and A2 are configured
to apply the largest possible differential signal to the transformer.
The largest signal available on a single 5 V supply is approximately

4.0 V p-p into a 600 Ω transmission system. Amplifier A3 is config­ured as a difference amplifier to extract the receive information from
the transmission line for amplification by A4. A3 also prevents the
transmit signal from interfering with the receive signal. The gain of
A4 can be adjusted in the same manner as A1’s to meet the modem’s
input signal requirements. Standard resistor values permit the use of
SIP (Single In-Line Package) format resistor arrays. Couple this with
the AD8644 14-lead SOIC or TSSOP package and this circuit can
offer a compact solution.

AD8614/AD8644

Figure 27. A PC-99 Compliant Headphone/Line Out Amplifier

If gain is required from the output amplifier, four additional
resistors should be added as shown in Figure 28. The gain of
the AD8644 can be set as:

R

A

6

=

V

R

5

TO TELEPHONE

Z

600V

A1, A2 = 1/2 AD8644
A3, A4 = 1/2 AD8644

Figure 26. A Single-Supply Direct Access Arrangement for
Modems

A One-Chip Headphone/Microphone Preamplifier Solution

Because of its high output current performance, the AD8644
makes an excellent amplifier for driving an audio output jack in
a computer application. Figure 27 shows how the AD8644 can
be interfaced with an ac codec to drive headphones or speakers

LINE

1:1

O

T1

MIDCOM
671-8005

R3

360V

6.2V

6.2V

R9

10kV

R11

10kV

R12

10kV

2

3

Tx GAIN

ADJUST

R5

10kV

R6

10kV

R10

10kV

A3

P1

2kV
1

7

1

R2

A1

A2

R13

10kV

9.09kV

2

3

6

5

R14

14.3kV

6

5

R1

10kV

A4

C1

0.1mF

10mF

P2

Rx GAIN

ADJUST

2kV

7

5V DC

C2

0.1mF

TRANSMIT

R7
10kV

R8
10kV

RECEIVE

TxA

RxA

Figure 28. A PC-99-Compliant Headphone/Speaker
Amplifier with Gain

Input coupling capacitors are not required for either circuit as
the reference voltage is supplied from the AD1881.

R4 and R5 help protect the AD8644 output in case the output
jack or headphone wires are accidentally shorted to ground.
The output coupling capacitors C1 and C2 block dc current
from the headphones and create a high-pass filter with a corner
frequency of:

f

=

dB

−

3

Where RL is the resistance of the headphones.

1

CR R

214π

+

()

L

–7–REV. 0

AD8614/AD8644

The remaining two amplifiers can be used as low voltage
microphone preamplifiers. A single AD8614 can be used as a
stand-alone microphone preamplifier. Figure 29 shows this
implementation.

MIC 1 IN

AD1881

(AC'97)

MIC 2 IN

V

REF

10kV

= 20dB

A

V

21

10kV

AV = +20dB

22

27

1kV

1kV

1mF

1mF

5V

2.2kV

MIC 1

5V

2.2kV

MIC 2

Figure 29. Microphone Preamplifier

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

SPICE Model Availability

The SPICE model for the AD8614/AD8644 amplifier is available
and can be downloaded from the Analog Devices’ web site at
http://www.analog.com. The macro-model accurately simulates
a number of AD8614/AD8644 parameters, including offset volt­age, input common-mode range, and rail-to-rail output swing.
The output voltage versus output current characteristic of the
macro-model is identical to the actual AD8614/AD8644 perfor­mance, which is a critical feature with a rail-to-rail amplifier model.
The model also accurately simulates many ac effects, such as gain
bandwidth product, phase margin, input voltage noise, CMRR and
PSRR versus frequency, and transient response. Its high degree of
model accuracy makes the AD8614/AD8644 macro-model one of
the most reliable and true-to-life models available for any amplifier.

C3735–8–10/99

0.177 (4.50)

0.006 (0.15)

0.002 (0.05)

SEATING

PLANE

0.201 (5.10)

0.193 (4.90)

14

0.169 (4.30)

1

PIN 1

0.0256
(0.65)

BSC

14-Lead TSSOP

(RU Suffix)

8

0.256 (6.50)

7

0.0433
(1.10)

0.0118 (0.30)

0.0075 (0.19)

MAX

0.0079 (0.20)

0.0035 (0.090)

0.0669 (1.70)

0.0590 (1.50)

0.0512 (1.30)

0.0354 (0.90)

0.246 (6.25)

PIN 1

0.0059 (0.15)

0.0019 (0.05)

0.028 (0.70)

88
08

0.020 (0.50)

5-Lead SOT-23

0.1181 (3.00)

0.1102 (2.80)

1 3

2

0.0748 (1.90)
BSC

0.0197 (0.50)

0.0138 (0.35)

(RT Suffix)

4 5

0.1181 (3.00)

0.1024 (2.60)

0.0374 (0.95) BSC

0.0571 (1.45)

0.0374 (0.95)

SEATING
PLANE

108

08

0.1574 (4.00)

0.1497 (3.80)

0.0098 (0.25)

0.0040 (0.10)

SEATING

PLANE

0.0079 (0.20)

0.0031 (0.08)

0.0217 (0.55)

0.0138 (0.35)

14-Lead Narrow SOIC

(R Suffix)

0.3444 (8.75)

0.3367 (8.55)

14 8

PIN 1

(1.27)

BSC

0.0192 (0.49)

0.0138 (0.35)

0.0500

0.2440 (6.20)

71

0.2284 (5.80)

0.0688 (1.75)

0.0532 (1.35)

0.0099 (0.25)

0.0075 (0.19)

0.0196 (0.50)

0.0099 (0.25)

8ⴗ
0ⴗ

0.0500 (1.27)

0.0160 (0.41)

PRINTED IN U.S.A.

x 45ⴗ

–8–

REV. 0