Datasheet AD8544, AD8542, AD8541 Datasheet (Analog Devices)

Page 1
General Purpose CMOS
a
FEATURES Single Supply Operation: +2.7 V to +5.5 V Low Supply Current: 45 ␮A/Amplifier Wide Bandwidth: 1 MHz No Phase Reversal Low Input Currents: 4 pA Unity Gain Stable Rail-to-Rail Input and Output
APPLICATIONS ASIC Input or Output Amplifier Sensor Interface Piezo Electric Transducer Amplifier Medical Instrumentation Mobile Communication Audio Output Portable Systems
GENERAL DESCRIPTION
The AD8541/AD8542/AD8544 are single, dual and quad rail­to-rail input and output single supply amplifiers featuring very low supply current and 1 MHz bandwidth. All are guaranteed to operate from a +2.7 V single supply as well as a +5 V supply. These parts provide 1 MHz bandwidth at low current consump­tion of 45 µA per amplifier.
Very low input bias currents enable the AD8541/AD8542/AD8544 to be used for integrators, photodiode amplifiers, piezo electric sensors and other applications with high source impedance. Supply current is only 45 µA per amplifier, ideal for battery operation.
Rail-to-rail inputs and outputs are useful to designers buffering ASICs in single supply systems. The AD8541/AD8542/AD8544 are optimized to maintain high gains at lower supply voltages, making them useful for active filters and gain stages.
The AD8541/AD8542/AD8544 are specified over the extended industrial (–40°C to +125°C) temperature range. The AD8541 is available in 8-lead SO and 5-lead SOT-23 packages. The AD8542 is available in 8-lead SO, 8-lead MSOP, and 8-lead TSSOP surface mount packages. The AD8544 is available in 14-lead narrow SO-14 and 14-lead TSSOP surface mount pack­ages. All TSSOP, MSOP, and SOT versions are available in tape and reel only.
Rail-to-Rail Amplifiers
AD8541/AD8542/AD8544
PIN CONFIGURATIONS
SO-8 (R) SOT-23-5 (RT)
V
V+
1
2
3
1
2
3
4
5
6
7
AD8541
AD8544
5
4
14
13
12
11
10
V+
IN A
9
8
OUT D
IN D
+IN D
V
+IN C
IN C
OUT C
NC
1
IN A
2
+IN A
3
V
4
NC = NO CONNECT
AD8541
8
7
6
5
NC
V+
OUT A
NC
OUT A
+IN A
SO-8 (R), RM-8, and RU-8 SO-14 (R) and RU-14
OUT A
IN A
+IN A
V
1
2
3
4
AD8542
8
7
6
5
V+
OUT B
IN B
+IN B
OUT A
IN A
+IN A
+IN B
IN B
OUT B
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000
Page 2
AD8541/AD8542/AD8544–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(VS = +2.7 V, VCM = +1.35 V, TA = +25C unless otherwise noted)
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V
Input Bias Current I
Input Offset Current I
B
OS
OS
–40°C T
–40°C T –40°C T
–40°C T –40°C T
+125°C7mV
A
+85°C 100 pA
A
+125°C 1,000 pA
A
+85°C50pA
A
+125°C 500 pA
A
16 mV
460 pA
0.1 30 pA
Input Voltage Range 0 +2.7 V Common-Mode Rejection Ratio CMRR V
Large Signal Voltage Gain A
Offset Voltage Drift ∆V Bias Current Drift ∆I
VO
/T –40°C TA ≤ +125°C4µV/°C
OS
/T –40°C TA ≤ +85°C 100 fA/°C
B
= 0 V to +2.7 V 40 45 dB
CM
–40°C T
+125°C38 dB
A
RL = 100 k , VO = +0.5 V to +2.2 V 100 500 V/mV –40°C T –40°C T
–40°C T
+85°C 50 V/mV
A
+125°C 2 V/mV
A
+125°C 2,000 fA/°C
A
Offset Current Drift ∆IOS/T –40°C TA ≤ +125°C 25 fA/°C
OUTPUT CHARACTERISTICS
Output Voltage High V
Output Voltage Low V
Output Current I
Closed Loop Output Impedance Z
OUT
±I
OH
OL
SC
OUT
IL = 1 mA +2.575 +2.65 V –40°C T
+125°C +2.550 V
A
IL = 1 mA 35 100 mV –40°C T V
OUT
+125°C 125 mV
A
= VS – 1 V 15 mA
±20 mA
f = 200 kHz, AV = 1 50
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = +2.5 V to +6 V 65 76 dB
Supply Current/Amplifier I
SY
–40°C T VO = 0 V 38 55 µA
+125°C60 dB
A
–40°C TA +125°C75µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 100 k 0.4 0.75 V/µs Settling Time t
S
To 0.1% (1 V Step) 5 µs
Gain Bandwidth Product GBP 980 kHz Phase Margin Φo 63 Degrees
NOISE PERFORMANCE
Voltage Noise Density e
Current Noise Density i
Specifications subject to change without notice.
n
e
n
n
f = 1 kHz 40 nV/Hz f = 10 kHz 38 nV/Hz
<0.1 pA/Hz
–2–
REV. A
Page 3
AD8541/AD8542/AD8544
ELECTRICAL CHARACTERISTICS
(VS = +3.0 V, VCM = +1.5 V, TA = +25C unless otherwise noted)
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V
Input Bias Current I
Input Offset Current I
B
OS
OS
–40°C T
–40°C T –40°C T
–40°C T –40°C T
+125°C7mV
A
+85°C 100 pA
A
+125°C 1,000 pA
A
+85°C50pA
A
+125°C 500 pA
A
16 mV
460 pA
0.1 30 pA
Input Voltage Range 0+3V Common-Mode Rejection Ratio CMRR V
Large Signal Voltage Gain A
Offset Voltage Drift ∆V Bias Current Drift ∆I
VO
/T –40°C TA ≤ +125°C4µV/°C
OS
/T –40°C TA ≤ +85°C 100 fA/°C
B
= 0 V to +3 V 40 45 dB
CM
–40°C T
+125°C38 dB
A
RL = 100 k , VO = +0.5 V to +2.2 V 100 500 V/mV –40°C T –40°C T
–40°C T
+85°C 50 V/mV
A
+125°C 2 V/mV
A
+125°C 2,000 fA/°C
A
Offset Current Drift ∆IOS/T –40°C TA ≤ +125°C 25 fA/°C
OUTPUT CHARACTERISTICS
Output Voltage High V
Output Voltage Low V
Output Current I
Closed Loop Output Impedance Z
OUT
±I
OH
OL
SC
OUT
IL = 1 mA +2.875 +2.955 V –40°C T
+125°C +2.850 V
A
IL = 1 mA 32 100 mV –40°C T V
OUT
+125°C 125 mV
A
= VS – 1 V 18 mA
±25 mA
f = 200 kHz, AV = 1 50
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = +2.5 V to +6 V 65 76 dB
+125°C60 dB
A
Supply Current/Amplifier I
SY
–40°C T VO = 0 V 40 60 µA –40°C TA ≤ +125°C75µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 100 k 0.4 0.8 V/µs Settling Time t
S
To 0.01% (1 V Step) 5 µs
Gain Bandwidth Product GBP 980 kHz Phase Margin Φo 64 Degrees
NOISE PERFORMANCE
Voltage Noise Density e
Current Noise Density i
Specifications subject to change without notice.
n
e
n
n
f = 1 kHz 42 nV/Hz f = 10 kHz 38 nV/Hz
<0.1 pA/Hz
–3–REV. A
Page 4
AD8541/AD8542/AD8544–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(VS = +5.0 V, VCM = +2.5 V, TA = +25C unless otherwise noted)
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V
Input Bias Current I
Input Offset Current I
B
OS
OS
–40°C T
–40°C T –40°C T
–40°C T –40°C T
+125°C7mV
A
+85°C 100 pA
A
+125°C 1,000 pA
A
+85°C50pA
A
+125°C 500 pA
A
16 mV
460 pA
0.1 30 pA
Input Voltage Range 0+5V Common-Mode Rejection Ratio CMRR V
Large Signal Voltage Gain A
Offset Voltage Drift ∆V Bias Current Drift ∆I
VO
/T –40°C TA ≤ +125°C4µV/°C
OS
/T –40°C TA ≤ +85°C 100 fA/°C
B
= 0 V to +5 V 40 48 dB
CM
–40°C T
+125°C38 dB
A
RL = 100 k , VO = +0.5 V to +2.2 V 20 40 V/mV –40°C T –40°C T
–40°C T
+85°C 10 V/mV
A
+125°C 2 V/mV
A
+125°C 2,000 fA/°C
A
Offset Current Drift ∆IOS/T –40°C TA ≤ +125°C 25 fA/°C
OUTPUT CHARACTERISTICS
Output Voltage High V
Output Voltage Low V
Output Current I
Closed Loop Output Impedance Z
OUT
±I
OH
OL
SC
OUT
IL = 1 mA +4.9 +4.965 V –40°C T
+125°C +4.875 V
A
IL = 1 mA 25 100 mV –40°C T V
OUT
+125°C 125 mV
A
= VS – 1 V 30 mA
±60 mA
f = 200 kHz, AV = 1 45
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = +2.5 V to +6 V 65 76 dB
Supply Current/Amplifier I
SY
–40°C T VO = 0 V 45 65 µA
+125°C60 dB
A
–40°C TA ≤ +125°C85µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 100 k, CL = 200 pF 0.45 0.92 V/µs Full-Power Bandwidth BW Settling Time t
S
P
1% Distortion 70 kHz To 0.1% (1 V Step) 6 µs
Gain Bandwidth Product GBP 1,000 kHz Phase Margin Φo 67 Degrees
NOISE PERFORMANCE
Voltage Noise Density e
Current Noise Density i
Specifications subject to change without notice.
n
e
n
n
f = 1 kHz 42 nV/Hz f = 10 kHz 38 nV/Hz
<0.1 pA/Hz
–4–
REV. A
Page 5
ABSOLUTE MAXIMUM RATINGS
WARNING!
ESD SENSITIVE DEVICE
1
Supply Voltage(VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V
S
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . –40°C to +125°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . .+300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
For supplies less than +6 V, the differential input voltage is equal to ± VS.
ORDERING GUIDE
Temperature Package Package Branding
Model Range Description Option Information
AD8541AR –40°C to +125°C 8-Lead SOIC SO-8 AD8541ART* –40°C to +125°C 5-Lead SOT-23 RT-5 A4A AD8542AR –40°C to +125°C 8-Lead SOIC SO-8 AD8542ARM* –40°C to +125°C 8-Lead MSOP RM-8 AVA AD8542ARU* –40°C to +125°C 8-Lead TSSOP RU-8 AD8544AR –40°C to +125°C 14-Lead SOIC SO-14 AD8544ARU* –40°C to +125°C 14-Lead TSSOP RU-14
*Available in reels only.
AD8541/AD8542/AD8544
PACKAGE INFORMATION
Package Type
5-Lead SOT-23 (RT) 256 81 °C/W 8-Lead SOIC (R) 158 43 °C/W 8-Lead MSOP (RM) 210 45 °C/W 8-Lead TSSOP (RU) 240 43 °C/W 14-Lead SOIC (R) 120 36 °C/W 14-Lead TSSOP (RU) 240 43 °C/W
NOTE
1
θJA is specified for worst case conditions, i.e., θ
onto a circuit board for surface mount packages.
1
JA
JC
is specified for device soldered
JA
Units
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8541/AD8542/AD8544 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–5–REV. A
Page 6
AD8541/AD8542/AD8544
–Typical Performance Characteristics
180
160
140
120
100
80
60
NUMBER OF AMPLIFIERS
40
20
0
4.5 3.5
2.51.5 0.5
INPUT OFFSET VOLTAGE – mV
VS = +5V V T
1.5 2.5 3.50.5
= +2.5V
CM
= +25ⴗC
A
Figure 1. Input Offset Voltage Distribution
400
VS = +2.7V AND +5V
350
V
= VS/2
CM
300
250
200
150
100
INPUT BIAS CURRENT – pA
50
0 40 20
0 20 40 80 100 12060
TEMPERATURE – ⴗC
Figure 4. Input Bias Current vs. Temperature
4.5
140
1.0
VS = +2.7V AND +5V
0.5 V
= VS/2
CM
0.0
0.5
1.0
1.5
2.0
2.5
3.0
INPUT OFFSET VOLTAGE – mV
3.5
4.0
55 35
15
5 25 45 65 85 105 125
TEMPERATURE – C
Figure 2. Input Offset Voltage vs. Temperature
7
VS = +2.7V AND +5V
6
V
= VS/2
CM
5
4
3
2
1
INPUT OFFSET CURRENT – pA
0
1
15
55 35
25 85 105 12565
545
TEMPERATURE – ⴗC
Figure 5. Input Offset Current vs. Temperature
145
145
9
VS = +2.7V AND +5V
8
V
= VS/2
CM
7
6
5
4
3
2
INPUT BIAS CURRENT – pA
1
0
0.5
0.5 5.5
1.5 2.5 3.5 4.5
COMMON-MODE VOLTAGE – V
Figure 3. Input Bias Current vs. Common-Mode Voltage
160
VS = +2.7V
140
T
= +25ⴗC
A
120
100
POWER SUPPLY REJECTION – dB
20
40
80
60
40
20
PSRR
+PSRR
0
100 1k 10M10k 100k 1M
FREQUENCY – Hz
Figure 6. Power Supply Rejection Ratio vs. Frequency
10k
VS = +2.7V T
= +25ⴗC
A
1k
100
10
1
OUTPUT VOLTAGE – mV
0.1
0.01
0.001 0.01 100
SOURCE
SINK
0.1 1 10
LOAD CURRENT – mA
Figure 7. Output Voltage to Supply Rail vs. Load Current
3.0
2.5
2.0
1.5
1.0
OUTPUT SWING – Vp-p
0.5
0
1k 10k 10M
FREQUENCY – Hz
VS = +2.7V V
IN
R
= 2k
L
T
= +25ⴗC
A
100k 1M
= 2.5Vp-p
Figure 8. Closed-Loop Output Voltage Swing vs. Frequency
–6–
60
VS = +2.7V R
=
50
L
T
= +25ⴗC
A
40
+OS
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
OS
1k
Figure 9. Small Signal Overshoot vs. Load Capacitance
REV. A
Page 7
AD8541/AD8542/AD8544
60
VS = +2.7V R
= 10k
50
L
T
= +25ⴗC
A
40
+OS
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
OS
1k
Figure 10. Small Signal Overshoot vs. Load Capacitance
1.35V
VS = +2.7V R
= 2k
L
AV = +1 T
= +25ⴗC
A
500mV
10␮s
Figure 13. Large Signal Transient Response
60
VS = +2.7V R
= 2k
50
L
T
= +25ⴗC
A
40
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
+OS
OS
1k
Figure 11. Small Signal Overshoot vs. Load Capacitance
VS = +2.7V R
= NO LOAD
L
T
= +25ⴗC
A
80
60
40
20
GAIN – dB
0
1k 10k 10M100k 1M
FREQUENCY – Hz
Figure 14. Open-Loop Gain and Phase vs. Frequency
45
90
135
180
VS = +2.7V R
= 100k
L
CL = 300pF A
= +1
V
T
= +25ⴗC
A
1.35V
50mV
10␮s
Figure 12. Small Signal Transient Response
160
VS = +5V
140
T
= +25ⴗC
A
120
100
80
PSRR
60
+PSRR
40
20
PHASE SHIFT – Degrees
0
20
POWER SUPPLY REJECTION RATIO – dB
40
100 1k 10M10k 100k 1M
FREQUENCY – Hz
Figure 15. Power Supply Rejection Ratio vs. Frequency
90
VS = +5V
80
T
= +25ⴗC
A
70
60
50
40
30
20
10
COMMON-MODE REJECTION – dB
0
10
1k 10k 10M100k 1M
FREQUENCY – Hz
Figure 16. Common-Mode Rejection Ratio vs. Frequency
10k
VS = +5V T
= +25ⴗC
A
1k
100
10
1
OUTPUT VOLTAGE – mV
0.1
0.01
0.001 0.01 100
SOURCE
SINK
0.1 1 10
LOAD CURRENT – mA
Figure 17. Output Voltage to Supply Rail vs. Frequency
–7–REV. A
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
OUTPUT SWING – Vp-p
1.0
0.5
0
1k 10k 10M
FREQUENCY – Hz
VS = +5V V
= +4.9Vp-p
IN
R
= NO LOAD
L
T
= +25ⴗC
A
100k 1M
Figure 18. Closed Loop Output Voltage Swing vs. Frequency
Page 8
AD8541/AD8542/AD8544
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
OUTPUT SWING – Vp-p
1.0
0.5
0
1k 10k 10M
FREQUENCY – Hz
VS = +5V V
= +4.9Vp-p
IN
R
= 2k
L
T
= +25ⴗC
A
100k 1M
Figure 19. Closed-Loop Output Voltage Swing vs. Frequency
60
VS = +5V R
=
50
L
T
= +25ⴗC
A
40
+OS
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
OS
1k
Figure 22. Small Signal Overshoot vs. Load Capacitance
60
VS = +5V R
= 10k
50
L
T
= +25ⴗC
A
40
+OS
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
OS
1k
Figure 20. Small Signal Overshoot vs. Load Capacitance
VS = +5V R
= 100k
L
CL = 300pF A
= +1
V
T
= +25ⴗC
A
2.5V
50mV
10␮s
Figure 23. Small Signal Transient Response
60
VS = +5V R
= 2k
50
L
T
= +25ⴗC
A
40
30
20
10
SMALL SIGNAL OVERSHOOT – %
0
10 100 10k
CAPACITANCE – pF
+OS
OS
1k
Figure 21. Small Signal Overshoot vs. Load Capacitance
2.5V
VS = +5V R
= 2k
L
AV = +1 T
= +25ⴗC
A
1V
10␮s
Figure 24. Large Signal Transient Response
VS = +5V R
= NO LOAD
L
T
= +25ⴗC
A
80
60
40
20
GAIN – dB
0
1k 10k 10M100k 1M
FREQUENCY – Hz
45
90
135
180
Figure 25. Open-Loop Gain & Phase vs. Frequency
V
IN
V
OUT
2.5V
PHASE SHIFT – Degrees
1V
Figure 26. No Phase Reversal
–8–
VS = +5V R
= 10k
L
AV = +1 T
= +25ⴗC
A
20␮s
60
TA = +25ⴗC
50
40
30
20
10
SUPPLY CURRENT/AMPLIFIER – A
0
01 6
23 45
SUPPLY VOLTAGE – V
Figure 27. Supply Current per Amplifier vs. Supply Voltage
REV. A
Page 9
AD8541/AD8542/AD8544
C
2C
R/2
R R
7
3
2
V
OUT
4
6
AD8541
5.0V
2.5V
REF
C
V
IN
55
50
45
40
35
30
25
SUPPLY CURRENT/AMPLIFIER – A
20
55 35
VS = +5V
VS = +2.7V
15
5 25 45 65 85 105 125
TEMPERATURE – C
Figure 28. Supply Current per Amplifier vs. Temperature
145
1,000
VS = +2.7V AND +5V
900
A
= +1
V
T
= +25ⴗC
800
A
700
600
500
400
300
IMPEDANCE –
200
100
0
1k 10k 100M100k 1M 10M
FREQUENCY – Hz
Figure 29. Closed-Loop Output Impedance vs. Frequency
NOTES ON THE AD854x AMPLIFIERS
The AD8541/AD8542/AD8544 amplifiers are improved perfor­mance general purpose operational amplifiers. Performance has been improved over previous amplifiers in several ways.
Lower Supply Current for 1 MHz Gain Bandwidth
The AD854x series typically uses 45 microamps of current per amplifier. This is much less than the 200 µA to 700 µA used in earlier generation parts with similar performance. This makes the AD854x series a good choice for upgrading portable designs for longer battery life. Alternatively, additional functions and performance can be added at the same current drain.
Higher Output Current
At +5 V single supply, the short circuit current is typically 60 µA. Even 1 V from the supply rail, the AD854x amplifiers can provide 30 mA, sourcing or sinking.
Sourcing and sinking is strong at lower voltages, with 15 mA available at +2.7 V, and 18 mA at 3.0 V. For even higher output currents, please see the Analog Devices AD8531/AD853/AD8534 parts, with output currents to 250 mA. Information on these parts is available from your Analog Devices representative, and datasheets are available at the Analog Devices website at www.analog.com.
Better Performance at Lower Voltages
The AD854x family parts have been designed to provide better ac performance, at 3.0 V and 2.7 V, than previously available parts. Typical gain-bandwidth product is close to 1 MHz at 2.7 V. Volt­age gain at 2.7 V and 3.0 V is typically 500,000. Phase margin is typically over +60°C, making the part easy to use.
VS = +5V A
= +1
V
MARKER SET @ 10kHz MARKER READING: 37.6␮V/ Hz T
= +25ⴗC
A
200mV/DIVISION
05 2510 15 20
FREQUENCY – kHz
Figure 30. Voltage Noise
the circuit to no longer attenuate at the ideal notch frequency. To achieve desired performance, 1% or better component tolerances or special component screens are usually required. One method to desensitize the circuit-to-component mis­match is to increase R2 with respect to R1, which lowers Q. A lower Q increases attenuation over a wider frequency range, but reduces attenuation at the peak notch frequency.
5.0V
8
3
U1
2
7
U2
1/2 AD8542
1
4
5
6
2.5V
R2
2.5k
R1
97.5k
REF
V
OUT
2.5V
REF
1
f0 =
2πRC
f0 =
1
4
[ ]
R
100kR100k
C2
53.6␮F
50k
C
26.7nF
1
R1
R1+R2
R/2
C
26.7nF
1/2 AD8542
Figure 31. 60 Hz Twin-T Notch Filter, Q = 10
APPLICATIONS Notch Filter
The AD8542 has very high open loop gain (especially with supply voltage below 4 V), which makes it useful for active filters of all types. For example, Figure 31 illustrates the AD8542 in the clas­sic Twin-T Notch Filter design. The Twin-T Notch is desired for simplicity, low output impedance and minimal use of op amps. In fact, this notch filter may be designed with only one op amp if Q adjustment is not required. Simply remove U2 as illustrated in Figure 32. However, a major drawback to this circuit topology is ensuring that all the Rs and Cs closely match. The components must closely match or notch frequency offset and drift will cause
Figure 32. 60 Hz Twin-T Notch Filter, Q = ∞ (Ideal)
Figure 33 diagrams another example of the AD8542 in a notch filter circuit. The FNDR notch filter has several unique features as compared to the Twin-T Notch including: less critical matching requirements; Q is directly proportional to a single resistor R1. While matching component values is still important, it is also much easier and/or less expensive to
9REV. A
Page 10
AD8541/AD8542/AD8544
accomplish in the FNDR circuit. For example, the Twin-T Notch uses three capacitors with two unique values, whereas the FNDR circuit uses only two capacitors, which may be of the same value. U3 is simply a buffer that is added to lower the out­put impedance of the circuit.
2.5V
REF
1/4 AD8544
f =
2π
L =
R2C2
1
LC1
R1
Q ADJUST
200
C1
1F
C2
1F
6
7
U2
5
2.5V
R
2.61k
R
2.61k
R
2.61k
R
2.61k
REF
1/4 AD8544
9
U3
10
3
2
13
12
2.5V
REF
8
1/4 AD8544
4
1
U1
11
1/4 AD8544
14
U4
SPARE
V
OUT
NC
Figure 33. FNDR 60 Hz Notch Filter with Output Buffer
Comparator Function
A comparator function is a common application for a spare op amp in a quad package. Figure 34 illustrates 1/4 of the AD8544 as a comparator in a standard overload detection application. Unlike so many op amps, the AD854x family can double as comparator because this op amp family has rail-to-rail differen­tial input range, rail-to-rail output, and a great speed vs. power ratio. R2 is used to introduce hysteresis. The AD854x when used as comparators have 5 µs propagation delay @ 5 V and 5 µs overload recovery time.
Photodiode Application
The AD854x family has very high impedance with input bias current typically around 4 pA. This characteristic allows the AD854x op amps to be used in photodiode applications and other applications that require high input impedance. Note that the AD854x has significant voltage offset, which can be removed by capacitive coupling or software calibration.
Figure 35, illustrates a photodiode or current measurement application. The feedback resistor is limited to 10 M to avoid excessive output offset. Also note that a resistor is not needed on the noninverting input to cancel bias current offset, because the bias current related output offset is not significant when compared to the voltage offset contribution. For the best per­formance follow the standard high impedance layout techniques including: shield circuit, clean circuit board, put a trace con­nected to the noninverting input around the inverting input, and use separate analog and digital power supplies.
C
100pF
R
10M
V+
7
2
6
3
4
AD8541
V
OUT
2.5V
OR
REF
D
2.5V
REF
Figure 35. High Input Impedance Application–Photodiode Amplifier
R2
DC
1M
1/4 AD8544
V
OUT
R1
1k
V
IN
2.5V
REF
2.5V
Figure 34. The AD854x Comparator Application–Overload Detector
–10–
REV. A
Page 11
AD8541/AD8542/AD8544
* AD8542 SPICE Macro-model Typical Values * 6/98, Ver. 1 * TAM / ADSC * * Copyright 1998 by Analog Devices * * Refer to “README.DOC” file for License State-
ment. Use of this
* model indicates your acceptance of the terms
and provisions in * the License Statement. * * Node Assignments * noninverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | * | | | | | .SUBCKT AD8542 1 2 99 50 45 * * INPUT STAGE * M1 4 1 8 8 PIX L=0.6E-6 W=16E-6 M2 6 7 8 8 PIX L=0.6E-6 W=16E-6 M3 11 1 10 10 NIX L=0.6E-6 W=16E-6 M4 12 7 10 10 NIX L=0.6E-6 W=16E-6 RC1 4 50 20E3 RC2 6 50 20E3 RC3 99 11 20E3 RC4 99 12 20E3 C1 4 6 1.5E-12 C2 11 12 1.5E-12 I1 99 8 1E-5 I2 10 50 1E-5 V1 99 9 0.2 V2 13 50 0.2 D1 8 9 DX D2 13 10 DX EOS 7 2 POLY(3) (22,98) (73,98) (81,0) 1E-3 1 1
1 IOS 1 2 2.5E-12 * * CMRR 64dB, ZERO AT 20kHz * ECM1 21 98 POLY(2) (1,98) (2,98) 0 .5 .5 RCM1 21 22 79.6E3 CCM1 21 22 100E-12 RCM2 22 98 50 * * PSRR=90dB, ZERO AT 200Hz * RPS1 70 0 1E6 RPS2 71 0 1E6 CPS1 99 70 1E-5 CPS2 50 71 1E-5 EPSY 98 72 POLY(2) (70,0) (0,71) 0 1 1 RPS3 72 73 1.59E6 CPS3 72 73 500E-12 RPS4 73 98 25 *
* VOLTAGE NOISE REFERENCE OF 35nV/rt(Hz) * VN1 80 0 0 RN1 80 0 16.45E-3 HN 81 0 VN1 35 RN2 81 0 1 * * INTERNAL VOLTAGE REFERENCE * VFIX 90 98 DC 1 S1 90 91 (50,99) VSY_SWITCH VSN1 91 92 DC 0 RSY 92 98 1E3 EREF 98 0 POLY(2) (99,0) (50,0) 0 .5 .5 GSY 99 50 POLY(1) (99,50) 0 3.7E-6 * * ADAPTIVE GAIN STAGE * AT Vsy>+4.2, AVol=45 V/mv * AT Vsy<+3.8, AVol=450 V/mv * G1 98 30 POLY(2) (4,6) (11,12) 0 2.5E-5 2.5E-5 VR1 30 31 DC 0 H1 31 98 POLY(2) VR1 VSN1 0 5.45E6 0 0 49.05E9 CF 45 30 10E-12 D3 30 99 DX D4 50 30 DX * * OUTPUT STAGE * M5 45 46 99 99 POX L=0.6E-6 W=375E-6 M6 45 47 50 50 NOX L=0.6E-6 W=500E-6 EG1 99 46 POLY(1) (98,30) 1.05 1 EG2 47 50 POLY(1) (30,98) 1.04 1 * * MODELS * .MODEL POX PMOS (LEVEL=2,KP=20E-6,VTO=-
+1,LAMBDA=0.067)
.MODEL NOX NMOS (LEVEL=2,KP=20E-
+6,VTO=1,LAMBDA=0.067)
.MODEL PIX PMOS (LEVEL=2,KP=20E-6,VTO=-
+0.7,LAMBDA=0.01,KF=1E-31)
.MODEL NIX NMOS (LEVEL=2,KP=20E-
+6,VTO=0.7,LAMBDA=0.01,KF=1E-31) .MODEL DX D(IS=1E-14) .MODEL VSY_SWITCH VSWITCH(ROFF=100E3,RON=1,VOFF=-
+4.2,VON=-3.5) .ENDS AD8542
11REV. A
Page 12
AD8541/AD8542/AD8544
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
0.177 (4.50)
PIN 1
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.1574 (4.00)
0.1497 (3.80)
0.122 (3.10)
0.114 (2.90)
8
0.169 (4.30)
1
0.0256 (0.65) BSC
0.0118 (0.30)
0.0075 (0.19)
0.1968 (5.00)
0.1890 (4.80)
85
41
8-Lead TSSOP
(RU-08)
5
0.256 (6.50)
0.246 (6.25)
4
0.0433 (1.10) MAX
0.0079 (0.20)
0.0035 (0.090)
8-Lead SOIC
(SO-8)
0.2440 (6.20)
0.2284 (5.80)
8 0
0.028 (0.70)
0.020 (0.50)
0.177 (4.50)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.1574 (4.00)
0.1497 (3.80)
0.201 (5.10)
0.193 (4.90)
14
0.169 (4.30)
1
PIN 1
0.0256 (0.65)
BSC
0.3444 (8.75)
0.3367 (8.55)
14 8
14-Lead TSSOP
(RU-14)
8
0.256 (6.50)
0.246 (6.25)
7
0.0433 (1.10)
0.0118 (0.30)
0.0075 (0.19)
MAX
0.0079 (0.20)
0.0035 (0.090)
14-Lead SOIC
(SO-14)
0.2440 (6.20)
71
0.2284 (5.80)
8 0
C3414–0–3/00 (rev. A)
0.028 (0.70)
0.020 (0.50)
0.0098 (0.25)
0.0040 (0.10)
0.0669 (1.70)
0.0590 (1.50)
0.0512 (1.30)
0.0354 (0.90)
PIN 1
SEATING
PLANE
PIN 1
0.0059 (0.15)
0.0019 (0.05)
0.0688 (1.75)
0.0532 (1.35)
0.0500
0.0192 (0.49)
(1.27)
0.0138 (0.35)
BSC
5-Lead SOT-23
0.1181 (3.00)
0.1102 (2.80)
1 3
2
0.0748 (1.90) BSC
0.0197 (0.50)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
(RT Suffix)
4 5
0.1181 (3.00)
0.1024 (2.60)
0.0374 (0.95) BSC
0.0571 (1.45)
0.0374 (0.95)
SEATING PLANE
0.0196 (0.50)
0.0099 (0.25)
8 0
0.0500 (1.27)
0.0160 (0.41)
10
0
x 45
0.0079 (0.20)
0.0031 (0.08)
0.0217 (0.55)
0.0138 (0.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.122 (3.10)
0.114 (2.90)
0.006 (0.15)
0.002 (0.05)
PIN 1
0.0500 (1.27)
BSC
0.122 (3.10)
0.114 (2.90)
85
1
PIN 1
0.0256 (0.65) BSC
0.016 (0.40)
0.010 (0.25)
0.0688 (1.75)
0.0532 (1.35)
0.0192 (0.49)
0.0138 (0.35)
0.0099 (0.25)
0.0075 (0.19)
8-Lead MSOP
(RM-8)
0.193 (4.90)
BSC
4
0.043 (1.10) MAX
SEATING PLANE
0.009 (0.23)
0.005 (0.13)
0.0196 (0.50)
0.0099 (0.25)
8 0
0.0500 (1.27)
0.0160 (0.41)
6 0
x 45
0.037 (0.95)
0.030 (0.75)
0.028 (0.70)
0.016 (0.40)
PRINTED IN U.S.A.
–12–
REV. A
Loading...