Datasheet AD822 Datasheet (Analog Devices)

OUT1

–IN1

+IN1

V–

V+

OUT2

–IN2

+IN2

1

2

3

4

8

7

6

5

AD822

Single Supply, Rail-to-Rail

a

FEATURES
TRUE SINGLE SUPPLY OPERATION

Output Swings Rail to Rail
Input Voltage Range Extends Below Ground
Single Supply Capability from +3 V to +36 V
Dual Supply Capability from 61.5 V to 618 V

HIGH LOAD DRIVE

Capacitive Load Drive of 350 pF, G = 1
Minimum Output Current of 15 mA

EXCELLENT AC PERFORMANCE FOR LOW POWER

800 mA Max Quiescent Current per Amplifier
Unity Gain Bandwidth: 1.8 MHz
Slew Rate of 3.0 V/ms

GOOD DC PERFORMANCE

800 mV Max Input Offset Voltage
2 mV/8C Typ Offset Voltage Drift
25 pA Max Input Bias Current

LOW NOISE

13 nV/√

NO PHASE INVERSION
APPLICATIONS

Battery Powered Precision Instrumentation
Photodiode Preamps
Active Filters
12- to 14-Bit Data Acquisition Systems
Medical Instrumentation
Low Power References and Regulators

PRODUCT DESCRIPTION

The AD822 is a dual precision, low power FET input op
amp that can operate from a single supply of +3.0 V to 36 V,
or dual supplies of ±1.5 V to ±18 V. It has true single supply

Hz @ 10 kHz

100

Low Power FET-Input Op Amp

AD822

CONNECTION DIAGRAM

8-Pin Plastic DIP, Cerdip and SOIC

capability with an input voltage range extending below the
negative rail, allowing the AD822 to accommodate input signals
below ground in the single supply mode. Output voltage swing
extends to within 10 mV of each rail providing the maximum
output dynamic range.

Offset voltage of 800 µV max, offset voltage drift of 2 µV/°C,
input bias currents below 25 pA and low input voltage noise
provide dc precision with source impedances up to a Gigaohm.

1.8 MHz unity gain bandwidth, –93 dB THD at 10 kHz and
3 V/µs slew rate are provided with a low supply current of
800 µA per amplifier. The AD822 drives up to 350 pF of direct
capacitive load as a follower, and provides a minimum output
current of 15 mA. This allows the amplifier to handle a wide
range of load conditions. This combination of ac and dc
performance, plus the outstanding load drive capability, results
in an exceptionally versatile amplifier for the single supply user.

The AD822 is available in four performance grades. The A and
B grades are rated over the industrial temperature range of
–40°C to +85°C. There is also a 3 volt grade—the AD822A-3V,
rated over the industrial temperature range. The mil grade is
rated over the military temperature range of –55°C to +125°C
and is available processed on standard military drawing.

The AD822 is offered in three varieties of 8-pin package: plastic
DIP, hermetic cerdip and surface mount (SOIC) as well as die
form.

1V 20µ

1V

10

INPUT VOLTAGE NOISE – nV/√Hz

1

10 100 10k1k

Input Voltage Noise vs. Frequency

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

FREQUENCY – Hz

Gain of +2 Amplifier; VS = +5, 0, VIN = 2.5 V Sine Centered
at 1.25 Volts, R

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

5V

V

OUT

0V

(GND)

100
90

10
0%

1V

= 100 k

L

Ω

s

AD822–SPECIFICA TIONS

(VS = 0, 5 volts @ TA = +258C, VCM = 0 V, V

AD822A AD822B AD822S

= 0.2 V unless otherwise noted)

OUT

1

Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units

DC PERFORMANCE

Initial Offset 0.1 0.8 0.1 0.4 0.1 0.8 mV
Max Offset over Temperature 0.5 1.2 0.5 0.9 0.5 mV
Offset Drift 2 2 2 µV/°C
Input Bias Current VCM = 0 V to 4 V 2 25 2 10 2 25 pA

at T

MAX

Input Offset Current 2 20 2 10 2 20 pA

at T

MAX

Open-Loop Gain VO = 0.2 V to 4 V

0.5 5 0.5 2.5 0.5 nA

0.5 0.5 1.5 nA

RL = 100 k 500 1000 500 1000 500 1000 V/mV

T

to T

MIN

MAX

T

to T

MIN

MAX

T

to T

MIN

MAX

RL = 10 k 80 150 80 150 80 150 V/mV
RL = 1 k 15 30 15 30 15 30 V/mV

400 400 V/mV
80 80 V/mV
10 10 V/mV

NOISE/HARMONIC PERFORMANCE

Input Voltage Noise

0.1 Hz to 10 Hz 2 2 2 µV p-p
f = 10 Hz 25 25 25 nV/√Hz
f = 100 Hz 21 21 21 nV/√Hz
f = 1 kHz 16 16 16 nV/√Hz
f = 10 kHz 13 13 13 nV/√Hz

Input Current Noise

0.1 Hz to 10 Hz 18 18 18 fA p-p
f = 1 kHz 0.8 0.8 0.8 fA/√Hz

Harmonic Distortion RL = 10 k to 2.5 V

f = 10 kHz VO = 0.25 V to 4.75 V –93 –93 –93 dB

DYNAMIC PERFORMANCE

Unity Gain Frequency 1.8 1.8 1.8 MHz
Full Power Response VO p-p = 4.5 V 210 210 210 kHz
Slew Rate 3 3 3 V/µs
Settling Time

to 0.1% VO = 0.2 V to 4.5 V 1.4 1.4 1.4 µs
to 0.01% 1.8 1.8 1.8 µs

MATCHING CHARACTERISTICS

Initial Offset 1.0 0.5 1.6 mV
Max Offset Over Temperature 1.6 1.3 mV

Offset Drift 3 3 µV/°C
Input Bias Current 20 10 20 pA
Crosstalk @ f = 1 kHz RL = 5 kΩ –130 –130 –130 dB

f = 100 kHz –93 –93 –93 dB

INPUT CHARACTERISTICS

Common-Mode Voltage Range

T

to T

MIN

MIN

to T

MAX

MAX

CMRR VCM = 0 V to +2 V 66 80 69 80 66 80 dB

T
Input Impedance

2

–0.2 4 –0.2 4 –0.2 4 V
–0.2 4 –0.2 4 V

66 66 dB

Differential 1013||0.5 1013||0.5 1013||0.5 Ω||pF

Common Mode 1013||2.8 1013||2.8 1013||2.8 Ω||pF

OUTPUT CHARACTERISTICS

Output Saturation Voltage
VOL–V

EE

T

to T

MIN

MIN

MIN

MIN

MIN

MIN

MIN

OH

to T

EE

to T

OH

to T

EE

to T

OH

to T
to T

MAX

MAX

MAX

MAX

MAX

MAX

MAX

VCC–V

T
VOL–V

T
VCC–V

T
VOL–V

T
VCC–V

T
Operating Output Current 15 15 15 mA

T
Capacitive Load Drive 350 350 350 pF

3

I

= 20 µA 575757mV

SINK

I

= 20 µA 1014 1014 1014mV

SOURCE

I

= 2 mA 40 55 40 55 40 55 mV

SINK

I

= 2 mA 80 110 80 110 80 110 mV

SOURCE

I

= 15 mA 300 500 300 500 300 500 mV

SINK

I

= 15 mA 800 1500 800 1500 800 1500 mV

SOURCE

10 10 mV
20 20 mV
80 80 mV
160 160 mV
1000 1000 mV
1900 1900 mV

12 12 mA

POWER SUPPLY

Quiescent Current T
Power Supply Rejection VS+ = 5 V to 15 V 70 80 66 80 70 80 dB

T

to T

MIN

MAX

MIN

to T

MAX

1.24 1.6 1.24 1.6 1.24 mA

70 66 dB

–2–

REV. A

(VS = 65 volts @ TA = +258C, VCM = 0 V, V

= 0 V unless otherwise noted)

OUT

AD822A AD822B AD822S

AD822

1

Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units

DC PERFORMANCE

Initial Offset 0.1 0.8 0.1 0.4 0.1 mV
Max Offset over Temperature 0.5 1.5 0.5 1 0.5 mV
Offset Drift 2 2 2 µV/°C
Input Bias Current VCM = –5 V to 4 V 2 25 2 10 2 25 pA

at T

MAX

Input Offset Current 2 20 2 10 2 pA

at T

MAX

Open-Loop Gain VO = –4 V to 4 V

0.5 5 0.5 2.5 0.5 nA

0.5 0.5 1.5 nA

RL = 100 k 400 1000 400 1000 400 1000 V/mV

T

to T

MIN

MAX

T

to T

MIN

MAX

T

to T

MIN

MAX

RL = 10 k 80 150 80 150 80 150 V/mV
RL = 1 k 20 30 20 30 20 30 V/mV

400 400 V/mV
80 80 V/mV
10 10 V/mV

NOISE/HARMONIC PERFORMANCE

Input Voltage Noise

0.1 Hz to 10 Hz 2 2 2 µV p-p
f = 10 Hz 25 25 25 nV/√Hz
f = 100 Hz 21 21 21 nV/√Hz
f = 1 kHz 16 16 16 nV/√Hz
f = 10 kHz 13 13 13 nV/√Hz

Input Current Noise

0.1 Hz to 10 Hz 18 18 18 fA p-p
f = 1 kHz 0.8 0.8 0.8 fA/√Hz

Harmonic Distortion RL = 10 k

f = 10 kHz VO = ±4.5 V –93 –93 –93 dB

DYNAMIC PERFORMANCE

Unity Gain Frequency 1.9 1.9 1.9 MHz
Full Power Response VO p-p = 9 V 105 105 105 kHz
Slew Rate 3 3 3 V/µs
Settling Time

to 0.1% VO = 0 V to ± 4.5 V 1.4 1.4 1.4 µs
to 0.01% 1.8 1.8 1.8 µs

MATCHING CHARACTERISTICS

Initial Offset 1.0 0.5 1.6 mV
Max Offset Over Temperature 3 2 2 mV

Offset Drift 3 3 µV/°C
Input Bias Current 25 10 25 pA
Crosstalk @ f = 1 kHz RL = 5 kΩ –130 –130 –130 dB

f = 100 kHz –93 –93 –93 dB

INPUT CHARACTERISTICS

Common-Mode Voltage Range

T

to T

MIN

MIN

to T

MAX

MAX

CMRR VCM = –5 V to +2 V 66 80 69 80 66 80 dB

T
Input Impedance

2

–5.2 4 –5.2 4 –5.2 4 V
–5.2 4 –5.2 4 V

66 66 dB

Differential 1013||0.5 1013||0.5 1013||0.5 Ω||pF

Common Mode 1013||2.8 1013||2.8 1013||2.8 Ω||pF

OUTPUT CHARACTERISTICS

Output Saturation Voltage
VOL–V

EE

T

to T

MIN

MIN

MIN

MIN

MIN

MIN

MIN

OH

to T

EE

to T

OH

to T

EE

to T

OH

to T
to T

MAX

MAX

MAX

MAX

MAX

MAX

MAX

VCC–V

T
VOL–V

T
VCC–V

T
VOL–V

T
VCC–V

T
Operating Output Current 15 15 15 mA

T
Capacitive Load Drive 350 350 350 pF

3

I

= 20 µA 575757mV

SINK

I

= 20 µA 1014 1014 1014mV

SOURCE

I

= 2 mA 40 55 40 55 40 55 mV

SINK

I

= 2 mA 80 110 80 110 80 110 mV

SOURCE

I

= 15 mA 300 500 300 500 300 500 mV

SINK

I

= 15 mA 800 1500 800 1500 800 1500 mV

SOURCE

10 10 mV
20 20 mV
80 80 mV
160 160 mV
1000 1000 mV
1900 1900 mV

12 12 mA

POWER SUPPLY

Quiescent Current T
Power Supply Rejection VS+ = 5 V to 15 V 70 80 66 80 70 80 dB

T

to T

MIN

MAX

MIN

to T

MAX

1.3 1.6 1.3 1.6 1.3 mA

70 66 dB

REV. A

–3–

AD822–SPECIFICATIONS

(VS = 615 volts @ TA = +258C, VCM = 0 V, V

AD822A AD822B AD822S

= 0 V unless otherwise noted)

OUT

1

Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units

DC PERFORMANCE

Initial Offset 0.4 2 0.3 1.5 0.4 2.0 mV
Max Offset over Temperature 0.5 3 0.5 2.5 0.5 mV
Offset Drift 2 2 2 µV/°C
Input Bias Current VCM = 0 V 2 25 2 12 2 25 pA

VCM = –10 V 40 40 40 pA

at T

MAX

Input Offset Current 2 20 2 12 2 20 pA

at T

MAX

Open-Loop Gain VO = +10 V to –10 V

VCM = 0 V 0.5 5 0.5 2.5 0.5 nA

0.5 0.5 1.5 nA

RL = 100 k 500 2000 500 2000 500 2000 V/mV

T

to T

MIN

MAX

T

to T

MIN

MAX

T

to T

MIN

MAX

RL = 10 k 100 500 100 500 150 400 V/mV
RL = 1 k 30 45 30 45 30 45 V/mV

500 500 V/mV
100 100 V/mV
20 20 V/mV

NOISE/HARMONIC PERFORMANCE

Input Voltage Noise

0.1 Hz to 10 Hz 2 2 2 µV p-p
f = 10 Hz 25 25 25 nV/√Hz
f = 100 Hz 21 21 21 nV/√Hz
f = 1 kHz 16 16 16 nV/√Hz
f = 10 kHz 13 13 13 nV/√Hz

Input Current Noise

0.1 Hz to 10 Hz 18 18 18 fA p-p
f = 1 kHz 0.8 0.8 0.8 fA/√Hz

Harmonic Distortion RL = 10 k

f = 10 kHz VO = ±10 V –85 –85 –85 dB

DYNAMIC PERFORMANCE

Unity Gain Frequency 1.9 1.9 1.9 MHz
Full Power Response VO p-p = 20 V 45 45 45 kHz
Slew Rate 3 3 3 V/µs
Settling Time

to 0.1% VO = 0 V to ± 10 V 4.1 4.1 4.1 µs
to 0.01% 4.5 4.5 4.5 µs

MATCHING CHARACTERISTICS

Initial Offset 3 2 0.8 mV
Max Offset Over Temperature 4 2.5 1.0 mV

Offset Drift 3 3 µV/°C
Input Bias Current 25 12 25 pA
Crosstalk @ f = 1 kHz RL = 5 kΩ –130 –130 –130 dB

f = 100 kHz –93 –93 –93 dB

INPUT CHARACTERISTICS

Common-Mode Voltage Range

T

to T

MIN

MIN

to T

MAX

MAX

CMRR VCM = –15 V to 12 V 70 80 74 90 70 90 dB

T
Input Impedance

2

–15.2 14 –15.2 14 –15.2 14 V
–15.2 14 –15.2 14 V

70 74 dB

Differential 1013||0.5 1013||0.5 1013||0.5 Ω||pF

Common Mode 1013||2.8 1013||2.8 1013||2.8 Ω||pF

OUTPUT CHARACTERISTICS

Output Saturation Voltage
VOL–V

EE

T

to T

MIN

MIN

MIN

MIN

MIN

MIN

MIN

OH

to T

EE

to T

OH

to T

EE

to T

OH

to T
to T

MAX

MAX

MAX

MAX

MAX

MAX

MAX

VCC–V

T
VOL–V

T
VCC–V

T
VOL–V

T
VCC–V

T
Operating Output Current 20 20 20 mA

T
Capacitive Load Drive 350 350 350 pF

3

I

= 20 µA 575757mV

SINK

I

= 20 µA 1014 1014 1014mV

SOURCE

I

= 2 mA 40 55 40 55 40 55 mV

SINK

I

= 2 mA 80 110 80 110 80 110 mV

SOURCE

I

= 15 mA 300 500 300 500 300 500 mV

SINK

I

= 15 mA 800 1500 800 1500 800 1500 mV

SOURCE

10 10 mV
20 20 mV
80 80 mV
160 160 mV
1000 1000 mV
1900 1900 mV

15 15 mA

POWER SUPPLY

Quiescent Current T
Power Supply Rejection VS+ = 5 V to 15 V 70 80 70 80 70 80 dB

T

to T

MIN

MAX

MIN

to T

MAX

1.4 1.8 1.4 1.8 1.4 mA

70 70 dB

–4–

REV. A

(VS = 0, 3 volts @ TA = +258C, VCM = 0 V, V

= 0.2 V unless otherwise noted)

OUT

AD822

AD822A-3 V

Parameter Conditions Min Typ Max Units

DC PERFORMANCE

Initial Offset 0.2 1 mV
Max Offset over Temperature 0.5 1.5 mV
Offset Drift 1 µV/°C
Input Bias Current VCM = 0 V to +2 V 2 25 pA

at T

MAX

Input Offset Current 220 pA

at T

MAX

Open-Loop Gain VO = 0.2 V to 2 V

0.5 5 nA

0.5 nA

RL = 100 k 300 1000 V/mV

T

to T

MIN

MAX

T

to T

MIN

MAX

T

to T

MIN

MAX

RL = 10 k 60 150 V/mV
RL = 1 k 10 30 V/mV

300 V/mV
60 V/mV
8 V/mV

NOISE/HARMONIC PERFORMANCE

Input Voltage Noise

0.1 Hz to 10 Hz 2 µV p-p
f = 10 Hz 25 nV/√Hz
f = 100 Hz 21 nV/√Hz
f = 1 kHz 16 nV/√Hz
f = 10 kHz 13 nV/√Hz

Input Current Noise

0.1 Hz to 10 Hz 18 fA p-p
f = 1 kHz 0.8 fA/√Hz

Harmonic Distortion RL = 10 k to 1.5 V

f = 10 kHz VO = ±1.25 V –92 dB

DYNAMIC PERFORMANCE

Unity Gain Frequency 1.5 MHz
Full Power Response VO p-p = 2.5 V 240 kHz
Slew Rate 3V/µs
Settling Time

to 0.1% VO = 0.2 V to 2.5 V 1 µs
to 0.01% 1.4 µs

MATCHING CHARACTERISTICS

Initial Offset 1mV
Max Offset Over Temperature 2mV

Offset Drift 2 µV/°C
Input Bias Current 10 pA
Crosstalk @ f = 1 kHz RL = 5 kΩ –130 dB

f = 100 kHz –93 dB

INPUT CHARACTERISTICS

Common-Mode Voltage Range

T

to T

MIN

MIN

to T

MAX

MAX

CMRR VCM = 0 V to +1 V 60 74 dB

T
Input Impedance

2

–0.2 2 V
–0.2 2 V

60 dB

Differential 1013||0.5 Ω||pF

Common Mode 1013||2.8 Ω||pF

OUTPUT CHARACTERISTICS

Output Saturation Voltage
VOL–V

EE

T

to T

MIN

MIN

MIN

MIN

MIN

MIN

MIN

OH

to T

EE

to T

OH

to T

EE

to T

OH

to T
to T

MAX

MAX

MAX

MAX

MAX

MAX

MAX

VCC–V

T
VOL–V

T
VCC–V

T
VOL–V

T
VCC–V

T
Operating Output Current 15 mA

T
Capacitive Load Drive 350 pF

3

I

= 20 µA57mV

SINK

I

= 20 µA1014mV

SOURCE

I

= 2 mA 40 55 mV

SINK

I

= 2 mA 80 110 mV

SOURCE

I

= 10 mA 200 400 mV

SINK

I

= 10 mA 500 1000 mV

SOURCE

10 mV
20 mV
80 mV
160 mV
400 mV
1000 mV

12 mA

POWER SUPPLY

Quiescent Current T
Power Supply Rejection VS+ = 3 V to 15 V 70 80 dB

T

to T

MIN

MAX

MIN

to T

MAX

1.24 1.6 mA

70 dB

REV. A

–5–

WARNING!

ESD SENSITIVE DEVICE

AD822–SPECIFICATIONS

AD822

NOTES

1

See standard military drawing for 883B specifications.

2

This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+V

Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 volt below the positive supply.

3

VOL–VEE is defined as the difference between the lowest possible output voltage (VOL) and the minus voltage supply rail (VEE).

VCC–VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).

Specifications subject to change without notice.

– 1 V) to +VS.

S

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD822 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

ABSOLUTE MAXIMUM RATINGS

1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V

Internal Power Dissipation

Plastic DIP (N) . . . . . . . . . . . . . . Observe Derating Curves

Cerdip (Q) . . . . . . . . . . . . . . . . . . Observe Derating Curves

SOIC (R) . . . . . . . . . . . . . . . . . . . Observe Derating Curves

Input Voltage . . . . . . . . . . . . . . (+V

+ 0.2 V) to –(20 V + VS)

S

Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .±30 V

Storage Temperature Range (N) . . . . . . . . . –65°C to +125°C

Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C

Storage Temperature Range (R) . . . . . . . . . –65°C to +150°C

Operating Temperature Range

AD822A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

AD822S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C

Lead Temperature Range (Soldering 60 sec) . . . . . . . +260°C

NOTES

1

Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

2

8-Pin Plastic DIP Package: θJA = 90°C/Watt
8-Pin Cerdip Package: θJA = 110°C/Watt
8-Pin SOIC Package: θJA = 160°C/Watt

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the AD822 is
limited by the associated rise in junction temperature. For plastic
packages, the maximum safe junction temperature is 145°C. For
the cerdip packages, the maximum junction temperature is 175°C.
If these maximums are exceeded momentarily, proper circuit

operation will be restored as soon as the die temperature is
reduced. Leaving the device in the “overheated” condition for
an extended period can result in device burnout. To ensure
proper operation, it is important to observe the derating curves
shown in Figure 24.

While the AD822 is internally short circuit protected, this may not
be sufficient to guarantee that the maximum junction temperature
is not exceeded under all conditions. With power supplies ±12
volts (or less) at an ambient temperature of +25°C or less, if the
output node is shorted to a supply rail, then the amplifier will not
be destroyed, even if this condition persists for an extended period.

ORDERING GUIDE

Temperature Package Package

Range Description Option

M

odel

1

AD822AN –40°C to +85°C 8-Pin Plastic N-8

Mini-DIP

AD822BN –40°C to +85°C 8-Pin Plastic N-8

Mini-DIP
AD822AR –40°C to +85°C 8-Pin SOIC R-8
AD822BR –40°C to +85°C 8-Pin SOIC R-8
AD822AR-3V –40°C to +85°C 8-Pin SOIC R-8
AD822AN-3V –40°C to +85°C 8-Pin Plastic N-8

Mini-DIP
AD822A Chips –40°C to +85°CDie
Standard Military

Drawing

NOTES

1

Spice model is available on ADI Model Disc.

2

Contact factory for availability.

2

–55°C

to +125°C 8-Pin Cerdip Q-8

METALIZATION PHOTOGRAPH

Contact factory for latest dimensions.

Dimensions shown in inches and (mm).

–6–

REV. A

T ypical Characteristics–AD822

INPUT BIAS CURRENT – pA

COMMON-MODE VOLTAGE – V

1k

10

0.1
–16 –12 1612840–4–8

100

1

100k

100

0.1
20 40 1401201008060

1k

10k

1

10

TEMPERATURE – °C

INPUT BIAS CURRENT – pA

70

60

50

40

30

NUMBER OF UNITS

20

10

0

–0.4

–0.5

OFFSET VOLTAGE – mV

0

VS = 0V, 5V

0.5

0.40.30.20.1–0.1–0.2–0.3

Figure 1. Typical Distribution of Offset Voltage (390 Units)

16

14

12

10

VS = ±5V
VS = ±15V

5

0

VS = 0V, +5V AND ±5V

VS = ±5V

INPUT BIAS CURRENT – pA

–5

–5 –4 543210–1–2–3

COMMON-MODE VOLTAGE – V

Figure 4. Input Bias Current vs. Common-Mode Voltage;

= +5 V, 0 V and VS = ±5V

V

S

8

% IN BIN

6

4

2

0

–10–12

OFFSET VOLTAGE DRIFT – µV/°C

Figure 2. Typical Distribution of Offset Voltage Drift
(100 Units)

50

45

40

35

30

25

20

NUMBER OF UNITS

15

10

5

0

1

0

INPUT BIAS CURRENT – pA

Figure 3. Typical Distribution of Input Bias Current
(213 Units)

10

86420–2–4–6–8

Figure 5. Input Bias Current vs. Common-Mode Voltage;
V

= ±15 V

S

10

98765432

Figure 6. Input Bias Current vs. Temperature; VS = 5 V,

= 0

V

CM

REV. A

–7–

AD822–Typical Characteristics

10M

1M

VS = 0V, 5V

100k

OPEN-LOOP GAIN – V/V

10k

100 1k 100k10k

LOAD RESISTANCE – Ω

VS = ±15V

VS = 0V, 3V

Figure 7. Open-Loop Gain vs. Load Resistance

10M

RL = 100kΩ

1M

VS = ±15V

VS = 0V, 5V

40

20

RL = 20kΩ

0

POS

RAIL

INPUT VOLTAGE – µV

–20

–40

0

OUTPUT VOLTAGE FROM SUPPLY RAILS – mV

POS RAIL

RL = 100kΩ

60

RL = 2kΩ

180 240120

POS RAIL

NEG RAIL

NEG RAIL

NEG RAIL

300

Figure 10. Input Error Voltage with Output Voltage within
300 mV of Either Supply Rail for Various Resistive Loads;
VS = ±5V

1k

Hz

√

100

VS = ±15V

VS = 0V, 5V

VS = ±15V

VS = 0V, 5V

140

100k

OPEN-LOOP GAIN – V/V

10k

–60 –40 120100806040200–20

RL = 10kΩ

RL = 600Ω

TEMPERATURE – °C

Figure 8. Open-Loop Gain vs. Temperature

300

200

100

INPUT VOLTAGE – µV

–100

–200

–300

0

–16

RL = 10kΩ

–12

OUTPUT VOLTAGE – V

RL = 100kΩ

RL = 600Ω

16

1240–4 8–8

Figure 9. Input Error Voltage vs. Output Voltage for
Resistive Loads

10

INPUT VOLTAGE NOISE – nV/

1

1

10 10k1k100

FREQUENCY – Hz

Figure 11. Input Voltage Noise vs. Frequency

–40

RL = 10kΩ

–50

ACL = –1

–60

–70

–80

THD – dB

VS = ±15V; V

–90

VS = ±5V; V

–100

VS = 0V, 5V; V

–110

100 1k 100k10k

VS = 0V, 3V; V

= 20V

OUT

= 9V

OUT

= 4.5V

OUT

= 2.5V

OUT

p-p

p-p

p-p

FREQUENCY – Hz

p-p

Figure 12. Total Harmonic Distortion vs. Frequency

–8–

REV. A

AD822

50

0

10 100 10M1M100k10k1k

60

70

80

90

10

20

30

40

FREQUENCY – Hz

COMMON-MODE REJECTION – dB

VS = ±15V

VS = 0V, 5V

VS = 0V, 3V

100

80

60

40

20

OPEN-LOOP GAIN – dB

RL = 2kΩ

0

C

= 100pF

L

–20

10 100 10M1M100k10k1k

PHASE

GAIN

FREQUENCY – Hz

100

80

60

40

20

0

–20

Figure 13. Open-Loop Gain and Phase Margin vs.
Frequency

1k

ACL = +1
VS = ±15V

100

10

PHASE MARGIN IN DEGREES

Figure 16. Common-Mode Rejection vs. Frequency

5

4

3

NEGATIVE
RAIL

POSITIVE
RAIL

1

OUTPUT IMPEDANCE – Ω

0.1

0.01
100 1k 10M1M100k10k

Figure 14. Output Impedance vs. Frequency

+16

+12

+8

+4

0

–4

REV. A

–8

OUTPUT SWING FROM 0 TO ±Volts

–12

–16

Figure 15. Output Swing and Error vs. Settling Time

1%

1%

1.00.0

FREQUENCY – Hz

0.01%0.1%

SETTLING TIME – µs

ERROR

2

1

COMMON-MODE ERROR VOLTAGE – mV

+125°C

0

–1

COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts

+25°C

–55°C

–55°C

+125°C

210

3

Figure 17. Absolute Common-Mode Error vs. Common­Mode Voltage from Supply Rails (V

1000

100

VS – V

OH

10

OUTPUT SATURATION VOLTAGE – mV

4.03.02.0

5.0

0

0.001 0.01 1001010.1
LOAD CURRENT – mA

– VCM)

S

VOL – V

S

Figure 18. Output Saturation Voltage vs. Load Current

–9–

AD822–T ypical Characteristics

1000

I

= 10mA

SOURCE

I

= 10mA

100

10

OUTPUT SATURATION VOLTAGE – mV

1

–60 –40 140120100806040200–20

TEMPERATURE – °C

SINK

I

SOURCE

I

SINK

I

SOURCE

I

SINK

= 1mA

= 1mA

= 10µA

= 10µA

Figure 19. Output Saturation Voltage vs. Temperature

80

70

60

50

40

30

20

SHORT CIRCUIT CURRENT LIMIT – mA

10

0

VS = 0V, 5V

–40–60

VS = 0V, 5V
VS = 0V, 3V

VS = 0V, 3V

TEMPERATURE – °C

VS = ±15V

VS = ±15V

120100806040200–20

–OUT

+
–

–
+

+

140

Figure 20. Short Circuit Current Limit vs. Temperature

100

90

80

70

60
50

40

30
20

POWER SUPPLY REJECTION – dB

10

0

10 100 10M1M100k10k1k

+PSRR

–PSRR

FREQUENCY – Hz

Figure 22. Power Supply Rejection vs. Frequency

30

25

VS = ±15V

20

15

10

OUTPUT VOLTAGE – V

VS = 0V, 5V

5

VS = 0V ,3V

0

10k 100k 10M1M

FREQUENCY – Hz

RL = 2k

Figure 23. Large Signal Frequency Response

1600

1400

1200

1000

800

600

400

QUIESCENT CURRENT – µA

200

0

40

TOTAL SUPPLY VOLTAGE – Volts

T = +125°C

T = +25°C

T = –55°C

36

3028242016128

Figure 21. Quiescent Current vs. Supply Voltage vs.
Temperature

2.4

TOTAL POWER DISSIPATION – Watts

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4
–60

8-PIN MINI-DIP

(PLASTIC)

–40

(PLASTIC) T
(HERMETIC) T

8-PIN SOIC

(PLASTIC)

20

AMBIENT TEMPERATURE – °C

= 145°C

JMAX

= 175°C

JMAX

8-PIN CERDIP

(HERMETIC)

1401201008060400–20

Figure 24. Maximum Power Dissipation vs. Temperature
for Plastic and Hermetic Packages

REV. A–10–

–70

+V

S

2

3

8

1

0.1µF

1/2

AD822

1µF

20V p-p

V

IN

1/2

AD822

5kΩ5kΩ

6

5

7

20kΩ

V

OUT

2.2kΩ

0.1µF1µF

–V

S

CROSSTALK = 20 LOG

V

OUT

10V

IN

–80

–90

–100

–110

CROSSTALK – dB

–120

–130

–140

300

Figure 25. Crosstalk vs. Frequency

V

IN

1k

+V

8

1/2

AD822

–V

S

4

S

FREQUENCY – Hz

0.01µF

0.01µF

AD822

Figure 28. Crosstalk Test Circuit

1M

300k100k30k10k3k

5µs5V

100
90

V

R

100pF

L

OUT

10

0%

Figure 26. Unity-Gain Follower

10µs5V

100

90

10
0%

Figure 27. 20 V p-p, 25 kHz Sine Wave Input; Unity Gain
Follower; R

REV. A

= 600Ω, VS = ±15 V

L

Figure 29. Large Signal Response Unity Gain Follower;

= ±15 V, RL = 10 k

V

S

100

90

10
0%

Ω

500ns10mV

Figure 30. Small Signal Response Unity Gain Follower;
V

= ±15 V, RL = 10 k

S

Ω

–11–

AD822

2µs1V

100

90

10

GND

0%

Figure 31. VS = +5 V, 0 V; Unity Gain Follower Response
to 0 V to 4 V Step

+V

S

0.01µF

8

V

IN

1/2

AD822

V

4

R

100pF

L

OUT

2µs1V

100

90

10
0%

GND

Figure 34. VS = +5 V, 0 V; Unity Gain Follower Response
to 0 V to 5 V Step

2µs10mV

100
90

10

GND

0%

Figure 32. Unity Gain Follower

10k

V

IN

AD822

+V

8

1/2

20k

V

S

0.01µF

4

R

L

OUT

100pF

Figure 33. Gain of Two Inverter

Figure 35. VS = +5 V, 0 V; Unity Gain Follower Response,
to 40 mV Step Centered 40 mV Above Ground, R

10mV

100
90

10

0%

GND

2µs

= 10 k

L

Ω

Figure 36. VS = +5 V, 0 V; Gain of Two Inverter Response
to 20 mV Step, Centered 20 mV Below Ground, R

= 10 k

L

Ω

–12–

REV. A

AD822

GND

1V

100

90

10

0%

2µs

Figure 37. VS = +5 V, 0 V; Gain of Two Inverter Response
to 2.5 V Step Centered –1.25 V Below Ground, R

10µs500mV

100

90

= 10 k

L

Ω

GND

+V

GND

1V

100

90

10

0%

1V

2µs

a

1V

100

90

S

10

0%

1V

1V

10µs

b.

+5V

R

P

V

IN

V

OUT

10

0%

GND

Figure 38. VS = 3 V, 0 V; Gain of Two Inverter, VIN = 1.25 V,
25 kHz, Sine Wave Centered at –0.75 V, R

= 600

L

Ω

APPLICATION NOTES

INPUT CHARACTERISTICS

In the AD822, n-channel JFETs are used to provide a low
offset, low noise, high impedance input stage. Minimum input
common-mode voltage extends from 0.2 V below –V
less than +V

. Driving the input voltage closer to the positive

S

to 1 V

S

rail will cause a loss of amplifier bandwidth (as can be seen by
comparing the large signal responses shown in Figures 31 and

34) and increased common-mode voltage error as illustrated in
Figure 17.

The AD822 does not exhibit phase reversal for input voltages
up to and including +V
AD822 voltage follower to a 0 V to +5 V (+V

. Figure 39a shows the response of an

S

) square wave

S

input. The input and output arc superimposed. The output
tracks the input up to +V

without phase reversal. The reduced

S

bandwidth above a 4 V input causes the rounding of the output
wave form. For input voltages greater than +V

, a resistor in

S

series with the AD822’s noninverting input will prevent phase
reversal, at the expense of greater input voltage noise. This is
illustrated in Figure 39b.

Figure 39. (a) Response with RP = 0; VIN from 0 to +V

S

(b) VIN = 0 to +VS + 200 mV

V

= 0 to +V

OUT

RP = 49.9 k

S

Ω

Since the input stage uses n-channel JFETs, input current
during normal operation is negative; the current flows out from
the input terminals. If the input voltage is driven more positive
than +V

– 0.4 V, the input current will reverse direction as

S

internal device junctions become forward biased. This is
illustrated in Figure 4.

A current limiting resistor should be used in series with the
input of the AD822 if there is a possibility of the input voltage
exceeding the positive supply by more than 300 mV, or if an
input voltage will be applied to the AD822 when ±V

= 0. The

S

amplifier will be damaged if left in that condition for more than
10 seconds. A 1 kΩ resistor allows the amplifier to withstand up
to 10 volts of continuous overvoltage, and increases the input
voltage noise by a negligible amount.

Input voltages less than –V

are a completely different story.

S

The amplifier can safely withstand input voltages 20 volts below
the minus supply voltage as long as the total voltage from the
positive supply to the input terminal is less than 36 volts. In
addition, the input stage typically maintains picoamp level input
currents across that input voltage range.

REV. A

–13–

AD822

The AD822 is designed for 13 nV/√Hz wideband input voltage
noise and maintains low noise performance to low frequencies
(refer to Figure 11). This noise performance, along with the
AD822’s low input current and current noise means that the
AD822 contributes negligible noise for applications with source
resistances greater than 10 kΩ and signal bandwidths greater
than 1 kHz. This is illustrated in Figure 40.

100k

WHENEVER JOHNSON NOISE IS GREATER THAN
AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE
CONSIDERED NEGLIGIBLE FOR APPLICATION.

10k

RMS

1k

RESISTOR JOHNSON

100

10

INPUT VOLTAGE NOISE – µV

1

0.1
10k

NOISE

100k

AMPLIFIER GENERATED

SOURCE IMPEDANCE – Ω

1kHz

NOISE

10Hz

10G

1G100M10M1M

Figure 40. Total Noise vs. Source Impedance

OUTPUT CHARACTERISTICS

The AD822 s unique bipolar rail-to-rail output stage swings
within 5 mV of the minus supply and 10 mV of the positive
supply with no external resistive load. The AD822’s
approximate output saturation resistance is 40 Ω sourcing and
20 Ω sinking. This can be used to estimate output saturation
voltage when driving heavier current loads. For instance, when
sourcing 5 mA, the saturation voltage to the positive supply rail
will be 200 mV, when sinking 5 mA, the saturation voltage to
the minus rail will be 100 mV.

The amplifier’s open-loop gain characteristic will change as a
function of resistive load, as shown in Figures 7 through 10. For
load resistances over 20 kΩ, the AD822’s input error voltage is
virtually unchanged until the output voltage is driven to 180 mV
of either supply.

If the AD822’s output is overdriven so as to saturate either of
the output devices, the amplifier will recover within 2 µs of its
input returning to the amplifier’s linear operating region.

Direct capacitive loads will interact with the amplifier’s effective
output impedance to form an additional pole in the amplifier’s
feedback loop, which can cause excessive peaking on the pulse
response or loss of stability. Worst case is when the amplifier is
used as a unity gain follower. Figure 41 shows the AD822’s
pulse response as a unity gain follower driving 350 pF. This
amount of overshoot indicates approximately 20 degrees of
phase margin—the system is stable, but is nearing the edge.
Configurations with less loop gain, and as a result less loop
bandwidth, will be much less sensitive to capacitance load
effects. Figure 42 is a plot of capacitive load that will result in a
20 degree phase margin versus noise gain for the AD822. Noise
gain is the inverse of the feedback attenuation factor provided
by the feedback network in use.

20mV 2µs

100

90

10
0%

Figure 41. Small Signal Response of AD822 as Unity Gain
Follower Driving 350 pF Capacitive Load

5

4

I

F

R

R

3

NOISE GAIN – 1+ –––

2

1

300 30k

1k

CAPACITIVE LOAD FOR 20° PHASE MARGIN – pF

R

I

3k 10k

R

F

C

L

Figure 42. Capacitive Load Tolerance vs. Noise Gain

Figure 43 shows a method for extending capacitance load drive
capability for a unity gain follower. With these component
values, the circuit will drive 5,000 pF with a 10% overshoot.

+V

S

0.01µF

8

V

IN

1/2

AD822

20kΩ

0.01µF

4
–V

S

20pF

100Ω

V

OUT

C

L

Figure 43. Extending Unity Gain Follower Capacitive Load
Capability Beyond 350 pF

–14–

REV. A

AD822

APPLICATIONS
Single Supply Voltage-to-Frequency Converter

The circuit shown in Figure 44 uses the AD822 to drive a low
power timer, which produces a stable pulse of width t

. The

1

positive going output pulse is integrated by R1-C1 and used as
one input to the AD822, which is connected as a differential
integrator. The other input (nonloading) is the unknown
voltage, V

. The AD822 output drives the timer trigger input,

IN

closing the overall feedback loop.

+10V

C5

0.1µF

V

IN

0V TO 2.5V
FULL SCALE

REF-02

2

V

6

53

4

499k, 1%

R1

499k, 1%

0.01µF, 2%

U4

= 5V

REF

R

SCALE

10k

R2

C2

CMOS

**

74HCO4

C1

U3A
21

R3*

116k

C6

390pF

5%

(NPO)

AS SHOWN.

S

U3B

43

0.01µF, 2%

U1

1/2

AD822B

NOTES:
f

= VIN/(VREF*t1), t1 = 1.1*R3*C6

OUT

= 25kHz f

RV+

6

THR

2

TR

7

DIS

C3

0.1µF

U2
CMOS 555

48

OUT

CV

GND

1

C4

0.01µF

OUT2

OUT1

3

5

* = 1% METAL FILM, <50ppm/°C TC
** = 10%, 20T FILM, <100ppm/°C TC

t

= 33µs FOR f

1

= 20kHz @ VIN = 2.0V

OUT

Table I. AD822 In Amp Performance

Parameters VS = 3 V, 0 V VS = 65 V

CMRR 74 dB 80 dB
Common-Mode

Voltage Range –0.2 V to +2 V –5.2 V to +4 V

3 dB BW, G = 10 180 kHz 180 kHz

G = 100 18 kHz 18 kHz

t

SETTLING

2 V Step (VS = 0 V, 3 V) 2 µs
5 V (V

= ±5 V) 5 µs

Noise @ f = 1 kHz, G = 10 270 nV/√
I

SUPPLY

S

Hz 270 nV/√Hz

G = 100 2.2 µV/√

Hz 2.2 µV/√Hz

(Total) 1.10 mA 1.15 mA

5µs

100

90

10
0%

1V

Figure 45a. Pulse Response of In Amp to a 500 mV p-p
Input Signal; V

= +5 V, 0 V; Gain = 10

S

Figure 44. Single Supply Voltage-to-Frequency Converter

Typical AD822 bias currents of 2 pA allow megaohm-range
source impedances with negligible dc errors. Linearity errors on
the order of 0.01% full scale can be achieved with this circuit.
This performance is obtained with a 5 volt single supply which
delivers less than 1 mA to the entire circuit.

Single Supply Programmable Gain Instrumentation Amplifier

The AD822 can be configured as a single supply instrumenta­tion amplifier that is able to operate from single supplies down
to 3 V, or dual supplies up to ±15 V. Using only one AD822
rather than three separate op amps, this circuit is cost and power
efficient. AD822 FET inputs’ 2 pA bias currents minimize offset
errors caused by high unbalanced source impedances.

An array of precision thin-film resistors sets the in amp gain to
be either 10 or 100. These resistors are laser-trimmed to ratio
match to 0.01%, and have a maximum differential TC of
5 ppm/°C.

R1 R2 R3 R4 R5 R6

V

REF

G =10 G =100

+V

S

2

R

P

1/2

AD822

3

(G =10) V

(G =100) V

FOR R1 = R6, R2 = R5, AND R3 = R4

R

V

IN1

V

IN2

P

1kΩ

1kΩ

8

0.1µF

1

OUT

OUT

= (V

= (V

G =100 G =10

6

1/2

AD822

5

–V

) (1+ ) +V

IN1

IN2

–V

) (1+ ) +V

IN1

IN2

Figure 45b. A Single Supply Programmable
Instrumentation Amplifier

90k9k1k1k9k90k

4

R6

R4 + R5
R5 + R6

R4

7

REF

REF

OHMTEK
PART # 1043

V

OUT

REV. A

–15–

AD822

)
)

+3V

0.1µF0.1µF

L

R

CHANNEL 1

CHANNEL 2

1µF

MYLAR

95.3k

1µF

MYLAR

95.3k

47.5k

47.5k

3

2

10k

10k

AD822

6

AD822

5

1/2

8

4.99k

4.99k

1/2

4

11

500µF

HEADPHONES

32Ω IMPEDANCE

7

500µF

Figure 46. 3 Volt Single Supply Stereo Headphone Driver

3 Volt, Single Supply Stereo Headphone Driver

The AD822 exhibits good current drive and THD+N perfor­mance, even at 3 V single supplies. At 1 kHz, total harmonic
distortion plus noise (THD+N) equals –62 dB (0.079%) for a
300 mV p-p output signal. This is comparable to other single
supply op amps which consume more power and cannot run on
3 V power supplies.

In Figure 46, each channel s input signal is coupled via a 1 µF
Mylar capacitor. Resistor dividers set the dc voltage at the non­inverting inputs so that the output voltage is midway between
the power supplies (+1.5 V). The gain is 1.5. Each half of the
AD822 can then be used to drive a headphone channel. A 5 Hz
high-pass filter is realized by the 500 µF capacitors and the head-
phones, which can be modeled as 32 ohm load resistors to
ground. This ensures that all signals in the audio frequency
range (20 Hz–20 kHz) are delivered to the headphones.

Low Dropout Bipolar Bridge Driver

The AD822 can be used for driving a 350 ohm Wheatstone
bridge. Figure 47 shows one half of the AD822 being used to
buffer the AD589—a 1.235 V low power reference. The output
of +4.5 V can be used to drive an A/D converter front end. The
other half of the AD822 is configured as a unity-gain inverter,
and generates the other bridge input of –4.5 V. Resistors R1 and
R2 provide a constant current for bridge excitation. The AD620
low power instrumentation amplifier is used to condition the
differential output voltage of the bridge. The gain of the AD620
is programmed using an external resistor R

, and determined

G

by:

49.4 kΩ

49.9k
+1.235V

AD589

10k
1%

10k
1%

3

2

6

5

AD822

+V

S

8

1/2

AD822

26.4k, 1%

350Ω

10k

1%

1/2

4

350Ω

G =

11

7

R1
20Ω

–4.5V
R2

20Ω

+1

R

G

TO A/D CONVERTER
REFERENCE INPUT

350Ω

R

G

350Ω

+V

S

3

2

+V

GND

–V

+V

AD620

–V

S

0.1µF

0.1µF

S

S

7

6

5

4

V

REF

S

+5V

1µF

1µF

–5V

Figure 47. Low Dropout Bipolar Bridge Driver

C1821a–10–9/94

Mini-DIP (N) Package

PIN 1

0.165±0.01

(4.19±0.25)

0.125

(3.18)

MIN

8

0.018±0.003
(0.46±0.08)

1

0.39 (9.91) MAX

0.30 (7.62)

0.011±0.003

15

0.10

(2.54)

BSC

REF

(0.28±0.08)

°

0

°

0.033

(0.84)

NOM

5

4

0.25

(6.35)

0.035±0.01
(0.89±0.25)

0.18±0.03
(4.57±0.76)

SEATING
PLANE

0.31

(7.87)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

Cerdip (Q) Package

0.005 (0.13) MIN 0.055 (1.35) MAX

0.200

(5.08)

MAX

0.200 (5.08)

0.125 (3.18)

8

0.405 (10.29) MAX

0.023 (0.58)

0.014 (0.36)

0°-15°

0.320 (8.13)

0.290 (7.37)

0.100 (2.54)

0.015 (0.38)

0.008 (0.20)

BSC

5

41

0.310 (7.87)

0.220 (5.59)

0.070 (1.78)

0.030 (0.76)

0.060 (1.52)

0.015 (0.38)

0.150
(3.81)
MIN

SEATING
PLANE

–16–

SOIC (R) Package

0.244 (6.20)

0.228 (5.79)

0.010 (0.25)

0.004 (0.10)

0.098 (0.2482)

0.075 (0.1905)

8

PIN 1

1

0.050
(1.27)

0.020 (0.051) x 45
CHAMF

8

°

0

°

10

0.150 (3.81)

0.197 (5.01)

0.189 (4.80)

BSC

°

0.190 (4.82)

0.170 (4.32)

°

0

°

5

4

0.019 (0.48)

0.014 (0.36)

0.030 (0.76)

0.018 (0.46)

0.157 (3.99

0.150 (3.81

0.102 (2.59)

0.094 (2.39)

0.090
(2.29)

REV. A

PRINTED IN U.S.A.