Datasheet AD8130 Datasheet (ANALOG DEVICES)

Low Cost 270 MHz

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FEATURES

High speed

AD8130: 270 MHz, 1090 V/μs @ G = +1
AD8129: 200 MHz, 1060 V/μs @ G = +10

High CMRR

94 dB min, dc to 100 kHz
80 dB min @ 2 MHz

70 dB @ 10 MHz
High input impedance: 1 MΩ differential
Input common-mode range ±10.5 V
Low noise

AD8130: 12.5 nV/√Hz

AD8129: 4.5 nV/√Hz
Low distortion, 1 V p-p @ 5 MHz

AD8130, −79 dBc worst harmonic @ 5 MHz

AD8129, −74 dBc worst harmonic @ 5 MHz
User-adjustable gain

No external components for G = +1
Power supply range +4.5 V to ±12.6 V
Power-down

APPLICATIONS

High speed differential line receivers
Differential-to-single-ended converters
High speed instrumentation amps
Level shifting

Differential Receiver Amplifiers

AD8129/AD8130

CONNECTION DIAGRAM

AD8129/

AD8130

1

+IN

2

V

–

S

+

3

PD

4

REF

Figure 1.

The AD8129/AD8130 are differential-to-single-ended amplifiers
with extremely high CMRR at high frequency. Therefore, they
can also be effectively used as high speed instrumentation amps
or for converting differential signals to single-ended signals.

The AD8129 is a low noise, high gain (10 or greater) version
in

tended for applications over very long cables, where signal
attenuation is significant. The AD8130 is stable at a gain of 1
and can be used for applications where lower gains are required.
Both have user-adjustable gain to help compensate for losses in
the transmission line. The gain is set by the ratio of two resistor
values. The AD8129/AD8130 have very high input impedance
on both inputs, regardless of the gain setting.

8

–IN

+V

7

S

OUT

6

FB

5

02464-001

GENERAL DESCRIPTION

The AD8129/AD8130 are designed as receivers for the
transmission of high speed signals over twisted-pair cables to
work with the AD8131 or AD8132 drivers. Either can be used
f

or analog or digital video signals and for high speed data

transmission.

120

110

100

90

80

70

CMRR (dB)

60

50

40

30

10k 100k 1M 10M 100M

Figure 2. AD8129 CMRR vs. Frequency

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

FREQUENCY (Hz)

02464-002

The AD8129/AD8130 have excellent common-mode rejection
(70 dB @ 10 MHz), allowing the use of low cost, unshielded
twisted-pair cables without fear of corruption by external noise
sources or crosstalk. The AD8129/AD8130 have a wide power
supply range from single +5 V to ±12 V, allowing wide common­mode and differential-mode voltage ranges while maintaining
signal integrity. The wide common-mode voltage range enables
the driver-receiver pair to operate without isolation transformers
in many systems where the ground potential difference between
drive and receive locations is many volts. The AD8129/AD8130
have considerable cost and performance improvements over
op amps and other multiamplifier receiving solutions.

+V

S

PD

3

IN

R

G

V

OUT=VIN

1
8

4
5

[1+(RF/RG)]

7

6

2

R

F

–V

S

V

Figure 3. Typical Connection Configuration

OUT

02464-003

V

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Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

AD8129/AD8130

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TABLE OF CONTENTS

Features.............................................................................................. 1

Theory of Operation ...................................................................... 32

Applications....................................................................................... 1

Connection Diagram ....................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

AD8129/AD8130 Specifications..................................................... 3

5 V Specifications ......................................................................... 3

±5 V Specifications....................................................................... 5

±12 V Specifications..................................................................... 7

Absolute Maximum Ratings............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution.................................................................................. 9

Typical Performance Characteristics ........................................... 10

AD8130 Frequency Response Characteristics........................ 10

AD8129 Frequency Response Characteristics........................ 13

AD8130 Harmonic Distortion Characteristics ......................16

AD8129 Harmonic Distortion Characteristics ......................18

Op Amp Configuration............................................................. 32

Applications..................................................................................... 33

Basic Gain Circuits..................................................................... 33

Twisted-Pair Cable, Composite Video Receiver with

Equalization Using an AD8130................................................... 33

Output Offset/Level Translator ................................................ 34

Resistorless Gain of 2................................................................. 35

Summer ....................................................................................... 35

Cable-Tap Amplifier .................................................................. 35

Power-Down ............................................................................... 36

Extreme Operating Conditions................................................ 36

Power Dissipation....................................................................... 37

Layout, Grounding, and Bypassing.......................................... 38

Outline Dimensions....................................................................... 39

Ordering Guide .......................................................................... 40

AD8130 Transient Response Characteristics.......................... 23

AD8129 Transient Response Characteristics.......................... 26

REVISION HISTORY

11/05—Rev. B to Rev. C

Changes to 5 V Specifications......................................................... 3

Changes to Table 4 and Maximum Power Dissipation Section.. 9

Changes to Figure 16...................................................................... 11

Changes to Figure 17...................................................................... 12

9/05—Rev. A to Rev. B

xtended Temperature Range...........................................Universal

E

Deleted Figure 5................................................................................ 5

Added Thermal Resistance Section ............................................... 9

Updated Outline Dimensions....................................................... 39

Changes to Ordering Guide.......................................................... 40

3/05—Rev. 0 to Rev. A

hanges to Specifications.................................................................2

C

Replaced Figure 3 ..............................................................................5

Changes to Ordering Guide.............................................................6

Updated Outline Dimensions....................................................... 27

Revision 0: Initial Version

Rev. C | Page 2 of 40

AD8129/AD8130

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AD8129/AD8130 SPECIFICATIONS

5 V SPECIFICATIONS

AD8129 G = +10, AD8130 G = +1, TA = 25°C, +VS = 5 V, −VS = 0 V, REF = 2.5 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted.

to T

T

MIN

Table 1.

Model AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V
V
Bandwidth for 0.1 dB

Slew Rate

Settling Time V
Rise and Fall Times

Output Overdrive Recovery 20 30 ns

NOISE/DISTORTION

Second Harmonic/Third

V
V
V
IMD V
Output IP3 V
Input Voltage Noise (RTI) f ≥ 10 kHz 4.5 12.3 nV/√Hz
Input Current Noise (+IN, −IN) f ≥ 100 kHz 1 1 pA/√Hz
Input Current Noise

Differential Gain Error

Differential Phase Error

INPUT CHARACTERISTICS

Common-Mode Rejection

V
V
CMRR with V

Common-Mode Voltage

Differential Operating Range ±0.5 ±2.5 V
Differential Clipping Level ±0.6 ±0.75 ±0.85 ±2.3 ±2.8 ±3.3 V
Resistance Differential 1 6 MΩ
Common mode 4 4 MΩ
Capacitance Differential 3 3 pF

Common mode 4 4 pF

= −40°C to +125°C, unless otherwise noted.

MAX

≤ 0.3 V p-p 160 185 220 250 MHz

OUT

= 1 V p-p 160 185 180 205 MHz

OUT

V

≤ 0.3 V p-p,

Flatness

OUT

SOIC/MSOP

= 2 V p-p, 25%

V

OUT

to 75%

= 2 V p-p, 0.1% 20 20 ns

OUT

≤ 1 V p-p, 10%

V

OUT

to 90%

V

= 1 V p-p, 5 MHz −68/−75 −72/−79 dBc

OUT

Harmonic

= 2 V p-p, 5 MHz −62/−64 −65/−71 dBc

OUT

= 1 V p-p, 10 MHz −63/−70 −60/−62 dBc

OUT

= 2 V p-p, 10 MHz −56/−58 −68/−68 dBc

OUT

= 2 V p-p, 10 MHz −67 −70 dBc

OUT

= 2 V p-p, 10 MHz 25 26 dBm

OUT

f ≥ 100 kHz 1.4 1.4 pA/√Hz

(REF, FB)

AD8130, G = +2, NTSC
100 IRE

AD8130, G = +2, NTSC
100 IRE

DC to 100 kHz,

Ratio

= 1 V p-p

OUT

= 1.5 V to 3.5 V

V

CM

= 1 V p-p @ 1 MHz 80 80 dB

CM

= 1 V p-p @ 10 MHz 70 70 dB

CM

= 1 V p-p @ 1 kHz,

V

CM

= ±0.5 V dc

V

OUT

V

− V

+IN

Range

, R

≥ 150 Ω

L

≥ 150 Ω

, R

L

= 0 V

−IN

25/40 25 MHz

810 930 810 930 V/μs

1.8 1.5 ns

0.3 0.13 %

0.1 0.15 Degrees

86 96 86 96 dB

80 72 dB

1.25 to

3.7

1.25 to

3.8

V

Rev. C | Page 3 of 40

AD8129/AD8130

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Model AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DC PERFORMANCE

Closed-Loop Gain Error V
T
Open-Loop Gain V
Gain Nonlinearity V
Input Offset Voltage 0.2 0.8 0.4 1.8 mV
T
T
Input Offset Voltage vs.

Supply

Input Bias Current

(+IN, −IN)

Input Bias Current

(REF, FB)

Input Offset Current (+IN, −IN, REF, FB) ±0.08 ±0.4 ±0.08 ±0.4 μA
T

OUTPUT PERFORMANCE

Voltage Swing R
Output Current 35 35 mA
Short-Circuit Current To common −60/+55 −60/+55 mA
T
Output Impedance

POWER SUPPLY

Operating Voltage Range Total supply voltage ±2.25 ±12.6 ±2.25 ±12.6 V
Quiescent Supply Current 9.9 10.6 9.9 10.6 mA
T

PD

PIN
VIH +VS − 1.5 +VS − 1.5 V
VIL +VS − 2.5 +VS − 2.5 V
IIH

IIL
Input Resistance

Enable Time 0.5 0.5 μs

OPERATING TEMPERATURE

RANGE

= ±1 V, RL ≥ 150 Ω ±0.25 ±1.25 ±0.1 ±0.6 %

OUT

to T

MIN

OUT

OUT

MIN

MIN

+VS = 5 V, −VS = −0.5 V

20 20 ppm/°C

MAX

= ±1 V 86 71 dB
= ±1 V 250 200 ppm

to T

2 20 μV/°C

MAX

to T

1.4 3.5 mV

MAX

−88 −80 −74 −70 dB

to +0.5 V

= 0 V, +VS = +4.5 V

−V

S

−100 −86 −90 −76 dB

to +5.5 V
±0.5 ±2 ±0.5 ±2 μA

±1 ±3.5 ±1 ±3.5 μA

to T

T

MIN

(+IN, −IN,

MAX

5 5 nA/°C

REF, FB)

to T

MIN

LOAD

MIN

PD

≤ VIL, in power-

0.2 0.2 nA/°C

MAX

≥ 150 Ω 1.1 3.9 1.1 3.9 V

to T

−240 −240 μA/°C

MAX

10 10 pF

down mode

to T

MIN

PD
PD

≤ VIL
≤ VIL, T

33 33 μA/°C

MAX

0.65 0.85 0.65 0.85 mA

MIN

to T

MAX

1 1 mA

PD

= min VIH

PD

= max VIL

PD

≤ +VS − 3 V

PD

≥ +VS − 2 V

−30 −30 μA

−50 −50 μA

12.5 12.5 kΩ
100 100 kΩ

−40 +125 −40 +125 °C

Rev. C | Page 4 of 40

AD8129/AD8130

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±5 V SPECIFICATIONS

AD8129 G = +10, AD8130 G = +1, TA = 25°C, VS = ±5 V, REF = 0 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted. T
= −40°C to +125°C, unless otherwise noted.

Table 2.

AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V
V
Bandwidth for 0.1 dB

Flatness

Slew Rate

≤ 0.3 V p-p 175 200 240 270 MHz

OUT

= 2 V p-p 170 190 140 155 MHz

OUT

V

≤ 0.3 V p-p,

OUT

30/50 45 MHz

SOIC/MSOP

= 2 V p-p,

V

OUT

925 1060 950 1090 V/μs

25% to 75%
Settling Time V
Rise and Fall Times

= 2 V p-p, 0.1% 20 20 ns

OUT

≤ 1 V p-p,

V

OUT

1.7 1.4 ns

10% to 90%
Output Overdrive Recovery 30 40 ns

NOISE/DISTORTION

V

Second Harmonic/Third

= 1 V p-p, 5 MHz −74/−84 −79/−86 dBc

OUT

Harmonic
V
V
V
IMD V
Output IP3 V

= 2 V p-p, 5 MHz −68/−74 −74/−81 dBc

OUT

= 1 V p-p, 10 MHz −67/−81 −74/−80 dBc

OUT

= 1 V p-p, 10 MHz −61/−70 −74/−76 dBc

OUT

= 2 V p-p, 10 MHz −67 −70 dBc

OUT

= 2 V p-p, 10 MHz 25 26 dBm

OUT

Input Voltage Noise (RTI) f ≥ 10 kHz 4.5 12.5 nV/√Hz
Input Current Noise

f ≥ 100 kHz 1 1 pA/√Hz

(+IN, −IN)
Input Current Noise

f ≥ 100 kHz 1.4 1.4 pA/√Hz

(REF, FB)
Differential Gain Error

Differential Phase Error

AD8130, G = +2, NTSC
200 IR

L

≥ 150 Ω

E, R

AD8130, G = +2, NTSC

≥ 150 Ω

IRE, R

200

L

0.3 0.13 %

0.1 0.15 Degrees

INPUT CHARACTERISTICS

Common-Mode Rejection

Ratio
V
V
CMRR with V

= 1 V p-p

OUT

Common-Mode Voltage

DC to 100 kHz,

= −3 V to +3.5 V

V

CM

= 1 V p-p @ 2 MHz 80 80 dB

CM

= 1 V p-p @ 10 MHz 70 70 dB

CM

= 2 V p-p @ 1 kHz,

V

CM

= ±0.5 V dc

V

OUT

V

− V

+IN

= 0 V ±3.5 ±3.8 V

−IN

94 110 90 110 dB

100 83 dB

Range
Differential Operating

±0.5 ±2.5 V

Range
Differential Clipping Level ±0.6 ±0.75 ±0.85 ±2.3 ±2.8 ±3.3 V
Resistance Differential 1 6 MΩ
Common mode 4 4 MΩ
Capacitance Differential 3 3 pF

Common mode 4 4 pF

MIN

to T

MAX

Rev. C | Page 5 of 40

AD8129/AD8130

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AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DC PERFORMANCE

Closed-Loop Gain Error V
T
Open-Loop Gain V
Gain Nonlinearity V
Input Offset Voltage 0.2 0.8 0.4 1.8 mV
T
T
Input Offset Voltage vs.

Supply

Input Bias Current

(+IN, −IN)

Input Bias Current (REF, FB) ±1 ±3.5 ±1 ±3.5 μA

Input Offset Current (+IN, −IN, REF, FB) ±0.08 ±0.4 ±0.08 ±0.4 μA
T

OUTPUT PERFORMANCE

Voltage Swing R
Output Current 40 40
Short-Circuit Current To common −60/+55 −60/+55
T
Output Impedance

POWER SUPPLY

Operating Voltage Range Total supply voltage ±2.25 ±12.6 ±2.25 ±12.6 V
Quiescent Supply Current 10.8 11.6 10.8 11.6 mA
T

PD

PIN
VIH +VS − 1.5 +VS − 1.5 V
VIL +VS − 2.5 +VS − 2.5 V
IIH

IIL
Input Resistance

Enable Time 0.5 0.5 μs

OPERATING TEMPERATURE

RANGE

= ±1 V, RL ≥ 150 Ω ±0.4 ±1.5 ±0.15 ±0.6 %

OUT

to T

MIN

OUT

OUT

MIN

MIN

+VS = +5 V, −VS = −4.5 V

20 10 ppm/°C

MAX

= ±1 V 88 74 dB
= ±1 V 250 200 ppm

to T

2 20 μV/°C

MAX

to T

1.4 3.5 mV

MAX

−90 −84 −78 −74 dB

to −5.5 V

= −5 V, +VS = +4.5 V

−V

S

−94 −86 −80 −74 dB

to +5.5 V
±0.5 ±2 ±0.5 ±2 μA

to T

T

MIN

(+IN, −IN,

MAX

5 5 nA/°C

REF, FB)

to T

MIN

LOAD

MIN

PD

≤ VIL, in power-

0.2 0.2 nA/°C

MAX

= 150 Ω/1 kΩ 3.6/4.0 3.6/4.0 ±V

to T

−240 −240 μA/°C

MAX

10 10

mA
mA

pF

down mode

to T

MIN

PD
PD

≤ VIL
≤ VIL, T

36 36 μA/°C

MAX

0.68 0.85 0.68 0.85 mA

MIN

to T

MAX

1 1 mA

PD

= min VIH

PD

= max VIL

PD

≤ +VS − 3 V

PD

≥ +VS − 2 V

−30 −30 μA

−50 −50 μA

12.5 12.5 kΩ
100 100 kΩ

−40 +125 −40 +125 °C

Rev. C | Page 6 of 40

AD8129/AD8130

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±12 V SPECIFICATIONS

AD8129 G = +10, AD8130 G = +1, TA = 25°C, VS = ±12 V, REF = 0 V, PD ≥ VIH, RL = 1 kΩ, CL = 2 pF, unless otherwise noted. T

= −40°C to +85°C, unless otherwise noted.

T

MAX

Table 3.

AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V
V
Bandwidth for 0.1 dB Flatness

≤ 0.3 V p-p 175 200 250 290 MHz

OUT

= 2 V p-p 170 195 150 175 MHz

OUT

≤ 0.3 V p-p,

V

OUT

50/70 110 MHz

SOIC/MSOP

Slew Rate

= 2 V p-p, 25%

V

OUT

935 1070 960 1100 V/μs

to 75%
Settling Time V
Rise and Fall Times

= 2 V p-p, 0.1% 20 20 ns

OUT

≤ 1 V p-p, 10%

V

OUT

1.7 1.4 ns

to 90%
Output Overdrive Recovery 40 40 ns

NOISE/DISTORTION

V

Second Harmonic/Third

= 1 V p-p, 5 MHz −71/−84 −79/−86 dBc

OUT

Harmonic
V
V
V
IMD V
Output IP3 V

= 2 V p-p, 5 MHz −65/−74 −74/−81 dBc

OUT

= 1 V p-p, 10 MHz −65/−82 −74/−80 dBc

OUT

= 2 V p-p, 10 MHz −59/−70 −74/−74 dBc

OUT

= 2 V p-p, 10 MHz −67 −70 dBc

OUT

= 2 V p-p, 10 MHz 25 26 dBm

OUT

Input Voltage Noise (RTI) f ≥ 10 kHz 4.6 13 nV/√Hz
Input Current Noise

f ≥ 100 kHz 1 1 pA/√Hz

(+IN, −IN)
Input Current Noise

f ≥ 100 kHz 1.4 1.4 pA/√Hz

(REF, FB)
Differential Gain Error

Differential Phase Error

AD8130, G = +2, NTSC
200 IRE

L

≥ 150 Ω

, R

AD8130, G = +2, NTSC

≥ 150 Ω

, R

200 IRE

L

0.3 0.13 %

0.1 0.2 Degrees

INPUT CHARACTERISTICS

Common-Mode Rejection

Ratio
V
V
CMRR with V

= 1 V p-p

OUT

Common-Mode Voltage

DC to 100 kHz,

= ±10 V

V

CM

= 1 V p-p @ 2 MHz 80 80 dB

CM

= 1 V p-p @ 10 MHz 70 70 dB

CM

= 4 V p-p @ 1 kHz,

V

CM

= ±0.5 V dc

V

OUT

V

− V

+IN

= 0 V ±10.3 ±10.5 V

–IN

92 105 88 105 dB

93 80 dB

Range
Differential Operating Range ±0.5 ±2.5 V
Differential Clipping Level ±0.6 ±0.75 ±0.85 ±2.3 ±2.8 ±3.3 V
Resistance Differential 1 6 MΩ
Common mode 4 4 MΩ
Capacitance Differential 3 3 pF
Common mode 4 4 pF

MIN

to

Rev. C | Page 7 of 40

AD8129/AD8130

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AD8129 AD8130
Parameter Conditions Min Typ Max Min Typ Max Unit

DC PERFORMANCE

Closed-Loop Gain Error V
T
Open-Loop Gain V
Gain Nonlinearity V
Input Offset Voltage 0.2 0.8 0.4 1.8 mV
T
T
Input Offset Voltage vs. Supply

Input Bias Current (+IN, −IN) ±0.25 ±2 ±0.25 ±2 μA
Input Bias Current (REF, FB) ±0.5 ±3.5 ±0.5 ±3.5 μA

Input Offset Current (+IN, −IN, REF, FB) ±0.08 ±0.4 ±0.08 ±0.4 μA
T

OUTPUT PERFORMANCE

Voltage Swing R
Output Current 40 40
Short-Circuit Current To common −60/+55 −60/+55
T
Output Impedance

POWER SUPPLY

Operating Voltage Range Total supply voltage ±2.25 ±12.6 ±2.25 ±12.6 V
Quiescent Supply Current 13 13.9 13 13.9 mA
T

PD

PIN

V

+VS − 1.5 +VS − 1.5 V

IH

V

+VS − 2.5 +VS − 2.5 V

IL

IIH
IIL
Input Resistance

Enable Time 0.5 0.5 μs

OPERATING TEMPERATURE

RANGE

= ±1 V, RL ≥ 150 Ω ±0.8 ±1.8 ±0.15 ±0.6 %

OUT

to T

20 10 ppm/°C

MAX

= ±1 V 87 73 dB
= ±1 V 250 200 ppm

to T

2 20 μV/°C

MAX

to T

1.4 3.5 mV

MAX

= +12 V, −VS =

−88 −82 −77 −70 dB

+V

MIN

OUT

OUT

MIN

MIN

S

–11.0 V to −13.0 V

= −12 V, +VS =

−V

S

−92 −84 −88 −70 dB

+11.0 V to +13.0 V

to T

MAX

T

MIN

2.5 2.5 nA/°C

(+IN, −IN, REF, FB)

to T

MIN

LOAD

MIN

PD

0.2 0.2 nA/°C

MAX

= 700 Ω ±10.8 ±10.8

to T

−240 −240 μA/°C

MAX

≤ VIL, in power-

10 10

V
mA
mA

pF

down mode

to T

MIN

PD
PD

43 43 μA°C

MAX

≤ VIL
≤ VIL, T

MIN

to T

MAX

0.73 0.9 0.73 0.9 mA

1.1 1.1 mA

PD

= min VIH

PD

= max VIL

PD

≤ +VS − 3 V

PD

≥ +VS − 2 V

−30 −30 μA

−50 −50 μA
3 3 kΩ
100 100 kΩ

−40 +85 −40 +85 °C

Rev. C | Page 8 of 40

AD8129/AD8130

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

Supply Voltage 26.4 V
Power Dissipation Refer to Figure 4
Input Voltage (Any Input) −VS − 0.3 V to +VS + 0.3 V
Differential Input Voltage (AD8129)

VS ≥ ±11.5 V ±0.5 V

Differential Input Voltage (AD8129)

VS < ±11.5 V ±6.2 V

Differential Input Voltage (AD8130) ±8.4 V
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, θJA is
specified for the device soldered in a circuit board in still air.

Table 5. Thermal Resistance

Package Type θJA Unit

8-Lead SOIC/4-Layer 121 °C/W
8-Lead MSOP/4-Layer 142 °C/W

Maximum Power Dissipation

The maximum safe power dissipation in the AD8129/AD8130
packages is limited by the associated rise in junction temp­erature (T
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8129/AD8130.
Exceeding a junction temperature of 150°C for an extended
period can result in changes in the silicon devices, potentially
causing failure.

) on the die. At approximately 150°C, which is the

J

The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the
voltage between the supply pins (V
current (I

). The power dissipated due to the load drive

S

depends upon the particular application. The power due to
load drive is calculated by multiplying the load current by the
associated voltage drop across the device. RMS voltages and
currents must be used in these calculations.

Airflow reduces θ

. In addition, more metal directly in contact

JA

with the package leads from metal traces through holes, ground,
and power planes reduces the θ

JA

Figure 4 shows the maximum safe power dissipation in the

ackage vs. the ambient temperature for the 8-lead SOIC

p
(121°C/W) and MSOP (θ
standard 4-layer board. θ

1.75

1.50

1.25

1.00

0.75

0.50

MAXIMUM POWER DISSIPATION (W)

0.25

0

–40–30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110120

Figure 4. Maximum Power Dissipation vs. Temperature

= 142°C/W) packages on a JEDEC

JA

values are approximations.

JA

MSOP

AMBIENT TEMPERATURE (°C)

) is the sum of the

D

) times the quiescent

S

.

SOIC

02464-005

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. C | Page 9 of 40

AD8129/AD8130

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

AD8130 FREQUENCY RESPONSE CHARACTERISTICS

G = +1, RL = 1 kΩ, CL = 2 pF, V

3

V

= 0.3V p-p

OUT

2

1
0

–1
–2

GAIN (dB)

–3

–4
–5

–6
–7

1 10 100 400

Figure 5. AD8130 Frequency Response vs. Supply, V

3

V

= 1V p-p

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

1

Figure 6. AD8130 Frequency Response vs. Supply, V

3

V

= 2V p-p

OUT

2

1
0

–1

–2

GAIN (dB)

–3

–4
–5
–6

–7

1

Figure 7. AD8130 Frequency Response vs. Supply, V

FREQUENCY (MHz)

FREQUENCY (MHz)

FREQUENCY (MHz)

= 0.3 V p-p, TA = 25°C, unless otherwise noted.

OUT

VS = ±2.5V

VS = ±5V

VS = ±12V

02464-006

= 0.3 V p-p

OUT

VS = ±2.5V

VS = ±5V

VS = ±12V

10 100 300

02464-007

= 1 V p-p

OUT

VS = ±2.5V

VS = ±12V

10 100 300

VS = ±5V

02464-008

= 2 V p-p

OUT

6

VS =±5V

5

4

3

2

1

GAIN (dB)

0

–1

–2
–3

–4

1

10 100 300

FREQUENCY (MHz)

CL = 20pF

CL = 10pF

CL = 5pF

CL = 2pF

Figure 8. AD8130 Frequency Response vs. Load Capacitance

0.7

RL = 1kΩ

0.6

0.5

0.4

0.3

0.2

GAIN (dB)

0.1

0

–0.1

–0.2

–0.3

1

FREQUENCY (MHz)

Figure 9. AD8130 Fine Scale Response vs. Supply, R

VS = ±2.5V

VS = ±5V

VS = ±12V

10 100 300

= 1 kΩ

L

0.5

RL = 150Ω

0.4

0.3

0.2

0.1

0

GAIN (dB)

–0.1

–0.2

–0.3

–0.4

–0.5

1

Figure 10. AD8130 Fine Scale Response vs. Supply, R

VS = ±2.5V

VS = ±5V

VS = ±12V

10 100 300

FREQUENCY (MHz)

= 150 Ω

L

02464-009

02464-010

02464-011

Rev. C | Page 10 of 40

AD8129/AD8130

www.BDTIC.com/ADI

3

RL = 150Ω

2

1

0

–1
–2

GAIN (dB)

–3

–4

–5

–6

–7

1

FREQUENCY (MHz)

VS = ±2.5V

VS = ±5V

VS = ±12V

10 100 400

Figure 11. AD8130 Frequency Response vs. Supply, R

3

G = +2
V

= 0.3V p-p

OUT

2
1

0

–1

–2

GAIN (dB)

–3
–4

–5

–6

–7

1

VS = ±5V

VS = ±12V

10 100 300

FREQUENCY (MHz)

Figure 12. AD8130 Frequency Response vs. Supply,

G = +2,

= 0.3 V p-p

V

OUT

3

G = +2
V

= 2V p-p

2

OUT

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

1

VS = ±5V

VS = ±12V

10 100 300

FREQUENCY (MHz)

VS = ±2.5V

Figure 13. AD8130 Frequency Response vs. Supply,

= 2 V p-p

+2, V

G =

OUT

= 150 Ω

L

VS = ±2.5V

02464-012

02464-013

02464-014

3

G = +2

= ±5V

V

S

2

1
0

–1

–2

GAIN (dB)

–3

–4

–5

–6
–7

1

RF = RG = 750Ω

RF = RG = 499Ω

RF = RG = 250Ω

10 100 300

FREQUENCY (MHz)

RF = RG = 1kΩ

Figure 14. AD8130 Frequency Response for Various R

0.3

G = +2
R

= 1kΩ

L

0.2

0.1

0

–0.1

–0.2

GAIN (dB)

–0.3

–0.4

–0.5

–0.6
–0.7

1 10 100

FREQUENCY (MHz)

VS = ±2.5V

VS = ±5V

VS = ±12V

Figure 15. AD8130 Fine Scale Response vs. Supply,

= 1 kΩ

+2, R

G =

L

0.3

G=+2

= 150

Ω

R

L

0.2

0.1

0

–0.1

–0.2

GAIN (dB)

–0.3

–0.4

–0.5

–0.6

–0.7

110

VS=±5V

VS=±12V

FREQUENCY (MHz)

VS=±2.5V

Figure 16. AD8130 Fine Scale Response vs. Supply,

G =

+2, R

= 150 Ω

L

02464-015

F/RG

02464-016

02464-017

100

Rev. C | Page 11 of 40

AD8129/AD8130

www.BDTIC.com/ADI

3

G=+2
R

= 150Ω

L

2
1

0
–1
–2

GAIN (dB)

–3

–4

–5

–6
–7

1 30010 100

VS=±12V

FREQUENCY (MHz)

Figure 17. AD8130 Frequency Response vs. Supply,

G =

+2, R

= 150 Ω

L

0.3

V

= 2V p-p

OUT

0.2

0.1

0
–0.1

–0.2

GAIN (dB)

–0.3

–0.4
–0.5

–0.6
–0.7

0.1

VS = ±2.5V

VS = ±5V, ±12V

FREQUENCY (MHz)

VS = ±2.5V

G = +10 G = +5

110

Figure 18. AD8130 Fine Scale Response vs. Supply,

+5, G = +10, V

G =

= 2 V p-p

OUT

VS= ±2.5V

VS = ±12V

VS=±5V

VS = ±5V

02464-018

02464-019

30

3

RL = 150

2

1

0
–1

–2

GAIN (dB)

–3

–4
–5

–6

–7

0.1

Ω

VS = ±5V, ±12V

G = +10 G = +5

VS = ±2.5V

VS = ±5V, ±12V

1 10 100

FREQUENCY (MHz)

Figure 20. AD8130 Frequency Response vs. Supply,

+5, G = +10, R

G =

= 150 Ω

L

12

0dB = 1V rms

6
0

–6

–12

–18

–24

–30

OUTPUT VOLTAGE (dBV)

–36

–42

VS =±5V

–48

10

FREQUENCY (MHz)

100 400

Figure 21. AD8130 Frequency Response for Various Output Levels

02464-021

02464-022

3

V

= 2V p-p

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

0.1

VS = ±12V

VS = ±5V, ±12V

VS = ±2.5V

G = +10

1 10 100

FREQUENCY (MHz)

Figure 19. AD8130 Frequency Response vs. Supply,

G = +5, G = +10, V

= 2 V p-p

OUT

G = +5

02464-020

1

50Ω

R

8

4
5

G

G

1
2
5

10

Figure 22. AD8130 Basic Frequency Respo

R

R

F

0Ω

499Ω

8.06kΩ

4.99kΩ

TEK P6245
FET PROBE

6

R

C

L

L

F

R

G

–

499Ω

2kΩ

549Ω

02464-023

nse Test Circuit

Rev. C | Page 12 of 40

AD8129/AD8130

www.BDTIC.com/ADI

AD8129 FREQUENCY RESPONSE CHARACTERISTICS

G = +10, RL = 1 kΩ, CL = 2 pF, V

3

V

= 0.3V p-p

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5
–6

–7

1 30010 100

Figure 23. AD8129 Frequency Response vs. Supply, V

3

V

= 1V p-p

OUT

2

1

0

–1
–2

GAIN (dB)

–3
–4

–5

–6
–7

1 30010 100

Figure 24. AD8129 Frequency Response vs. Supply, V

3

V

= 2V p-p

OUT

2

1
0

–1

–2

GAIN (dB)

–3

–4
–5
–6

–7

1

Figure 25. AD8129 Frequency Response vs. Supply, V

FREQUENCY (MHz)

FREQUENCY (MHz)

FREQUENCY (MHz)

= 0.3 V p-p, TA = 25°C, unless otherwise noted.

OUT

VS = ±2.5V

VS = ±12V

VS = ±5V

02464-024

= 0.3 V p-p

OUT

VS = ±5V

VS = ±2.5V

VS = ±12V

02464-025

= 1 V p-p

OUT

VS = ±2.5V

VS = ±5V

VS = ±12V

10 100 300

02464-026

= 2 V p-p

OUT

4

VS =±5V

3

2

1

0

–1

GAIN (dB)

–2
–3

–4
–5

–6

1

FREQUENCY (MHz)

CL = 20pF

CL = 10pF

CL = 5pF

CL = 2pF

10 100 300

Figure 26. AD8129 Frequency Response vs. Load Capacitance

0.5
RL = 1kΩ

0.4

0.3

0.2

0.1

0

GAIN (dB)

–0.1

–0.2

–0.3

–0.4

–0.5

1 30010 100

Figure 27. AD8129 Fine Scale Response vs. Supply, R

VS = ±2.5V

VS = ±5V

VS = ±12V

FREQUENCY (MHz)

= 1 kΩ

L

0.3

RL = 150Ω

0.2

0.1

0

–0.1

–0.2

GAIN (dB)

–0.3

–0.4

–0.5

–0.6

–0.7

1

Figure 28. AD8129 Fine Scale Response vs. Supply, R

VS = ±2.5V

VS = ±5V

VS = ±12V

FREQUENCY (MHz)

= 150 Ω

L

02464-027

02464-028

02464-029

30010 100

Rev. C | Page 13 of 40

AD8129/AD8130

www.BDTIC.com/ADI

3

RL = 150Ω

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

VS = ±2.5V

VS = ±5V

VS = ±12V

FREQUENCY (MHz)

Figure 29. AD8129 Frequency Response vs. Supply, R

3

G = +20

= 0.3V p-p

V

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

10

FREQUENCY (MHz)

VS = ±5V, ±12V

VS = ±2.5V

Figure 30. AD8129 Frequency Response vs. Supply,

+20, V

= 0.3 V p-p

OUT

G =

3

G = +20
V

= 2V p-p

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

FREQUENCY (MHz)

VS = ±2.5V

10

VS = ±5V, ±12V

Figure 31. AD8129 Frequency Response vs. Supply,

+20, V

= 2 V p-p

OUT

G =

= 150 Ω

L

02464-030

30010010

02464-031

3001001

02464-032

3001001

0.8
G = +10

= ±5V

V

S

0.6

0.4

0.2

–0.2

GAIN (dB)

0.2

–0.2

–0.4

–0.6

SOIC

0

μ

SOIC

0

499Ω/54.9

FREQUENCY (MHz)

909Ω/100

Ω

909Ω/100

2kΩ/221

Ω

499Ω/54.9

Ω

2kΩ/221

Ω

Ω

Ω

Figure 32. AD8129 Fine Scale Response vs. SOIC and MSOP

for Va

rious R

F/RG

0.2
G = +20

R

= 1k

Ω

L

0.1

0

–0.1

–0.2

–0.3

GAIN (dB)

–0.4

–0.5

–0.6

–0.7

–0.8

FREQUENCY (MHz)

VS = ±5V

VS = ±12V

VS = ±2.5V

Figure 33. AD8129 Fine Scale Response vs. Supply

0.3
G = +20

R

= 150

Ω

L

0.2

0.1

0

–0.1

–0.2

GAIN (dB)

–0.3

–0.4

–0.5

–0.6

–0.7

0.1

FREQUENCY (MHz)

VS = ±5V, ±12V

VS = ±2.5V

Figure 34. AD8129 Fine Scale Response vs. Supply

02464-033

300100110

02464-034

30110

02464-035

30110

Rev. C | Page 14 of 40

AD8129/AD8130

www.BDTIC.com/ADI

3

G = +20
R

= 150

Ω

L

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

1 30010 100

FREQUENCY (MHz)

VS = ±5V, ±12V

VS = ±2.5V

Figure 35. AD8129 Frequency Response vs. Supply,

+20, R

= 150 Ω

L

G =

0.2
V

= 2V p-p

OUT

0.1

0

–0.1

–0.2

–0.3

GAIN (dB)

–0.4

–0.5

–0.6

–0.7

–0.8

0.1 1 10

0

1

0

+

G

=

VS = ±2.5V

VS = ±5V

2

1

±

VS=

FREQUENCY (MHz)

V

Figure 36. AD8129 Fine Scale Response vs. Supply,

G

= +50, G = +100, V

= 2 V p-p

OUT

3

V

= 2V p-p

OUT

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

0.1 1 10

FREQUENCY (MHz)

=

G

0

0

1

+

VS = ±2.5V

VS = ±5V

±

2

1

V

V

=

S

Figure 37. AD8129 Frequency Response vs. Supply,

G

= +50, G = +100, V

= 2 V p-p

OUT

VS

02464-036

1

V

2

±

=

5

0

+

=

G

02464-037

0

5

+

=

G

02464-038

50

3

RL = 150

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

–7

0.1 1 10

Ω

0

0

1

G

+

=

VS = ±2.5V

VS = ±5V

V

S

FREQUENCY (MHz)

±

2

1

V

=

0

5

+

G

=

50

Figure 38. AD8129 Frequency Response vs. Supply,

G

= +50, G = +100, R

= 150 Ω

L

12

0dB = 1V rms

6

0

–6

–12

–18

–24

–30

OUTPUT VOLTAGE (dBV)

–36

–42

VS = ±5V

–48

10 100 400

FREQUENCY (MHz)

Figure 39. AD8129 Frequency Response for Various Output Levels

1
8

50Ω

4
5

R

2kΩ
2kΩ
2kΩ
2kΩ

R

F

F

221Ω
105Ω

41.2Ω
20Ω

R

G

G

10
20
50

100

Figure 40. AD8129 Basic Frequency Respo

TEK P6245

FET PROBE

6

RLC

L

R

G

02464-041

nse Test Circuit

02464-039

02464-040

Rev. C | Page 15 of 40

AD8129/AD8130

www.BDTIC.com/ADI

AD8130 HARMONIC DISTORTION CHARACTERISTICS

RL = 1 kΩ, CL = 2 pF, TA = 25°C, unless otherwise noted.

–60

V

= 1V p-p

OUT

–66

= ±12V

V

S

–72

HD2 (dBc)

G = +1

–78

–84

–90

VS = ±12V

G = +2

1

FREQUENCY (MHz)

VS = ±5V

10

Figure 41. AD8130 Second Harmonic Distortion vs. Frequency

40

02464-042

–51

V

= 1V p-p

OUT

–57

–63

–69

–75

HD3 (dBc)

VS = ±12V

–81

–87

–93

–99

G = +1

G = +2

1

VS = ±5V

FREQUENCY (MHz)

G = +1
V

10

= ±12V

S

G = +1
V

= ±5V

S

Figure 44. AD8130 Third Harmonic Distortion vs. Frequency

02464-045

40

–54

V

= 2V p-p

OUT

–60

–66

HD2 (dBc)

–72

–78

VS = ±12V

–84

G = +2

1

VS = ±5V

10

FREQUENCY (MHz)

G = +1

VS = ±5V

G = +1

VS = ±12V

40

Figure 42. AD8130 Second Harmonic Distortion vs. Frequency

–55

f

= 5MHz

C

–61

–67

–73

HD2 (dBc)

–79

–85

–91

0.5

1

V

G = +2

OUT

VS = ±12V

VS = ±5V

G = +1

VS = ±12V

VS = ±5V

10

(V p-p)

Figure 43. AD8130 Second Harmonic Distortion vs. Output Voltage

02464-043

02464-044

–45

V

= 2V p-p

OUT

–51

–57

–63

–69

HD3 (dBc)

–75

–81

–87

–93

VS = ±5V

G = +1

1

VS = ±12V

G = +2

FREQUENCY (MHz)

G = +2, VS = ±12V

G = +2, VS = ±5V

10

40

Figure 45. AD8130 Third Harmonic Distortion vs. Frequency

–46

fC = 5MHz

–52

–58

–64

–70

HD3 (dBc)

–76

–82

–88

–94

0.5

1

VS = ±12V

VS = ±5V

G = +1

VS = ±5V

(V p-p)

V

OUT

G = +2

VS = ±12V

10

Figure 46. AD8130 Third Harmonic Distortion vs. Output Voltage

02464-046

02464-047

Rev. C | Page 16 of 40

AD8129/AD8130

www.BDTIC.com/ADI

–43

VS = ±2.5V

–49

V

10

OUT

G = +1

= 1V p-p

–55

–61

HD2 (dBc)

–67

–73

G = +1

–79

1

V

= 2V p-p

OUT

G = +2

G = +2

FREQUENCY (MHz)

Figure 47. AD8130 Second Harmonic Distortion vs. Frequency

02464-048

40

–46

VS = ±2.5V

f

= 5MHz

C

–52

–58

–64

–70

HD (dBc)

–76

–82

–88

–94

G = +1, HD2

G = +2, HD2

0 0.5 1.0 1.5 2.0 2.5 3.0

V

OUT

G = +1, HD3

G = +2, HD3

(V p-p)

G = +2, HD3

G = +2, HD2

Figure 49. AD8130 Harmonic Distortion vs. Output Voltage

02464-050

–42

VS = ±2.5V

–48

–54

–60

–66

–72

HD3 (dBc)

–78

–84

–90

–96

1

G = +1

V

OUT

G = +2

= 2V p-p

G = +2

V

OUT

FREQUENCY (MHz)

10

= 1V p-p

Figure 48. AD8130 Third Harmonic Distortion vs. Frequency

G = +1

40

02464-049

Rev. C | Page 17 of 40

AD8129/AD8130

www.BDTIC.com/ADI

AD8129 HARMONIC DISTORTION CHARACTERISTICS

RL = 1 kΩ, CL = 2 pF, TA = 25°C, unless otherwise noted.

–51

V

= 1V p-p

OUT

–57

–63

–69

HD2 (dBc)

–75

–81

–87

1

G = +10,
V

= ±5V

S

G = +10,
V

= ±12V

S

FREQUENCY (MHz)

G = +20,
V

= ±12V

S

G = +20,
V

= ±5V

S

10 40

Figure 50. AD8129 Second Harmonic Distortion vs. Frequency

–42

V

= 2V p-p

OUT

–48

–54

–60

G = +20,
VS = ±12V

–66

HD2 (dBc)

–72

–78

–84

1

G = +10,
VS = ±12V

FREQUENCY (MHz)

G = +10

G = +20

G = +10,

G = +20,
VS = ±5V

VS = ±5V

10 40

Figure 51. AD8129 Second Harmonic Distortion vs. Frequency

–50

f

= 5MHz

C

–56

–62

–68

HD2 (dBc)

–74

–80

–86

0.5

G = +10,
V

= ±12V

S

G = +10,
V

= ±5V

S

G = +20,

= ±5V

V

S

G = +20,
V

= ±12V

S

1 10

V

(V p-p)

OUT

Figure 52. AD8129 Second Harmonic Distortion vs. Output Voltage

02464-051

02464-052

02464-053

–54

V

= 1V p-p

OUT

–60

–66

–72

–78

HD3 (dBc)

–84

–90

–96

1 10 40

G = +20,
V

= ±5V

S

FREQUENCY (MHz)

G = +10,

= ±5V

V

S

G = +10,
V

= ±12V

S

G = +20,
V

= ±12V

S

Figure 53. AD8129 Third Harmonic Distortion vs. Frequency

–45

V

= 2V p-p

OUT

–51

–57

–63

–69

HD3 (dBc)

–75

–81

–87

G = +10,
V

= ±12V

S

G = +10,
V

= ±5V

S



1

FREQUENCY (MHz)

G = +10,
V

= ±5V

S

G = +10,
V

= ±12V

S

G = +20,
V

= ±5V

S

G = +20,
V

= ±12V

S

10 40

Figure 54. AD8129 Third Harmonic Distortion vs. Frequency

–48

f

= 5MHz

C

–54

–60

–66

–72

–78

HD3 (dBc)

–84

–90

–96

0.5

11

V

OUT

G = +10,
V

= ±5V

S

(

V p-p)

G = +10,
V

= ±12V

S

G = +20,

= ±12V

V

S

G = +20,

= ±5V

V

S

Figure 55. AD8129 Third Harmonic Distortion vs. Output Voltage

02464-054

02464-055

02464-056

0

Rev. C | Page 18 of 40

AD8129/AD8130

www.BDTIC.com/ADI

–44

VS = ±2.5V

V

= 2V p-p

–50

–56

G = +20

–62

HD2 (dBc)

–68

–74

–80

1

G = +10

FREQUENCY (MHz)

OUT

V

= 1V p-p

OUT

10 40

Figure 56. AD8129 Second Harmonic Distortion vs. Frequency

–42

VS = ±2.5V

–48

–54

–60

G = +20

–66

HD3 (dBc)

–72

–78

–84

–90

1

V

= 2V p-p

OUT

FREQUENCY (MHz)

V

= 1V p-p

OUT

G = +10

10 40

Figure 57. AD8129 Third Harmonic Distortion vs. Frequency

–50

VS = ±2.5V

f

= 5MHz

C

–56

–62

–68

HD (dBc)

–74

–80

–86

0

G = +20

HD3

G = +10

HD2

G = +10

HD3

0.5 1.0 1.5 2.0 2.5 3.0
V

(V p-p)

OUT

G = +20

HD2

Figure 58. AD8129 Harmonic Distortion vs. Output Voltage

02464-057

02464-058

02464-059

–39

G = +1
V

–45

–51

–57

–63

–69

DISTORTION (dBc)

–75

–81

–87

–5 –4 –3 –2 –1 0 1 2

= 2V p-p

OUT

V

= ±5V

S

R

= 1k

Ω

L

fC = 5MHz

HD2

HD3

V

(V)

CM

34

5

Figure 59. AD8130 Harmonic Distortion vs. Common-Mode Voltage

–61

DISTORTION (dBc)

–67

–73

–79

–85

–91

–97

100

G = +1
f

= 5MHz

C

VS = ±5V

(Ω)

R

L

HD3

V

OUT

HD2

VS = ±5V, ±12V

VS = ±12V

= 1V p-p

HD2

VS = ±2.5V

HD3

HD3

VS = ±2.5V

k

1

Figure 60. AD8130 Harmonic Distortion vs. Load Resistance

–50

DISTORTION (dBc)

–56

–62

–68

–74

–80

–86

100

G = +1
f

= 5MHz

C

HD3

VS = ±2.5V

HD2

VS = ±2.5V

VS = ±5V, ±12V

VS = ±5V, ±12V

(Ω)

R

L

HD3

HD2

V

OUT

= 2V p-p

k

1

Figure 61. AD8130 Harmonic Distortion vs. Load Resistance

02464-060

02464-061

02464-062

Rev. C | Page 19 of 40

AD8129/AD8130

www.BDTIC.com/ADI

–36

G = +10
V

–42

–48

–54

–60

DISTORTION (dBc)

–66

–72

–78

–5 –4 –3 –2 –1 0 1 2 3 4

OUT

V

= ±5V

S

R

= 1kΩ

L

f

= 5MHz

C

= 2V p-p

HD2

HD3

V

(V)

CM

5

Figure 62. AD8129 Harmonic Distortion vs. Common-Mode Voltage

–48

–54

–60

–68

G = +10

f

= 5MHz

C

HD2

V

= 1V p-p

OUT

VS = ±2.5V
VS = ±12V
VS = ±5V

02464-063

V

CM

200Ω

1:2

R

G

MINI-CIRCUITS®:

f

# T4-6T,
# TC4-1W,

≤ 10MHz

C

f

C

> 10MHz

Figure 65. AD8129/AD8130 Basic Distortion Test Circuit,

= 0 V, Unless Otherwise Noted

V

CM

100

Hz)

√

10

R

L

R

L

C

R

F

R

GR

F

1
2

499Ω

1

0

2kΩ

20

2kΩ

G

0Ω

–
499Ω
221Ω
105Ω

L

02464-066

VS = ±12V

VS = ±5V

HD3

R

(Ω)

L

DISTORTION (dBc)

–72

–78

–84

–90

VS = ±2.5V

100

Figure 63. AD8129 Harmonic Distortion vs. Load Resistance

–44

DISTORTION (dBc)

–50

–56

–62

–68

–74

–80

100

G = +10

f

= 5MHz

C

VS = ±2.5V

VS = ±5V

HD3

R

(Ω)

L

VS = ±12V

V

= 2V p-p

OUT

VS = ±2.5V
VS = ±12V
VS = ±5V

Figure 64. AD8129 Harmonic Distortion vs. Load Resistance

k

1

k

1

02464-064

02464-065

1.0

CURRENT NOISE (pA/

0.1

10 100k100 1k 10k 1M 10M

FREQUENCY (Hz)

Figure 66. AD8129/AD8130 Input Current Noise vs. Frequency

100

Hz)

√

AD8130

10

AD8129

CURRENT NOISE (nV/

1

10 100k100 1k 10k 1M 10M

FREQUENCY (Hz)

Figure 67. AD8129/AD8130 Input Voltage Noise vs. Frequency

02464-067

02464-068

Rev. C | Page 20 of 40

AD8129/AD8130

www.BDTIC.com/ADI

–30

–40

–50

–60

–70

–80

–90

–100

COMMON-MODE REJECTION (dB)

–110

–120

10k 100M

VS = ±2.5V

VS = ±5V, ±12V

100k 1M 10M

FREQUENCY (Hz)

Figure 68. AD8130 Common-Mode Rejection vs. Frequency

0

–10

–20

–30

–40

–50

–60

= ±12V

V

S

–70

–80

POWER SUPPLY REJECTION (dB)

–90

–100

1k

10k 100k 1M 10M 100M

VS = ±5V

VS = ±2.5V

FREQUENCY (Hz)

Figure 69. AD8130 Positive Power Supply Rejection vs. Frequency

0

–10

–20

–30

–40

–50

–60

= ±2.5V

V

S

–70

–80

POWER SUPPLY REJECTION (dB)

–90

–100

VS = ±5V

1k

VS = ±12V

10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 70. AD8130 Negative Power Supply Rejection vs. Frequency

02464-069

02464-070

02464-071

–30

–40

–50

–60

–70

–80

–90

–100

COMMON-MODE REJECTION (dB)

–110

–120

10k 100M

VS = ±2.5V

VS = ±5V, ±12V

100k 1M 10M

FREQUENCY (Hz)



Figure 71. AD8139 Common-Mode Rejection vs. Frequency

0

–10

–20

–30

–40

–50

–60

–70

VS = ±12V

–80

POWER SUPPLY REJECTION (dB)

–90

–100

V

= ±2.5V

S

= ±5V

V

S

1k

10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 72. AD8129 Positive Power Supply Rejection vs. Frequency

0

–10

–20

–30

–40

–50

–60

–70

–80

POWER SUPPLY REJECTION (dB)

–90

–100

1k

VS = ±12V

VS = ±5V

VS = ±2.5V

10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 73. AD8129 Negative Power Supply Rejection vs. Frequency

02464-072

02464-073

02464-074

Rev. C | Page 21 of 40

AD8129/AD8130

www.BDTIC.com/ADI

80

70

60

50

40

OPEN-LOOP GAIN (dB)

–10

30

20

10

0

1k

+

–

+
–

100

Ω

V

IN

10k 100k 1M 10M 100M 300M

1k

Ω

1k

FREQUENCY (Hz)

Figure 74. AD8130 Open-Loop G

90

80

70

60

50

40

30

OPEN-LOOP GAIN (dB)

20

100

Ω

10

0

V

IN

1k

10k 100k 1M 10M 100M 300M

1k

Ω

1k

FREQUENCY (Hz)

Figure 75. AD8129 Open-Loop G

180

GAIN

135

90

φ

M

PHASE

= 58°

PHASE MARGIN (Degrees)

45

0

02464-075

V

OUT

2pF

Ω

ain and Phase vs. Frequency

180

GAIN

135

90

V

OUT

2pF

Ω

PHASE

φM= 56°

PHASE MARGIN (Degrees)

45

0

02464-076

ain and Phase vs. Frequency

100

= ±5V

V

S

10

)

Ω

1

100m

OUTPUT IMPEDANCE (

10m

1m

1k

AD8129, G = +10

10k 100k 1M 10M 100M

Figure 76. Closed-Loop Outpu

FREQUENCY (Hz)

AD8130, G = +1

02464-077

t Impedance vs. Frequency

Rev. C | Page 22 of 40

AD8129/AD8130

www.BDTIC.com/ADI

AD8130 TRANSIENT RESPONSE CHARACTERISTICS

G = +1, RL = 1 kΩ, CL = 2 pF, VS = ±5 V, TA = 25°C, unless otherwise noted.

Figure 77. AD8130 Transient Response, V

V

= 1V p-p

OUT

= ±2.5V

V

S

5.00ns250mV

= ±2.5 V, V

S

V

OUT

V

= ±5V

S

= 1 V p-p

OUT

= 1V p-p

02464-078

VS = ±2.5V

VS = ±5V

VS = ±12V

V

OUT

5.00ns50mV

= 0.2V p-p

Figure 80. AD8130 Transient Response vs. Supply, V

V

VS = ±2.5V

VS = ±5V

VS = ±12V

C

OUT

= 5pF

L

= 0.2 V p-p

OUT

= 1V p-p

02464-081

Figure 78. AD8130 Transient Response, V

Figure 79. AD8130 Transient Response, V

5.00ns250mV

= ±5 V, V

S

V

OUT

V

= ±12V

S

5.00ns250mV

= ±12 V, V

S

= 1 V p-p

OUT

= 1V p-p

= 1 V p-p

OUT

02464-079

02464-080

Figure 81. AD8130 Transient Response vs. Supply, V

VS = ±2.5V

VS = ±5V

VS = ±12V

Figure 82. AD8130 Transient Response vs. Supply, V

5.00ns250mV

= 1 V p-p, CL = 5 pF

OUT

V

= 2V p-p

OUT

= 5pF

C

L

5.00ns500mV

= 2 V p-p, CL = 5 pF

OUT

02464-082

02464-083

Rev. C | Page 23 of 40

AD8129/AD8130

www.BDTIC.com/ADI

V

CL = 10pF

CL = 5pF

CL = 2pF

V

OUT

= 0.2 V p-p

OUT

G = +2

= 1V p-p

VS = ±5V, CL = 10pF

VS = ±5V, CL = 2pF

10.00ns50mV

Figure 83. AD8130 Transient Response vs. Load Capacitance,

= 0.2 V p-p

V

OUT

2V p-p

1V p-p

0.5V p-p

5.00ns500mV

Figure 84. AD8130 Transient Response vs. Output Amplitude,

= 0.5 V p-p, 1 V p-p, 2 V p-p

V

OUT

4V p-p

02464-084

02464-085

250mV 5.00ns

Figure 86. AD8130 Transient Response vs. Load Capacitance,

= 1 V p-p, G = +2

V

OUT

V

= 2V p-p

OUT

G = +2

VS = ±12V

500mV

Figure 87. AD8130 Transient Response vs. Supply, V

VS = ±5V

5.00ns

OUT

V

OUT

= 8V p-p

CL = 10pF

G = +2
V

02464-087

02464-088

= 2 V p-p, G = +2

= ±5V

S

2V p-p

CL = 2pF

1V p-p

5.00ns1.00V

Figure 85. AD8130 Transient Response vs. Output Amplitude,

= 1 V p-p, 2 V p-p, 4 V p-p

V

OUT

02464-086

2.00V

Figure 88. AD8130 Transient Response vs. Load Capacitance,

V

Rev. C | Page 24 of 40

= 8 V p-p

OUT

5.00ns

02464-089

AD8129/AD8130

www.BDTIC.com/ADI

G = +5

= ±5V

V

S

= 10pF

C

4V p-p

V

IN

V

OUT

2V p-p

L

1V p-p

1.00V

5.00ns

02464-090

Figure 89. AD8130 Transient Response with +3 V Common-Mode Input

V

OUT

V

IN

1.00V

5.00ns

02464-091

Figure 90. AD8130 Transient Response with −3 V Common-Mode Input

V

OUT

= 10V p-p

G = +2

= ±12V

V

S

1.00V 10.0ns

Figure 92. AD8130 Transient Response vs. Output Amplitude

V

= 8V p-p

OUT

2.00V 10.0ns

Figure 93. AD8130 Transient Response, V

OUT

G = +5
V
C

= 8 V p-p, G = +5, VS = ±5 V

V

OUT

= 20V p-p

G = +5
V
C

= ±5V

S

= 10pF

L

= ±12V

S

= 10pF

L

02464-093

02464-094

2.50V

Figure 91. AD8130 Transient Response, V

5.00ns

= 10 V p-p, G = +2, VS = ±12 V

OUT

02464-092

5.00V

Figure 94. AD8130 Transient Response, V

Rev. C | Page 25 of 40

10.0ns

= 20 V p-p, G = +5, VS = ±12 V

OUT

02464-095

AD8129/AD8130

www.BDTIC.com/ADI

AD8129 TRANSIENT RESPONSE CHARACTERISTICS

G = +10, RF = 2 kΩ, RG = 221 Ω, RL = 1 kΩ, CL = 1 pF, VS = ±5 V, TA = 25°C, unless otherwise noted.

VS = ±2.5V

250mV 5.00ns

Figure 95. AD8129 Transient Response, V

VS = ±5V

V

OUT

= ±2.5 V, V

S

V

OUT

= 1V p-p

OUT

= 1V p-p

02464-096

= 1 V p-p

VS = ±5V

VS = ±2.5V

VS = ±12V

100mV 5.00ns

Figure 98. AD8129 Transient Response vs. Supply, V

V

OUT

= 0.4V p-p

= 0.4 V p-p

OUT

02464-099

V

= 1V p-p

VS = ±5V

VS = ±2.5V

VS = ±12V

C

OUT

= 5pF

L

250mV

Figure 96. AD8129 Transient Response, V

250mV 5.00ns

Figure 97. AD8129 Transient Response, V

5.00ns

= ±5 V, V

S

V

OUT

= ±12 V, V

S

= 1V p-pVS = ±12V

= 1 V p-p

OUT

= 1 V p-p

OUT

02464-097

02464-098

250mV

Figure 99. AD8129 Transient R

esponse vs. Supply, V

VS = ±2.5V

VS = ±5V

VS = ±12V

250mV

Figure 100. AD8129 Transient Response vs. Supply, V

5.00ns

= 1 V p-p, CL = 5 pF

OUT

V

= 2V p-p

OUT

= 5pF

C

L

5.00ns

= 2 V p-p, CL = 5 pF

OUT

02464-100

02464-101

Rev. C | Page 26 of 40

AD8129/AD8130

www.BDTIC.com/ADI

CL = 5pF

CL = 2pF

CL = 10pF

V

OUT

= 0.4V p-p

V

OUT

= 1V p-p

G = +20

= 20pF

C

L

100mV

5.00ns

Figure 101 Transient Response vs. Load Capacitance, V

VO = 2V p-p

VO = 1V p-p

VO = 0.5V p-p

500mV

5.00ns

Figure 102. Transient Response vs. Output Amplitude,

= 0.5 V p-p, 1 V p-p, 2 V p-p

V

OUT

VO = 4V p-p

VO = 2V p-p

VO = 1V p-p

= 0.4 V p-p

OUT

02464-102

02464-103

250mV 5.00ns

Figure 104. AD8129 Transient Response, V

V

= 2V p-p

OUT

500mV

Figure 105. AD8129 Transient Response, V

V

= 8V p-p

OUT

= 1 V p-p, VS = ±2.5 V to ±12 V

OUT

G = +20
C

= 20pF

L

5.00ns

= 2 V p-p, VS = ±5 V

OUT

G = +20
C

= 20pF

L

02464-105

02464-106

1.00V

Figure 103. Transient Response vs. Output Amplitude,

= 1 V p-p, 2 V p-p, 4 V p-p

V

OUT

5.00ns

02464-104

2.00V 5.00ns

Figure 106. AD8129 Transient Response, V

Rev. C | Page 27 of 40

= 8 V p-p, VS = ±5 V

OUT

02464-107

AD8129/AD8130

www.BDTIC.com/ADI

G = +50
V

= ±5V

V

IN

4V p-p

S

C

L

= 20pF

V

OUT

1.00V 5.00ns

Figure 107. AD8129 Transient Response

with +

3.5 V Common-Mode Input

V

OUT

V

IN

02464-108

02464-109

2V p-p

1V p-p

1.00V

12.5ns

02464-111

Figure 110. AD8129 Transient Response vs. Output Amplitude,

= 1 V p-p, 2 V p-p, 4 V p-p

V

OUT

V

OUT

= 8V p-p

2.00V

12.5ns

G = +50
V

= ±5V

S

C

= 20pF

L

02464-112

Figure 108. AD8129 Transient Response

with −

3.5 V Common-Mode Input

V

= 10V p-p

OUT

2.50V 5.00ns

Figure 109. AD8129 Transient Response, V

G = +20
V

= ±12V

S

C

= 20pF

L

= 10 V p-p, G = +20

OUT

02464-110

Figure 111. AD8129 Transient Response, V

V

= 20V p-p

OUT

5.00V

Figure 112. AD8129 Transient Response, V

= 8 V p-p, G = +50, VS = ±5 V

OUT

G = +50
V

= ±12V

S

C

= 10pF

L

12.5ns

= 20 V p-p, G = +50, VS = ±12 V

OUT

02464-113

Rev. C | Page 28 of 40

AD8129/AD8130

www.BDTIC.com/ADI

23

20

17

SUPPLY CURRENT (mA)

14

G = +1
V

= ±5V

S

GAIN NONLINEARITY (0.005%/DIV)

G = +1
V

= ±5V

S

R

= 1kΩ

L

11

–5–4–3–2–1012345

DIFFERENTIAL INPUT (V)

02464-114

Figure 113. AD8130 DC Power Supply Current vs. Differential Input Voltage

37

31

25

SUPPLY CURRENT (mA)

19

13

–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0

DIFFERENTIAL INPUT (V)

G = +1
V

= ±10V

S

02464-115

Figure 114. AD8129 DC Power Supply Current vs. Differential Input Voltage

3.0
AD8130

2.0

1.0

0

–1.0

DIFFERENTIAL INPUT (V)

–2.0

–3.0

–50

V

= 100mV AC @ 1kHz

OUT

AD8129

AD8129

AD8130

–35 –20 –5 10 25 40 55 70 85 100

TEMPERATURE(°C)

02464-116

Figure 115. AD8129/AD8130 Input Differential Voltage Range vs.

Temp

erature, 1% Gain Compression

–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0

Figure 116. AD8130 Gain Nonlinearity, V

OUTPUT VOLTAGE (V)

= 2 V p-p

OUT

02464-117

G = +1
V

= ±5V

S

R

= 1kΩ

L

GAIN NONLINEARITY (0.08%/DIV)

02464-118

–2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5

Figure 117. AD8130 Gain Nonlinearity, V

OUTPUT VOLTAGE (V)

= 5 V p-p

OUT

4

VS = ±5V

3

2

1

(V)

0

OUT

V

–1

–2

–3

–4

–5–4–3–2–1012345

DIFFERENTIAL INPUT (V)

02464-119

Figure 118. AD8130 Differential Input Clipping Level

Rev. C | Page 29 of 40

AD8129/AD8130

www.BDTIC.com/ADI

G = +10
V

= ±5V

S

R

= 1kΩ

L

GAIN NONLINEARITY (0.005%/DIV)

–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0

Figure 119. AD8129 Gain Nonlinearity, V

OUTPUT VOLTAGE (V)

= 2 V p-p

OUT

G = +10
V

= ±12V

S

R

= 1kΩ

L

GAIN NONLINEARITY (0.2%/DIV)

–5 –4 –3 –2 –1 0 1 2 3 4 5

Figure 120. AD8129 Gain Nonlinearity, V

OUTPUT VOLTAGE (V)

= 10 V p-p

OUT

8

VS = ±10V

6

02464-120

02464-121

15

14

13

12

11

SUPPLY CURRENT (mA)

10

9

030

10 15 20 25

5

TOTAL SUPPLY VOLTAGE (V)

02464-123

Figure 122. Quiescent Power Supply Current vs. Total Supply Voltage

17

16

15

14

13

12

11

10

SUPPLY CURRENT (mA)

9

8

7

–50

–35 –20 –5 10 25 40 55 70 85 100

VS = ±12

VS =±5

TEMPERATURE (°C)

VS = ±2.5

115

125

02464-124

Figure 123. Quiescent Power Supply Current vs. Temperature

0.60

40

4

2

0

–2

OUTPUT VOLTAGE (V)

–4

–6

–8

–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0

DIFFERENTIAL INPUT (V)

Figure 121. AD8129 Differential Input Clipping Level

02464-122

0.45

0.30

INPUT BIAS CURRENT (μA)

0.15
–50

–35 –20 –5 10 25 40 55 70 85 100

Figure 124. Input Bias Current and Inp

I

B

I

OS

TEMPERATURE (°C)

Rev. C | Page 30 of 40

30

20

INPUT OFFSET CURRENT (nA)

10

ut Offset Current vs. Temperature

02464-125

AD8129/AD8130

www.BDTIC.com/ADI

4.00

3.75

3.50

3.25

3.00

2.75

2.50

2.25

2.00

1.75

INPUT COMMON MODE (V)

1.50

1.25

1.00
–50–35–20–5102540557085100

V

= 5V

S

AD8129

AD8130

V

= 100mV

OUT

AC AT 1kHz

AD8129

TEMPERATURE (°C)

AD8130

Figure 125. Common-Mode Voltage Range vs. Temperature,

Typi

cal 1% Gain Compression

02464-126

4.0

3.5
SOURCING

3.0

2.0

OUTPUT VOLTAGE (V)

1.5

1.0

SINKING

0

5 10152025303540

OUTPUT CURRENT (mA)

Figure 128. Output Voltage Rang

Typical 1% Gain Compression

+25°C–40°C+100°C

e vs. Output Current,

V

V

= 100mV

OUT

AC AT 1kHz

S

= 5V

02464-129

4.00

INPUT COMMON MODE (V)

3.75

3.50

3.25

3.00

2.75

–3.00

–3.25

–3.50

–3.75

–4.00



VS = ±5V

V

= 100mV

OUT

AC AT 1kHz

AD8129

–35 –20 –5 10 25 40 55 70 85 100

–50

TEMPERATURE (°C)

AD8130

AD8129

AD8130

Figure 126. Common-Mode Voltage Range vs. Temperature,

Typi

cal 1% Gain Compression

11.0

INPUT COMMON MODE (V)

–10.0

–10.5

10.5

10.0

9.5

9.0

8.5

–9.0

–9.5

–11.0

VS = ±12V

–50

–35 –20 –5 10 25 40 55 70 85 100

TEMPERATURE (°C)

V

= 100mV

OUT

AC AT 1kHz

AD8129

AD8129

AD8130

AD8130

Figure 127. Common-Mode Voltage Range vs. Temperature,

cal 1% Gain Compression

Typi

02464-127

02464-128

4.0

3.5

3.0

OUTPUT VOLTAGE (V)

–3.0

–3.5

–4.0

+100°C

0

–40°C

5 101520253035

OUTPUT CURRENT (mA)

Figure 129. Output Voltage Rang

+25°C

e vs. Output Current,

VS = ±5V

V

= 100mV

OUT

AC AT 1kHz

40

02464-130

Typical 1% Gain Compression

11

10

9

–9

OUTPUT VOLTAGE (V)

–10

–11

0

5 10152025303540

OUTPUT CURRENT (mA)

Figure 130. Output Voltage Rang

+25°C–40°C+100°C

e vs. Output Current,

VS = ±12V

02464-131

Typical 1% Gain Compression

Rev. C | Page 31 of 40

AD8129/AD8130

www.BDTIC.com/ADI

THEORY OF OPERATION

The AD8129/AD8130 use an architecture called active feedback,
which differs from that of conventional op amps. The most
obvious differentiating feature is the presence of two separate
pairs of differential inputs compared with a conventional op
amp’s single pair. Typically, for the active feedback architecture,
one of these input pairs is driven by a differential input signal,
while the other is used for the feedback. This active stage in the
feedback path is where the term active feedback is derived.

Therefore, the input dynamic ranges are limited to about

or the AD8130 and 0.5 V for the AD8129 (see the

2.5 V f
AD8129/AD8130 Specifications section for more detail). For

his and other reasons, it is not recommended to reverse the

t
input and feedback stages of the AD8129/AD8130, even though
some apparently normal functionality may be observed under
some conditions. A few simple circuits can illustrate how the
active feedback architecture of the AD8129/AD8130 operates.

The active feedback architecture offers several advantages over a
c

onventional op amp in many types of applications. Among these
are excellent common-mode rejection, wide input common-mode
range, and a pair of inputs that are high impedance and completely
balanced in a typical application. In addition, while an external
feedback network establishes the gain response as in a conventional
op amp, its separate path makes it completely independent of
the signal input. This eliminates any interaction between the
feedback and input circuits, which traditionally causes problems
with CMRR in conventional differential-input op amp circuits.

Another advantage is the ability to change the polarity of the
ga

in merely by switching the differential inputs. A high input­impedance inverting amplifier can be made. Besides a high
input impedance, a unity-gain inverter with the AD8130 has
a noise gain of unity. This produces lower output noise and
higher bandwidth than op amps that have noise gain equal
to 2 for a unity-gain inverter.

The two differential input stages of the AD8129/AD8130 are

ach transconductance stages that are well matched. These stages

e
convert the respective differential input voltages to internal
currents. The currents are then summed and converted to a
voltage, which is buffered to drive the output. The compensation
capacitor is in the summing circuit.

When the feedback path is closed around the part, the output
dr

ives the feedback input to the voltage that causes the internal
currents to sum to 0. This occurs when the two differential
inputs are equal and opposite; that is, their algebraic sum is 0.

In a closed-loop application, a conventional op amp has its
dif

ferential input voltage driven to near 0 under nontransient
conditions. The AD8129/AD8130 generally has differential
input voltages at each of its input pairs, even under equilibrium
conditions. As a practical consideration, it is necessary to limit
the differential input voltage internally with a clamp circuit.

OP AMP CONFIGURATION

If only one of the input stages of the AD8129/AD8130 is used, it
functions very much like a conventional op amp (see Figure 131).

lassical inverting and noninverting op amps circuits can be

C
created, and the basic governing equations are the same as for a
conventional op amp. The unused input pins form the second
input and should be shorted together and tied to ground or a
midsupply voltage when they are not used.

+V

10

μ

0.1

μ

S

6

0.1

μ

F

R

+

+

F

37

PD +V

–V

2

–V

mp: V

OUT

S

= VIN (1 + RF/RG).

1
8

V

Figure 131. With Both Inputs Grounded, the Feedback Stage Functions like

4

IN

5

R

G

NOTES

1. THIS CIRCUIT IS PROVIDED TO DEMONSTRATE
DEVICE OPERATION. IT IS NOT RECOMMENDED
TO USE THIS CIRCUIT IN PLACE OF AN OP AMP.

an Op A

With the unused pair of inputs shorted, there is no differential
voltage between them. This dictates that the differential input
voltage of the used inputs is also 0 for closed-loop applications.
Because this is the governing principle of conventional op amp
circuits, an active feedback amplifier can function as a
conventional op amp under these conditions.

Note that this circuit is presented only for illustration purposes
t

o show the similarities of the active feedback architecture
functionality to conventional op amp functionality. If it is
desired to design a circuit that can be created from a conven­tional op amp, it is recommended to choose a conventional
op amp with specifications that are better suited to that application.
These op amp principles are the basis for offsetting the output,
as described in the

Output Offset/Level Translator section.

F

F

V

OUT

10

μ

F

02464-132

Rev. C | Page 32 of 40

AD8129/AD8130

V

www.BDTIC.com/ADI

APPLICATIONS

BASIC GAIN CIRCUITS

The gain of the AD8129/AD8130 can be set with a pair of
feedback resistors. The basic configuration is shown in Figure 132.

in equation is the same as that of a conventional op amp:

The ga
G = 1 + R

can be set to 0 (short circuit), and RG can be removed (see

R

F

Figure 133). The AD8129 is compensated to operate at gains of
10 a

nd higher; therefore, shorting the feedback path to obtain

unity gain causes oscillation.

The input signal can be applied either differentially or in a
single-ended fashion—all that matters is the magnitude of the
differential signal between the two inputs. For single-ended
input applications, applying the signal to the +IN with −IN
grounded creates a noninverting gain, while reversing these
connections creates an inverting gain. Because the two inputs
are high impedance and matched, both of these conditions
provide the same high input impedance. Thus, an advantage of
the active feedback architecture is the ability to make a high
input impedance inverting op amp. If conventional op amps are
used, a high impedance buffer followed by an inverting stage is
needed. This requires two op amps.

. For unity-gain applications using the AD8130,

F/RG

+V

AD8129/

AD8130

3

7

1

V

IN

Figure 132. Basic Gain Circuit: V

IN

+

8

4

+

5

R

F

R

G

AD8130

1

+

8

4

+

5

Figure 133. An AD8130 with Unity Gain

+V

PD

S

–V

S

2

–V

+V

37

+V

PD

S

–V

S

2

0.1μF

–V

6

0.1

OUT

6

μ

0.1μF

10

μ

0.1

μ

F

= VIN (1 + RF/RG)

10μF

F

F

V

OUT

10

μ

F

μ

F

10

V

OUT

02464-133

02464-134

TWISTED-PAIR CABLE, COMPOSITE VIDEO RECEIVER WITH EQUALIZATION USING AN AD8130

The AD8130 has excellent common-mode rejection at its
inputs. This makes it an ideal candidate for a receiver for signals
that are transmitted over long distances on twisted-pair cables.
Category 5 cables are very common in office settings and are
extensively used for data transmission. These cables can also be
used for the analog transmission of signals such as video.

These long cables pick up noise from the environment they pass
t

hrough. This noise does not favor one conductor over another
and therefore is a common-mode signal. A receiver that rejects
the common-mode signal on the cable can greatly enhance the
signal-to-noise ratio performance of the link.

The AD8130 is also very easy to use as a differential receiver,

ecause the differential inputs and the feedback inputs are

b
entirely separate. This means that there is no interaction
between the feedback network and the termination network,
as there would be in conventional op amp types of receivers.

Another issue with long cables is that there is more attenuation

f the signal at longer distances. Attenuation is also a function

o
of frequency; it increases to roughly the square root of frequency.

For good fidelity of video circuits, the overall frequency

sponse of the transmission channel should be flat vs.

re
frequency. Because the cable attenuates the high frequencies, a
frequency-selective boost circuit can be used to undo this effect.
These circuits are called equalizers.

An equalizer uses frequency-dependent elements (Ls and Cs) to

eate a frequency response that is the opposite of the rest of the

cr
channel’s response to create an overall flat response. There are
many ways to create such circuits, but a common technique is to
put the frequency-selective elements in the feedback path of an
op amp circuit. The AD8130 in particular makes this easier
than other circuits, because, once again, the feedback path is
completely independent of the input path and there is no
interaction.

The circuit in
f

or transmitting composite video over 300 meters of Category 5
cable. This cable has an attenuation of approximately 20 dB at
10 MHz for 300 meters. At 100 MHz, the attenuation is
approximately 60 dB (see

Figure 134 was developed as a receiver/equalizer

Figure 135).

Rev. C | Page 33 of 40

AD8129/AD8130

2

www.BDTIC.com/ADI

AD8130

1

+

Ω

8

4

+

5

R

R

1k

G

499

Ω

100

00pF

V

100

IN

R1

Ω

C1

37

PD

–V

F

Ω

–V

+V

μ

F

10

0.1μF

+V

S

6

S

2

0.1μF

V

OUT

μ

F

10

02464-135

Figure 134. An Equalizer Circuit for Composite Video Transmissions

ov

er 300 Meters of Category-5 Cable

20
10

0

–10

–20
–30

–40

I/O RESPONSE

–50

–60

–70

–80

10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 135. Transmission Response of 300 Meters of Category-5 Cable

The feedback network is between Pin 6 and Pin 5 and from
Pin 5 to ground. C1 and R

create a corner frequency of about

F

800 kHz. The gain increases to provide about 15 dB of boost
at 8 MHz. The response of this circuit is shown in Figure 136.

20
10

0

–10

–20
–30

–40

I/O RESPONSE

–50

–60
–70

–80

10k 100k 1M 10M 100M

Figure 136. Frequency Response of Equalizer Circuit

FREQUENCY (Hz)

02464-136

02464-137

It is difficult to calculate the exact component values via strictly
mathematical means, because the equations for the cable
attenuation are approximate and have functions that are not
simply related to the responses of RC networks. The method
used in this design was to approximate the required response
via graphical means from the frequency response and then
select components that would approximate this response. The
circuit was then built, measured, and finally adjusted to obtain
an acceptable response—in this case, flat to 9 MHz to within
approximately 1 dB (see

20
10

0

–10

–20
–30

–40

I/O RESPONSE

–50

–60
–70

–80

10k 100k 1M 10M 100M

Figure 137. Combined Response of Cable Plus Equalizer

Figure 137).

FREQUENCY (Hz)

02464-138

OUTPUT OFFSET/LEVEL TRANSLATOR

The circuit in Figure 133 has the reference input (Pin 4) tied to
ground, which produces a ground-referenced output signal. If it
is desired to offset the output voltage from ground, the REF
input can be used (see

Figure 138). The level V

the output with unity gain.

+V

V

OFFSET

V

IN

AD8130

1
8

4
5

+

+

37

PD

–V

2

–V

0.1μF

+V

S

V

= VIN+V

OUT

6

S

0.1μF

10μF

Figure 138. The Voltage Applied to Pin 4 to the Unity-Gain Output Voltage

Pr

oduced by V

IN

If the circuit has a gain higher than unity, the gain must be
factored in. If R

is connected to ground, the voltage applied to

G

REF is multiplied by the gain of the circuit and appears at the
output—just like a noninverting conventional op amp. This
situation is not always desirable; the user may want V
appear at the output with unity gain.

OFFSET

10μF

appears at

OFFSET

OFFSET

02464-139

to

Rev. C | Page 34 of 40

AD8129/AD8130

V

www.BDTIC.com/ADI

One way to accomplish this is to drive both REF and RG with
the desired offset signal (see Figure 139). Superposition can be

to solve this circuit. First, break the connection between

used
V

and RG. With RG grounded, the gain from Pin 4 to V

OFFSET

is 1 + R
is −R

F/RG

. With Pin 4 grounded, the gain though RG to V

F/RG

. The sum of these is 1. If V

is delivered from a low

REF

OUT

OUT

impedance source, this works fine. However, if the delivered
offset voltage is derived from a high impedance source, such as
a voltage divider, its impedance affects the gain equation. This
makes the circuit more complicated because it creates an
interaction between the gain and offset voltage.

+V

AD8129/

AD8130

1

+

8

4

+

5

G

R

V

OFFSET

V

IN

R

Figure 139. In this Circuit, V

Circuit Works Well if the V

37

PD

–V

S

2

F

–V

Appears at the Output with Unity Gain. This

OFFSET

0.1

+V

S

6

0.1

μ

F

Source Impedance Is Low.

OFFSET

μ

F

10

μ

F

V

=

OUT

V

× (1 + RF/RG)+V

IN

μ

F

10

OFFSET

A way around this is to apply the offset voltage to a voltage
divider whose attenuation factor matches the gain of the
amplifier and then apply this voltage to the high impedance
REF input. This circuit first divides the desired offset voltage
by the gain, and the amplifier multiplies it back up to unity (see
Figure 140).

+V

AD8129/

V

OFFSET

AD8130

V

IN

R

F

R

G

R

37

1

PD

+

8

4

+

5

G

–V

2

R

F

–V

0.1

+V

S

6

S

0.1

μ

F

μ

10

μ

F

V

=

OUT

V

× (1 + RF/RG)+V

IN

μ

F

10

F

OFFSET

Figure 140. Adding an Attenuator at the Offset Input Causes It to Appear at

the Output wi

th Unity Gain.

RESISTORLESS GAIN OF 2

The voltage applied to the REF input (Pin 4) can also be a high
bandwidth signal. If a unity-gain AD8130 has both +IN and
REF driven with the same signal, there is unity gain from V
and unity gain from V

. Thus, the circuit has a gain of 2 and

REF

requires no resistors (see Figure 141).

IN

02464-140

02464-141

+V

AD8130

0.1

μ

F10μF

6

V

OUT

μ

F

10

0.1

μ

F

ons with No Resistors

02464-142

+

+

37

+V

PD

S

–V

S

2

–V

IN

1
8

4
5

Figure 141. Gain-of-2 Connecti

SUMMER

A general summing circuit can be made by the previous
technique. A unity-gain configured AD8130 has one signal
applied to +IN, while the other signal is applied to REF. The
output is the sum of the two input signals (see Figure 142).

+V

AD8130

V1

V2

+

+

37

+V

PD

–V

S

2

–V

1
8

4
5

μ

F10μF

0.1

S

V

OUT

10

= V1 + V2

μ

F

02464-143

6

0.1μF

Figure 142. A Summing Circuit that is Noninverting

with

High Input Impedance

This circuit offers several advantages over a conventional op
amp inverting summing circuit. First, the inputs are both high
impedance and the circuit is noninverting. It would require
significant additional circuitry to make an op amp summing
circuit that has high input impedance and is noninverting.

Another advantage is that the AD8130 circuit still preserves the

ndwidth of the part. In a conventional summing circuit,

full ba
the noise gain is increased for each additional input, so the
bandwidth response decreases accordingly. By this technique,
four signals can be summed by applying them to two AD8130s
and then summing the two outputs by a third AD8130.

CABLE-TAP AMPLIFIER

It is often desirable to have a video signal drive several pieces of
equipment. However, the cable should only be terminated once at
its endpoint; therefore, it is not appropriate to have a termination
at each device. A loop-through connection allows a device to tap
the video signal while not disturbing it by any excessive loading.

Rev. C | Page 35 of 40

AD8129/AD8130

V

V

www.BDTIC.com/ADI

Such a connection, also referred to as a cable-tap amplifier, can
be simply made with an AD8130 (see Figure 143). The circuit is

nfigured with unity gain, and if no output offset is desired,

co
the REF pin is grounded. The negative differential input is
connected directly to the shield of the cable (or an associated
connector) at the point at which it wants to be tapped.

+V

AD8130

VIDEO

IN

75Ω

75Ω

+

+

37

PD

–V

S

2

–V

1
8

4
5

0.1

μ

F10μF

+V

S

6

V

OUT

μ

F

10

0.1

μ

F

02464-144

Figure 143. The AD8130 Can Tap the Video Signal at Any Point Along the

Ca

ble Without Loading the Signal.

The center conductor connects to the positive differential input
of the AD8130. The amplitude of the video signal at this point is
unity, because it is between the two termination resistors. The
AD8130 provides a high impedance to this signal so that the
signal is not disturbed. A buffered unity-gain version of the
video signal appears at the output.

POWER-DOWN

The AD8129/AD8130 have a power-down pin that can be used
to lower the quiescent current when the amplifier is not being
used. A logic low level on the
down. Because there is no ground pin on the AD8129/AD8130,
there is no logic reference to interface to standard logic levels.
For this reason, the reference level for the
the AD8129/AD8130 are run with V
compatibility with logic families. However, if V
this, a level-shift circuit is needed to interface to conventional
logic levels. A simple level-shifting circuit that is compatible
with common logic families is presented in Figure 144.

PD

pin causes the part to power

PD

input is VS. If

= 5 V, there is direct

S

is higher than

S

+V

S

EXTREME OPERATING CONDITIONS

The AD8129/AD8130 are designed to provide high
performance over a wide range of supply voltages. However,
there are some extremes of operating conditions that have
been observed to produce suboptimal results. One of these
conditions occurs when the AD8130 is operated at unity gain
with low supply voltage—less than approximately ±4 V.

At unity gain, the output drives FB directly. With supplies of
±V

less than approximately ±4 V at unity gain, the output can

S

drive FB’s voltage too close to the rail for the circuit to stay
properly biased. This can lead to a parasitic oscillation.

A way to prevent this is to limit the input signal swing with

mp diodes. Common silicon-junction signal diodes like the

cla
1N4148 have a forward bias of approximately 0.7 V when about
1 mA of current flows through them. Two series pairs of such
diodes connected antiparallel across the differential inputs can
be used to clamp the input signal and prevent this condition. It
should be noted that the REF input can also shift the output
signal; therefore, this technique only works when REF is at
ground or close to it (see

IN

1N4148

IN

Figure 145. Clamping Diodes at the Input Limits the Input Swing Amplitude

Figure 145).

AD8130

1
8

4
5

+V

μ

F10μF

3

PD

+

+

–V

2

–V

0.1

7

+V

S

6

V

OUT

S

μ

F

10

0.1

μ

F

02464-146

3

PD

AD8129/

AD8130

7

+V

S

02464-145

Is Not Equal to

S

1k

Ω

4.99k

LOW =

POWER-DOWN

Ω

Figure 144. Circuit that Shifts the Log

2N2222
OR EQ

ic Level When V

Approximately 5 V.

Rev. C | Page 36 of 40

AD8129/AD8130

www.BDTIC.com/ADI

Another problem can occur with the AD8129 operating
at a supply voltage of greater than or equal to ±12 V. The
architecture causes the supply current to increase as the input
differential voltage increases. If the AD8129 differential inputs
are overdriven too far, excessive current can flow into the device
and potentially cause permanent damage.

A practical means to prevent this from occurring is to clamp the

puts differentially with a pair of antiparallel Schottky diodes

in
(see Figure 146). These diodes have a lower forward voltage of
a

pproximately 0.4 V. If the differential voltage across the inputs
is restricted to these conditions, no excess current is drawn by
the AD8129 under these operating conditions.

If the supply voltage is restricted to less than ±11 V, the internal
cla

mping circuit limits the differential voltage and excessive
supply current is not drawn. The external clamp circuit is not
needed.

+V

AD8129

μ

F10μF

V

IN

AGILENT

HSMS 2822

V

IN

3

1

2

Figure 146. Schottky Diodes Across the Inputs

Li

mits the Input Differential Voltage

1

4
5

3

PD

+

8

+

–V

2

–V

0.1

7

+V

S

6

V

OUT

S

μ

F

10

0.1μF

02464-147

In both circuits, the input series resistors function to limit the
current through the diodes when they are forward biased. As a
practical matter, these resistors must be matched so that the
CMRR is preserved at high frequencies. These resistors have
minimal effect on the CMRR at low frequency.

POWER DISSIPATION

The AD8129/AD8130 can operate with supply voltages from
+5 V to ±12 V. The major reason for such a wide supply range is
to provide a wide input common-mode range for systems that
can require this. This would be encountered when significant
common-mode noise couples into the input path. For applications
that do not require a wide dynamic range for the input or output, it
is recommended to operate with lower supply voltages.

The power dissipation is a function of several operating
co

nditions, including the supply voltage, the input differential

voltage, the output load, and the signal frequency.

A basic starting point is to calculate the quiescent power

pation with no signal and no differential input voltage.

dissi
This is just the product of the total supply voltage and the
quiescent operating current. The maximum operating supply
voltage is 26.4 V, and the quiescent current is 13 mA. This
causes a quiescent power dissipation of 343 mW. For the
MSOP package, the θ

specification is 142°C/W. Therefore,

JA

the quiescent power causes about a 49°C rise above ambient
in the MSOP package.

The current consumption is also a function of the differential
in

put voltage (see Figure 113 and Figure 114). This current

ould be added onto the quiescent current and then multiplied

sh
by the total supply voltage to calculate the power.

The AD8129/AD8130 can directly drive loads of as low as
100 Ω, s

uch as a terminated 50 Ω cable. The worst-case power
dissipation in the output stage occurs when the output is at
midsupply. As an example, for a 12 V supply with the output
driving a 250 Ω load to ground, the maximum power dissipation
in the output occurs when the output voltage is 6 V. The load
current is 6 V/250 Ω = 24 mA. This same current flows through
the output across a 6 V drop from V

. It dissipates 144 mW. For

S

the 8-lead MSOP package, this causes a temperature rise of
20°C above ambient. Although this is a worst-case number, it is
apparent that this can be a considerable additional amount of
power dissipation.

Several changes can be made to alleviate this. One is to use the

tandard 8-lead SOIC package. This lowers the thermal impedance

s
to 121°C/W, which is a 15% improvement. Another is to use a
lower supply voltage unless absolutely necessary.

Finally, do not use the AD8129/AD8130 when it is operating on

h supply voltages to directly drive a heavy load. It is best to

hig
use a second op amp after the output stage. Some of the gain
can be shifted to this stage so that the signal swing at the output
of the AD8129/AD8130 is not too large.

The AD8129/AD8130 is also available in a very small 8-lead

P package. This package has higher thermal impedance

MSO
than larger packages and operates at a higher temperature with
the same amount of power dissipation. Certain operating
conditions that are within the specifications range of the parts can
cause excess power dissipation. Caution should be exercised.

Rev. C | Page 37 of 40

AD8129/AD8130

www.BDTIC.com/ADI

LAYOUT, GROUNDING, AND BYPASSING

The AD8129/AD8130 are very high speed parts that can be
sensitive to the PCB environment in which they operate.
Realizing their superior specifications requires attention to
various details of standard high speed PCB design practice.

The first requirement is for a good solid ground plane that
co

vers as much of the board area around the AD8129/AD8130
as possible. The only exception to this is that the ground plane
around the FB pin should be kept a few millimeters away, and
the ground should be removed from the inner layers and the
opposite side of the board under this pin. This minimizes the
stray capacitance on this node and helps preserve the gain
flatness vs. frequency.

The power supply pins should be bypassed as close as possible
to

the device to the nearby ground plane. Good high frequency
ceramic chip capacitors should be used, and the bypassing
should be done with a capacitance value of 0.01 μF to 0.1 μF for
each supply. Farther away, low frequency bypassing should be
provided with 10 μF tantalum capacitors from each supply to
ground.

The signal routing should be short and direct to avoid parasitic

fects. Where possible, signals should be run over ground

ef
planes to avoid radiating or to avoid being susceptible to other
radiation sources.

Rev. C | Page 38 of 40

AD8129/AD8130

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

85

6.20 (0.2440)

5.80 (0.2284)

41

1.27 (0.0500)
BSC

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

0.25 (0.0098)

0.17 (0.0067)

Figure 147. 8-Lead Standard Small Outline Package [SOIC]

Nar

row Body

0.50 (0.0196)

0.25 (0.0099)

8°

1.27 (0.0500)

0°

0.40 (0.0157)

× 45°

(R-8)

Dimensions shown in millimeters and (inches)

3.20

3.00

2.80

8

5

4

SEATING
PLANE

5.15

4.90

4.65

1.10 MAX

0.23

0.08

8°
0°

0.80

0.60

0.40

3.20

3.00

2.80

PIN 1

0.95

0.85

0.75

0.15

0.00
COPLANARITY

1

0.65 BSC

0.38

0.22

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 148. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dim

ensions shown in millimeters

Rev. C | Page 39 of 40

AD8129/AD8130

www.BDTIC.com/ADI

ORDERING GUIDE

Model Temperature Range

AD8129AR −40°C to +85°C 8-Lead SOIC R-8
AD8129AR-REEL −40°C to +85°C 8-Lead SOIC, 13" Tape and Reel R-8
AD8129AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7" Tape and Reel R-8
AD8129ARZ
AD8129ARZ-REEL
AD8129ARZ-REEL7

2

2

2

−40°C to +85°C 8-Lead SOIC R-8

−40°C to +85°C 8-Lead SOIC, 13" Tape and Reel R-8

−40°C to +85°C 8-Lead SOIC, 7" Tape and Reel R-8
AD8129ARM −40°C to +85°C 8-Lead MSOP RM-8 HQA
AD8129ARM-REEL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HQA
AD8129ARM-REEL7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HQA
AD8129ARMZ
AD8129ARMZ-REEL
AD8129ARMZ-REEL7

2

2

2

−40°C to +85°C 8-Lead MSOP RM-8 HQA#

−40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HQA#

−40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HQA#
AD8130AR −40°C to +85°C 8-Lead SOIC R-8
AD8130AR-REEL −40°C to +85°C 8-Lead SOIC, 13" Tape and Reel R-8
AD8130AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7" Tape and Reel R-8
AD8130ARZ
AD8130ARZ-REEL
AD8130ARZ-REEL7

2

2

2

−40°C to +85°C 8-Lead SOIC R-8

−40°C to +85°C 8-Lead SOIC, 13" Tape and Reel R-8

−40°C to +85°C 8-Lead SOIC, 7" Tape and Reel R-8
AD8130ARM −40°C to +85°C 8-Lead MSOP RM-8 HPA
AD8130ARM-REEL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HPA
AD8130ARM-REEL7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HPA
AD8130ARMZ2 −40°C to +85°C 8-Lead MSOP RM-8 HPA#
AD8130ARMZ-REEL
AD8130ARMZ-REEL7

1

Operating temperature range for ±5 V or +5 V operation is −40°C to +125°C.

2

Z = Pb-free part; # indicates lead-free, may be top or bottom marked.

2

2

−40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HPA#

−40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HPA#

1

Package Description Package Option Branding

© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02464–0–11/05(C)

Rev. C | Page 40 of 40