Datasheet AD812AR, AD812AN, AD812AR-REEL7, AD812AR-REEL Datasheet (Analog Devices)

Dual, Current Feedback

OUT1

–IN1

+IN1

V+
OUT2
–IN2

+IN2

V–

AD812

+

+

4

3

2

1

5

6

7

8

a

FEATURES
Two Video Amplifiers in One 8-Lead SOIC Package
Optimized for Driving Cables in Video Systems
Excellent Video Specifications (R

Gain Flatness 0.1 dB to 40 MHz

0.02% Differential Gain Error

0.02ⴗ Differential Phase Error

Low Power

Operates on Single +3 V Supply

5.5 mA/Amplifier Max Power Supply Current

High Speed

145 MHz Unity Gain Bandwidth (3 dB)
1600 V/␮s Slew Rate

Easy to Use

50 mA Output Current
Output Swing to 1 V of Rails (150 ⍀ Load)

APPLICATIONS
Video Line Driver
Professional Cameras
Video Switchers
Special Effects

PRODUCT DESCRIPTION

The AD812 is a low power, single supply, dual video amplifier.
Each of the amplifiers have 50 mA of output current and are

optimized for driving one back-terminated video load (150 Ω)

each. Each amplifier is a current feedback amplifier and fea­tures gain flatness of 0.1 dB to 40 MHz while offering differen-

tial gain and phase error of 0.02% and 0.02°. This makes the

AD812 ideal for professional video electronics such as cameras
and video switchers.

= 150 ⍀):

L

Low Power Op Amp

AD812

PIN CONFIGURATION

8-Lead Plastic

Mini-DIP and SOIC

The AD812 offers low power of 4.0 mA per amplifier max (VS =
+5 V) and can run on a single +3 V power supply. The outputs
of each amplifier swing to within one volt of either supply rail to
easily accommodate video signals of 1 V p-p. Also, at gains of
+2 the AD812 can swing 3 V p-p on a single +5 V power sup­ply. All this is offered in a small 8-lead plastic DIP or 8-lead
SOIC package. These features make this dual amplifier ideal
for portable and battery powered applications where size and
power is critical.

The outstanding bandwidth of 145 MHz along with 1600 V/µs

of slew rate make the AD812 useful in many general purpose
high speed applications where a single +5 V or dual power sup-

plies up to ±15 V are available. The AD812 is available in the
industrial temperature range of –40°C to +85°C.

0.4

VS = 615V

65V

5V
3V

G = +2
R

= 150V

L

0.3

0.2

0.1

0
–0.1

–0.2

–0.3

NORMALIZED GAIN – dB

–0.4

–0.5
–0.6

100k

1M 100M10M

FREQUENCY – Hz

Figure 1. Fine-Scale Gain Flatness vs. Frequency, Gain

= 150

= +2, R

L

Ω

DIFFERENTIAL GAIN

0.08

0.06

0.04

0.02

DIFFERENTIAL PHASE – Degrees

0

6

5

DIFFERENTIAL PHASE

SUPPLY VOLTAGE – 6Volts

Figure 2. Differential Gain and Phase vs. Supply Voltage,

= 150

Gain = +2, R

L

Ω

0.06

0.04

0.02

DIFFERENTIAL GAIN – %

15

14121110 13987

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

AD812–SPECIFICATIONS

Dual Supply

(@ TA = +25ⴗC, RL = 150 ⍀, unless otherwise noted)

Model AD812A

Conditions V

S

Min Typ Max Units

DYNAMIC PERFORMANCE

–3 dB Bandwidth G = +2, No Peaking ±5 V 50 65 MHz

±15 V 75 100 MHz

Gain = +1 ±15 V 100 145 MHz

Bandwidth for 0.1 dB Flatness G = +2 ±5 V 20 30 MHz

±15 V 25 40 MHz

Slew Rate

1

G = +2, R

= 1 kΩ±5 V 275 425 V/µs

L

20 V Step ±15 V 1400 1600 V/µs

G = –1, R

= 1 kΩ±5 V 250 V/µs

L

±15 V 600 V/µs

Settling Time to 0.1% G = –1, R

V

= 3 V Step ±5 V 50 ns

O

V

= 10 V Step ±15 V 40 ns

O

= 1 kΩ

L

NOISE/HARMONIC PERFORMANCE

Total Harmonic Distortion fC = 1 MHz, R
Input Voltage Noise f = 10

kHz ±5 V, ±15 V 3.5 nV/√Hz

= 1 kΩ±15 V –90 dBc

L

Input Current Noise f = 10 kHz, +In ±5 V, ±15 V 1.5 pA/√

f = 10 kHz, –In ±5 V, ±15 V 18 pA/√

Differential Gain Error NTSC, G = +2, R

= 150 Ω±5 V 0.05 0.1 %

L

±15 V 0.02 0.06 %

Differential Phase Error ±5 V 0.07 0.15 Degrees

±15 V 0.02 0.06 Degrees

Hz
Hz

DC PERFORMANCE

Input Offset Voltage ±5 V, ±15 V 2 5 mV

T

MIN–TMAX

12 mV

Offset Drift ±5 V, ±15 V 15 µV/°C
–Input Bias Current ±5 V, ±15 V 7 25 µA

T

MIN–TMAX

38 µA

+Input Bias Current ±5 V, ±15 V 0.3 1.5 µA

Open-Loop Voltage Gain V

Open-Loop Transresistance V

T

MIN–TMAX

= ±2.5 V, RL = 150 Ω±5 V 68 76 dB

O

T

MIN–TMAX

V

= ±10 V, RL = 1 kΩ±15 V 76 82 dB

O

T

MIN–TMAX

= ±2.5 V, RL = 150 Ω±5 V 350 550 kΩ

O

T

MIN–TMAX

= ±10 V, RL = 1 kΩ±15 V 450 800 kΩ

V

O

T

MIN–TMAX

69 dB

75 dB

270 kΩ
370 kΩ

2.0 µA

INPUT CHARACTERISTICS

Input Resistance +Input ±15 V 15 MΩ

–Input 65 Ω

Input Capacitance +Input 1.7 pF

Input Common Mode ±5 V 4.0 ±V
Voltage Range ±15 V 13.5 ±V

Common-Mode Rejection Ratio

Input Offset Voltage V

= ±2.5 V ±5 V 51 58 dB

CM

–Input Current 23.0µA/V
+Input Current 0.07 0.15 µA/V

Input Offset Voltage V

= ±12 V ±15 V 55 60 dB

CM

–Input Current 1.5 3.3 µA/V
+Input Current 0.05 0.15 µA/V

–2–

REV. B

Model AD812A

Conditions V

S

Min Typ Max Units

OUTPUT CHARACTERISTICS

Output Voltage Swing R

= 150 Ω, T

L

= 1 kΩ, T

R

L

MIN –TMAX

MIN –TMAX

±5 V 3.5 3.8 ±V
±15 V 13.6 14.0 ±V

Output Current ±5 V 30 40 mA

±15 V 40 50 mA

Short Circuit Current G = +2, R

= 2 V

V

IN

= 715 Ω±15 V 100 mA

F

Output Resistance Open-Loop ±15 V 15 Ω

MATCHING CHARACTERISTICS

Dynamic

Crosstalk G = +2, f = 5 MHz ±5 V, ±15 V –75 dB
Gain Flatness Match G = +2, f = 40 MHz ±15 V 0.1 dB

DC

Input offset Voltage T
–Input Bias Current T

MIN –TMAX

MIN –TMAX

±5 V, ±15 V 0.5 3.6 mV
±5 V, ±15 V 2 25 µA

POWER SUPPLY

Operating Range ±1.2 ±18 V
Quiescent Current Per Amplifier ±5 V 3.5 4.0 mA

±15 V 4.5 5.5 mA

T

MIN –TMAX

±15 V 6.0 mA

Power Supply Rejection Ratio

Input Offset Voltage V

= ±1.5 V to ±15 V 70 80 dB

S

–Input Current 0.3 0.6 µA/V
+Input Current 0.005 0.05 µA/V

NOTES

1

Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.

Specifications subject to change without notice.

AD812

Single Supply

(@ TA = +25ⴗC, RL = 150 ⍀, unless otherwise noted)

Model AD812A

Conditions V

S

Min Typ Max Units

DYNAMIC PERFORMANCE

–3 dB Bandwidth G = +2, No Peaking +5 V 35 50 MHz

+3 V 30 40 MHz

Bandwidth for 0.1 dB

Flatness G = +2 +5 V 13 20 MHz

+3 V 10 18 MHz

Slew Rate

1

G = +2, R

= 1 kΩ +5 V 125 V/µs

L

+3 V 60 V/µs

NOISE/HARMONIC PERFORMANCE

Input Voltage Noise f = 10

kHz +5 V, +3 V 3.5 nV/√Hz

Input Current Noise f = 10 kHz, +In +5 V, +3 V 1.5 pA/√Hz

f = 10 kHz, –In +5 V, +3 V 18 pA/√Hz

Differential Gain Error

2

Differential Phase Error

2

NTSC, G = +2, R

= 150 Ω +5 V 0.07 %

L

G = +1 +3 V 0.15 %
G = +2 +5 V 0.06 Degrees
G = +1 +3 V 0.15 Degrees

REV. B

–3–

AD812–SPECIFICATIONS

Single Supply (Continued)

AD812A

Model Conditions V

S

DC PERFORMANCE

Input Offset Voltage +5 V, +3 V 1.5 4.5 mV

T

MIN –TMAX

Offset Drift +5 V, +3 V 7 µV/°C
–Input Bias Current +5 V, +3 V 2 20 µA

T

MIN –TMAX

+Input Bias Current +5 V, +3 V 0.2 1.5 µA

T

MIN –TMAX

Open-Loop Voltage Gain V

Open-Loop Transresistance V

= +2.5 V p-p +5 V 67 73 dB

O

V

= +0.7 V p-p +3 V 70 dB

O

= +2.5 V p-p +5 V 250 400 kΩ

O

V

= +0.7 V p-p +3 V 300 kΩ

O

INPUT CHARACTERISTICS

Input Resistance +Input +5 V 15 MΩ

–Input +5 V 90 Ω

Input Capacitance +Input 2 pF
Input Common Mode +5 V 1.0 4.0 V
Voltage Range +3 V 1.0 2.0 V
Common-Mode Rejection Ratio

Input Offset Voltage V

= 1.25 V to 3.75 V +5 V 52 55 dB

CM

–Input Current 35.5µA/V
+Input Current 0.1 0.2 µA/V

Input Offset Voltage V

= 1 V to 2 V +3 V 52 dB

CM

–Input Current 3.5 µA/V
+Input Current 0.1 µA/V

Min Typ Max Units

7.0 mV

30 µA

2.0 µA

OUTPUT CHARACTERISTICS

Output Voltage Swing p-p R

= 1 kΩ, T

L

= 150 Ω, T

R

L

MIN –TMAX

MIN –TMAX

+5 V 3.0 3.2 V p-p
+5 V 2.8 3.1 V p-p
+3 V 1.0 1.3 V p-p

Output Current +5 V 20 30 mA

+3 V 15 25 mA

Short Circuit Current G = +2, R

= 715 Ω +5 V 40 mA

F

VIN = 1 V

MATCHING CHARACTERISTICS

Dynamic

Crosstalk G = +2, f = 5 MHz +5 V, +3 V –72 dB
Gain Flatness Match G = +2, f = 20 MHz +5 V, +3 V 0.1 dB

DC

Input offset Voltage T
–Input Bias Current T

MIN –TMAX

MIN –TMAX

+5 V, +3 V 0.5 3.5 mV

+5 V, +3 V 2 25 µA

POWER SUPPLY

Operating Range 2.4 36 V
Quiescent Current Per Amplifier +5 V 3.2 4.0 mA

+3 V 3.0 3.5 mA

T

MIN –TMAX

+5 V 4.5 mA

Power Supply Rejection Ratio

Input Offset Voltage VS = +3 V to +30 V 70 80 dB

–Input Current 0.3 0.6 µA/V
+Input Current 0.005 0.05 µA/V

TRANSISTOR COUNT 56

NOTES

1

Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.

2

Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53.

Specifications subject to change without notice.

–4–

REV. B

AD812

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V

Internal Power Dissipation

2

1

Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts

Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts

Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±V

S

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±1.2 V

Output Short Circuit Duration

. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves

Storage Temperature Range N, R . . . . . . . . . –65°C to +125°C

Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C

Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

2

Specification is for device in free air: 8-lead plastic package: θJA = 90°C/Watt;

8-lead SOIC package: θJA = 150°C/Watt.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD812AN –40°C to +85°C 8-Lead Plastic DIP N-8
AD812AR –40°C to +85°C 8-Lead Plastic SOIC SO-8

AD812AR-REEL 13" Reel
AD812AR-REEL7 7" Reel

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
AD812 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for the plastic encap­sulated parts is determined by the glass transition temperature

of the plastic, about 150°C. Exceeding this limit temporarily

may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a

junction temperature of 175°C for an extended period can result

in device failure.

While the AD812 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction tem­perature (150 degrees) is not exceeded under all conditions. To
ensure proper operation, it is important to observe the derating
curves.

It must also be noted that in high (noninverting) gain configura­tions (with low values of gain resistor), a high level of input
overdrive can result in a large input error current, which may
result in a significant power dissipation in the input stage. This
power must be included when computing the junction tempera­ture rise due to total internal power.

2.0

8-LEAD MINI-DIP PACKAGE

1.5

TJ = +1508C

METALIZATION PHOTO

Dimensions shown in inches and (mm).

0.0783

V+

8

OUT2

7

(1.99)

–IN2

6

5 +IN2

1.0

8-LEAD SOIC PACKAGE

0.5

MAXIMUM POWER DISSIPATION – Watts

0

–50 90–40 –30 –20 –10 0 10 20 30 50 60 70 8040

AMBIENT TEMPERATURE – 8C

Figure 3. Plot of Maximum Power Dissipation vs.
Temperature

0.0539
(1.37)

4 V–

1

OUT1

2

–IN13+IN1

4

V–

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD812 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

REV. B

–5–

AD812–Typical Performance Characteristics

20

15

10

5

COMMON-MODE VOLTAGE RANGE – 6Volts

0

020

5

SUPPLY VOLTAGE – 6Volts

10 15

Figure 4. Input Common-Mode Voltage Range vs. Supply
Voltage

20

NO LOAD

15

16

14

VS = 615V

12

10

8

TOTAL SUPPLY CURRENT – mA

6

4

JUNCTION TEMPERATURE – 8C

VS = 65V

140–40–60 120806040 100200–20

Figure 7. Total Supply Current vs. Junction Temperature

10

TA = +25 C

9

8

10

RL = 150V

OUTPUT VOLTAGE – V p-p

5

0

020

5

SUPPLY VOLTAGE – 6Volts

10 15

Figure 5. Output Voltage Swing vs. Supply Voltage

30

615V SUPPLY

25

20

15

10

OUTPUT VOLTAGE – Volts p-p

5

0

10 100 10k1k

LOAD RESISTANCE – V

65V SUPPLY

Figure 6. Output Voltage Swing vs. Load Resistance

7

6

TOTAL SUPPLY CURRENT – mA

5

20

Figure 8. Total Supply Current vs. Supply Voltage

25
20

15

10

5

0

–5

–10

INPUT BIAS CURRENT – mA

–15

–20
–25

–60

Figure 9. Input Bias Current vs. Junction Temperature

SUPPLY VOLTAGE – 6Volts

JUNCTION TEMPERATURE – 8C

864

–IB, VS = 65V

+IB, VS = 65V, 615V

–IB, VS = 615V

16

141210

140–40 120100806040200–20

–6–

REV. B

AD812

4

2

0

–2
–4

–6
–8

–10

–12

INPUT OFFSET VOLTAGE – mV

–14
–16

JUNCTION TEMPERATURE – 8C

VS = 65V

VS = 615V

140–40–60 120100806040200–20

Figure 10. Input Offset Voltage vs. Junction Temperature

160

140

120

100

80

SHORT CIRCUIT CURRENT – mA

60

40

SINK

SOURCE

JUNCTION TEMPERATURE – 8C

VS = 615V

140–40–60 120806040 100200–20

Figure 11. Short Circuit Current vs. Junction Temperature

70

60

50

40

OUTPUT CURRENT – mA

30

20

50

SUPPLY VOLTAGE – 6Volts

1510

20

Figure 13. Linear Output Current vs. Supply Voltage

1k

100

10

1

0.1

CLOSED-LOOP OUTPUT RESISTANCE – V

0.01

G = +2

65V

100k 100M10M1M10k

S

615V

S

FREQUENCY – Hz

Figure 14. Closed-Loop Output Resistance vs. Frequency

80

70

60

50

VS = 65V

40

OUTPUT CURRENT – mA

30

20

JUNCTION TEMPERATURE – 8C

VS = 615V

140–40–60 120806040 100200–20

Figure 12. Linear Output Current vs. Junction Temperature

REV. B

–7–

30

VS = 615V

25

20

RL = 1kV

15

10

VS = 65V

OUTPUT VOLTAGE – V p-p

5

0

100k 1M 100M10M

FREQUENCY – Hz

Figure 15. Large Signal Frequency Response

AD812

100

INVERTING INPUT

CURRENT NOISE

10

VOLTAGE NOISE – nV/ Hz

1

10

100 100k10k1k

VOLTAGE NOISE

NONINVERTING INPUT

FREQUENCY – Hz

CURRENT NOISE

100

10

CURRENT NOISE – pA/ Hz

1

Figure 16. Input Current and Voltage Noise vs. Frequency

90

80

70

60

50

40

30

COMMON-MODE REJECTION – dB

20

10

10k

100k 100M10M1M

FREQUENCY – Hz

V

IN

VS = 3V

681V

681V

681V

681V

VS = 615V

V

OUT

Figure 17. Common-Mode Rejection vs. Frequency

0

120

100

80

TRANSIMPEDANCE – dB

60

40

10k 100k 100M10M1M

GAIN

PHASE

VS = 3V

FREQUENCY – Hz

VS = 615V

VS = 3V

VS = 615V

–45

–90

–135

–180

Figure 19. Open-Loop Transimpedance vs. Frequency

Ω

(Relative to 1

–30

–50

–70

–90

HARMONIC DISTORTION – dBc

–110

–130

1k

)

G = +2

= 2V p-p

V

S

= 615V ; RL = 1kV

V

S

= 65V ; RL = 150V

V

S

VS = 65V

ND

2

HARMONIC

RD

3

HARMONIC

ND

2

RD

3

10k 100k 1M 10M 100M

FREQUENCY – Hz

VS = 615V

Figure 20. Harmonic Distortion vs. Frequency

PHASE – Degrees

80

70

60

50

40

30

20

POWER SUPPLY REJECTION – dB

10

0

10k

615V

61.5V

100k 100M10M1M

FREQUENCY – Hz

Figure 18. Power Supply Rejection vs. Frequency

10

8

6
4
2

0

–2
–4

–6

OUTPUT SWING FROM 6V TO 0

–8

–10

20

1%

0.1%

SETTLING TIME – ns

0.025%

4030 50

Figure 21. Output Swing and Error vs. Settling Time

–8–

GAIN = –1
V

= 615V

S

60

REV. B

1400

0

15.0

600

200

1.5

400

0

1200

800

1000

13.512.010.59.07.56.04.53.0

SUPPLY VOLTAGE – 6Volts

SLEW RATE – V/ms

G = +2

G = +10

G = –1

G = +1

SLEW RATE – V/ms

1400

1200

1000

800

600

400

200

VS = 615V

= 500V

R

L

AD812

G = +1

G = +2

G = +10

G = –1

0

1

0

OUTPUT STEP SIZE – Vp-p

10

98765432

Figure 22. Slew Rate vs. Output Step Size

2V

100

90

10
0%

2V

50ns

V

IN

V

OUT

Figure 23. Large Signal Pulse Response, Gain = +1,

= 750 Ω, RL = 150 Ω, VS = ±5 V)

(R

F

G = +1
R

= 150V

L

VS = 615V

65V

0

–90

5V

3V

–180
–270

1000

1

0
–1

–2

–3
–4

CLOSED-LOOP GAIN – dB

–5
–6

1

PHASE

GAIN

VS = 615V

65V

5V
3V

10 100

FREQUENCY – MHz

Figure 24. Closed-Loop Gain and Phase vs. Frequency,
G = +1

Figure 25. Maximum Slew Rate vs. Supply Voltage

500mV 20ns

100

90

10
0%

500mV

Figure 26. Small Signal Pulse Response, Gain = +1,

= 750 Ω, RL = 150 Ω, VS = ±5 V)

(R

F

200
180

160

140
120

PHASE SHIFT – Degrees

100

80

60

–3dB BANDWIDTH – MHz

40

20

0

0

G = +1
R

= 150V

L

PEAKING 1dB

2

RF = 750V

RF = 866V

PEAKING 0.2dB

SUPPLY VOLTAGE – 6Volts

Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1

V

IN

V

OUT

20

1816141210864

REV. B

–9–

AD812

500mV

100

90

10

0%

5V

50ns

V

IN

V

OUT

Figure 28. Large Signal Pulse Response, Gain = +10,

= 357 Ω, RL = 500 Ω, VS = ±15 V)

(R

F

PHASE

1

GAIN

0

–1

–2
–3
–4

–5

–6

CLOSED-LOOP GAIN (NORMALIZED) – dB

1 10 1000100

5V

3V

5V

3V

FREQUENCY – MHz

VS = 615V

VS = 615V

65V

65V

G = +10
R

= 150V

L

0
–90

–180
–270

PHASE SHIFT – Degrees

Figure 29. Closed-Loop Gain and Phase vs. Frequency,
Gain = +10, R

= 150

L

Ω

50mV

100

90

10
0%

500mV

20ns

V

IN

V

OUT

Figure 31. Small Signal Pulse Response, Gain = +10,
(R

= 357 Ω, RL = 150 Ω, VS = ±5 V)

F

PHASE

1

GAIN

0

–1

–2

–3
–4

–5

–6

CLOSED-LOOP GAIN (NORMALIZED) – dB

1 10 1000100

3V

VS = 615V

5V

5V

3V

FREQUENCY – MHz

G = +10
R

65V

VS = 615V

65V

= 1kV

L

0
–90

–180
–270

–360

PHASE SHIFT – Degrees

Figure 32. Closed-Loop Gain and Phase vs. Frequency,

= 1 k

Gain = +10, R

Ω

L

100

G = +10

90

80

70
60

50

40
30

–3dB BANDWIDTH – MHz

20
10

0

= 150V

R

L

PEAKING 1dB

RF = 154V

216141210864

01820

SUPPLY VOLTAGE – 6Volts

RF = 357V

RF = 649V

Figure 30. –3 dB Bandwidth vs. Supply Voltage,
Gain = +10, R

= 150

L

Ω

110

G = +10

100

90

80
70

60

50
40

–3dB BANDWIDTH – MHz

30

20

10

= 1k

R

L

216141210864

01820

Figure 33. –3 dB Bandwidth vs. Supply Voltage,
Gain = +10, R

–10–

V

RF = 154

V

SUPPLY VOLTAGE – 6Volts

= 1 k

Ω

L

RF = 357

RF = 649

V

V

REV. B

AD812

10

90

100

0%

500mV

20ns

500mV

V

IN

V

OUT

2V

100
90

10
0%

2V

50ns

V

IN

V

OUT

Figure 34. Large Signal Pulse Response, Gain = –1,

= 750 Ω, RL = 150 Ω, VS = ±5 V)

(R

F

PHASE

1

GAIN

0

–1

–2

–3
–4

–5

–6

CLOSED-LOOP GAIN (NORMALIZED) – dB

1 10 1000100

FREQUENCY – MHz

VS = 615V

65V

5V

G = –1

= 150V

R

L

3V

VS = 615V

65V

5V

3V

0

–90

–180
–270

PHASE SHIFT – Degrees

Figure 35. Closed-Loop Gain and Phase vs. Frequency,

= 150

Gain = –1, R

L

Ω

Figure 37. Small Signal Pulse Response, Gain = –1,

= 750 Ω, RL = 150 Ω, VS = ±5 V)

(R

F

PHASE

1

GAIN

0

–1

–2
–3
–4

–5
–6

CLOSED-LOOP GAIN (NORMALIZED) – dB

1 10 1000100

VS = 615V

VS = 615V

5V

3V

65V

5V

3V

FREQUENCY – MHz

65V

G = –10
R

= 1kV

L

0
–90

–180
–270

PHASE SHIFT – Degrees

Figure 38. Closed-Loop Gain and Phase vs. Frequency,

= 1 k

Gain = –10, R

Ω

L

130

G = –1

120

R

= 150V

L

110

100

90

80
70
60

–3dB BANDWIDTH – MHz

50
40

30

0

PEAKING # 1.0dB

2

PEAKING # 0.2dB

SUPPLY VOLTAGE – 6Volts

RF = 681V

RF = 715V

Figure 36. –3 dB Bandwidth vs. Supply Voltage,

= 150

Gain = –1, R

L

Ω

REV. B

100

G = –10

90

R

= 1kV

0

0

L

RF = 154V

2

SUPPLY VOLTAGE – 6Volts

RF = 357V

RF = 649V

20

1816141210864

80

70

60

50

40

30

–3dB BANDWIDTH – MHz

20

10

20

1816141210864

Figure 39. –3 dB Bandwidth vs. Supply Voltage,

= 1 k

Gain = –10, R

Ω

L

–11–

AD812

General Considerations

The AD812 is a wide bandwidth, dual video amplifier which
offers a high level of performance on less than 5.5 mA per am­plifier of quiescent supply current. It is designed to offer out­standing performance at closed-loop inverting or noninverting
gains of one or greater.

Built on a low cost, complementary bipolar process, and achiev­ing bandwidth in excess of 100 MHz, differential gain and phase

errors of better than 0.1% and 0.1° (into 150 Ω), and output

current greater than 40 mA, the AD812 is an exceptionally
efficient video amplifier. Using a conventional current feedback
architecture, its high performance is achieved through careful
attention to design details.

Choice of Feedback and Gain Resistors

Because it is a current feedback amplifier, the closed-loop band­width of the AD812 depends on the value of the feedback resis­tor. The bandwidth also depends on the supply voltage. In
addition, attenuation of the open-loop response when driving

load resistors less than about 250 Ω will affect the bandwidth.

Table I contains data showing typical bandwidths at different
supply voltages for some useful closed-loop gains when driving a

load of 150 Ω. (Bandwidths will be about 20% greater for load

resistances above a few hundred ohms.)

The choice of feedback resistor is not critical unless it is impor­tant to maintain the widest, flattest frequency response. The
resistors recommended in the table are those (metal film values)
that will result in the widest 0.1 dB bandwidth. In those appli­cations where the best control of the bandwidth is desired, 1%
metal film resistors are adequate. Wider bandwidths can be
attained by reducing the magnitude of the feedback resistor (at
the expense of increased peaking), while peaking can be reduced
by increasing the magnitude of the feedback resistor.

Table I. –3 dB Bandwidth vs. Closed-Loop Gain and
Feedback Resistor (R

VS (V) Gain RF (⍀) BW (MHz)

±15 +1 866 145

±5 +1 750 90

+5 +1 750 60

+3 +1 750 50

= 150 Ω)

L

+2 715 100
+10 357 65
–1 715 100
–10 357 60

+2 681 65
+10 154 45
–1 715 70
–10 154 45

+2 681 50
+10 154 35
–1 715 50
–10 154 35

+2 681 40
+10 154 30
–1 715 40
–10 154 25

To estimate the –3 dB bandwidth for closed-loop gains or feed­back resistors not listed in the above table, the following two
pole model for the AD812 many be used:

A

=

CL



RGrC

+

FINT

()

2



S

2

π

f





2

G




S R Gr C

++

FINT

()





1

+

where: ACL= closed-loop gain

G = 1 + R

F/RG

rIN= input resistance of the inverting input
C

= “transcapacitance,” which forms the open-loop

T

dominant pole with the tranresistance
= feedback resistor

R

F

R

= gain resistor

G

= frequency of second (nondominant) pole

f

2

S = 2

πj

f

Appropriate values for the model parameters at different supply
voltages are listed in Table II. Reasonable approximations for
these values at supply voltages not found in the table can be
obtained by a simple linear interpolation between those tabu­lated values which “bracket” the desired condition.

Table II. Two-Pole Model Parameters at Various
Supply Voltages

V

S

±15 85 2.5 150
±5 90 3.8 125

+5 105 4.8 105
+3 115 5.5 95

rIN (⍀)C

(pF) f2 (MHz)

T

As discussed in many amplifier and electronics textbooks (such
as Roberge’s Operational Amplifiers: Theory and Practice), the
–3 dB bandwidth for the 2-pole model can be obtained as:

f

= fN [1 – 2d2 + (2 – 4d2 + 4d4)

3

1/2]1/2

where:




f

=

N




f

2

RGrC

+

()

FINT

12/







and:

d = (1/2) [f

(RF + GrIN) CT]

2

1/2

This model will predict –3 dB bandwidth within about 10 to

15% of the correct value when the load is 150 Ω. However, it is

not an accurate enough to predict either the phase behavior or
the frequency response peaking of the AD812.

Printed Circuit Board Layout Guidelines

As with all wideband amplifiers, printed circuit board parasitics
can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
the output and inverting input nodes. Increasing the space between
signal lines and ground plane will minimize the coupling. Also,
signal lines connecting the feedback and gain resistors should be
kept short enough that their associated inductance does not
cause high frequency gain errors.

–12–

REV. B

AD812

AD812

8

4

R

G

R

F

V

IN

R

T

V

O

R

L

C

L

R

S

+V

S

0.1mF

1.0mF

0.1mF

1.0mF

–V

S

Power Supply Bypassing

Adequate power supply bypassing can be very important when
optimizing the performance of high speed circuits. Inductance
in the supply leads can (for example) contribute to resonant
circuits that produce peaking in the amplifier’s response. In
addition, if large current transients must be delivered to a load,

then large (greater than 1 µF) bypass capacitors are required to

produce the best settling time and lowest distortion. Although

0.1 µF capacitors may be adequate in some applications, more

elaborate bypassing is required in other cases.

When multiple bypass capacitors are connected in parallel, it is
important to be sure that the capacitors themselves do not form

resonant circuits. A small (say 5 Ω) resistor may be required in

series with one of the capacitors to minimize this possibility.

As discussed below, power supply bypassing can have a signifi­cant impact on crosstalk performance.

Achieving Low Crosstalk

Measured crosstalk from the output of amplifier 2 to the input
of amplifier 1 of the AD812 is shown in Figure 40. The crosstalk
from the output of amplifier 1 to the input of amplifier 2 is a few
dB better than this due to the additional distance between criti­cal signal nodes.

A carefully laid-out PC board should be able to achieve the level
of crosstalk shown in the figure. The most significant contribu­tors to difficulty in achieving low crosstalk are inadequate power
supply bypassing, overlapped input and/or output signal paths,
and capacitive coupling between critical nodes.

The bypass capacitors must be connected to the ground plane at
a point close to and between the ground reference points for the
two loads. (The bypass of the negative power supply is particu­larly important in this regard.) There are two amplifiers in the
package, and low impedance signal return paths must be pro-

vided for each load. (Using a parallel combination of 1 µF,

0.1 µF, and 0.01 µF bypass capacitors will help to achieve opti-

mal crosstalk.)

The input and output signal return paths must also be kept from
overlapping. Since ground connections are not of perfectly zero
impedance, current in one ground return path can produce a
voltage drop in another ground return path if they are allowed
to overlap.

Electric field coupling external to (and across) the package can
be reduced by arranging for a narrow strip of ground plane to be
run between the pins (parallel to the pin rows). Doing this on
both sides of the board can reduce the high frequency crosstalk
by about 5 dB or 6 dB.

Driving Capacitive Loads

When used with the appropriate output series resistor, any load
capacitance can be driven without peaking or oscillation. In

most cases, less than 50 Ω is all that is needed to achieve an

extremely flat frequency response. As illustrated in Figure 44,
the AD812 can be very attractive for driving largely capacitive
loads. In this case, the AD812’s high output short circuit

current allows for a 150 V/µs slew rate when driving a 510 pF

capacitor.

Figure 41. Circuit for Driving a Capacitive Load

–10

–20

–30

–40

–50
–60

–70

CROSSTALK – dB

–80
–90

–100

–110

100k

1M 100M10M

FREQUENCY – Hz

Figure 40. Crosstalk vs. Frequency

REV. B

RL = 150V

12

–3

CLOSED-LOOP GAIN – dB

–6

Figure 42. Response to a Small Load Capacitor at ±5 V

–13–

V

= 65V

S

G = +2
R

= 750V

F

= 1kV

R

L

CL = 10pF

9
6

3

0

1

RS = 50V

10 1000100

FREQUENCY – MHz

RS = 0

RS = 30V

AD812

V

= 615V

S

G = +2

= 750V

R

F

= 1kV

R

12

9
6

3
0

–3

CL = 510pF, RS = 15V

–6

CLOSED-LOOP GAIN – dB

–9

1

10 1000100

FREQUENCY – MHz

CL = 150pF, RS = 30V

Figure 43. Response to Large Load Capacitor, VS = ±15 V

L

1V

100

90

10

0%

2V

50ns

V

IN

V

OUT

Figure 45. 6 dB Overload Recovery; G = 10, RL = 500 Ω,

= ±5 V

V

S

5V

100

90

10

0%

5V

100ns

V

IN

V

OUT

Figure 44. Pulse Response of Circuit of Figure 41 with

= 510 pF, RL = 1 kΩ, RF = RG = 715 Ω, RS = 15

C

L

Ω

Overload Recovery

There are three important overload conditions to consider.
They are due to input common mode voltage overdrive, input
current overdrive, and output voltage overdrive. When the
amplifier is configured for low closed-loop gains, and its input
common-mode voltage range is exceeded, the recovery time will
be very fast, typically under 10 ns. When configured for a higher
gain, and overloaded at the output, the recovery time will also
be short. For example, in a gain of +10, with 6 dB of input
overdrive, the recovery time of the AD812 is about 10 ns.

In the case of high gains with very high levels of input overdrive,
a longer recovery time may occur. For example, if the input
common-mode voltage range is exceeded in a gain of +10, the
recovery time will be on the order of 100 ns. This is primarily
due to current overloading of the input stage.

As noted in the warning under “Maximum Power Dissipation,”
a high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. For differ­ential input voltages of less than about 1.25 V, this will be inter­nally limited to less than 20 mA (decreasing with supply voltage).
For input overdrives which result in higher differential input
voltages, power dissipation in the input stage must be consid­ered. It is recommended that external diode clamps be used in
cases where the differential input voltage is expected to exceed

1.25 V.

High Performance Video Line Driver

At a gain of +2, the AD812 makes an excellent driver for a back-

terminated 75 Ω video line. Low differential gain and phase

errors and wide 0.1 dB bandwidth can be realized over a wide
range of power supply voltage. Outstanding gain and group
delay matching are also attainable over the full operating supply
voltage range.

R

G

75V

CABLE

V

IN

75V

+V

S

8

AD812

4

R

F

0.1mF

0.1mF

75V

75V

CABLE

75V

V

OUT

–V

S

Figure 46. Gain of +2 Video Line Driver (RF = RG from
Table I)

–14–

REV. B

AD812

–0.1

–0.6

1M 100M10M

–0.2
–0.3

–0.4

–0.5

0

0.1

NORMALIZED GAIN – dB

100k

FREQUENCY – Hz

0.2

0.3

0.4
G = +2

R

L

= 150V

5V

3V

VS = 615V

65V

1.0

0

–1.0

10 100

–0.2

–0.4
–0.6

–0.8

0.2

0.4

0.6

0.8

GAIN MATCH – dB

1

FREQUENCY – MHz

1000

VS = 3V
R

F

= 681V

G = +2
R

L

= 150V

VS = 615V
R

F

= 715V

PHASE

3V

1

GAIN

0

–1

–2
–3
–4

–5

CLOSED-LOOP GAIN – dB

–6

1 10 1000100

5V

5V

3V

FREQUENCY –MHz

G = +2
R

= 150

L

VS = 615V

65V

VS = 615V

6

5V

90

0

V

–90

–180
–270

PHASE SHIFT – Degrees

Figure 47. Closed-Loop Gain and Phase vs. Frequency for
the Line Driver

120

G = +2

110

R

= 150V

L

100

PEAKING # 1dB

90

80
70

60

50

–3dB BANDWIDTH – MHz

40

30

20

2

0

NO PEAKING

SUPPLY VOLTAGE – 6Volts

RF = 590V

= 715V

R

F

= 750V

R

F

1816141210864

20

Figure 48. –3 dB Bandwidth vs. Supply Voltage,

= 150

Gain = +2, R

L

Ω

Figure 50. Fine-Scale Gain Flatness vs. Frequency,

= 150

Gain = +2, R

L

Ω

Figure 51. Closed-Loop Gain Matching vs. Frequency,
Gain = +2, R

= 150

L

Ω

Figure 49. Differential Gain and Phase vs. Supply Voltage,
Gain = +2, R

REV. B

DIFFERENTIAL GAIN

0.08

0.06
DIFFERENTIAL PHASE

0.04

0.02

DIFFERENTIAL PHASE – Degrees

0

6

5

= 150

L

SUPPLY VOLTAGE – 6Volts

Ω

0.06

0.04

0.02

DIFFERENTIAL GAIN – %

15

14121110 13987

8

6
4

2
0

0.4

0.2

GROUP DELAY – ns

0
–0.2

–0.4

100k

DELAY

DELAY MATCHING

VS = 3V TO 615V

1M 10M

FREQUENCY – Hz

3V
5V

65V

615V

100M

Figure 52. Group Delay and Group Delay Matching vs.
Frequency, G = +2, R

= 150

L

Ω

–15–

AD812

Operation Using a Single Supply

The AD812 will operate with total supply voltages from 36 V
down to 2.4 V. With proper biasing (see Figure 53), it can be an
outstanding single supply video amplifier. Since the input and
output voltage ranges extend to within 1 volt of the supply rails,
it will handle a 1.3 V p-p signal on a single 3.3 V supply, or a
3 V p-p signal on a single 5 V supply. The small signal, 0.1 dB
bandwidths will exceed 10 MHz in either case, and the large
signal bandwidths will exceed 6 MHz.

The capacitively coupled cable driver in Figure 53 will achieve
outstanding differential gain and phase errors of 0.07% and 0.06
degrees respectively on a single 5 V supply. Resistor R2, in this
circuit, is selected to optimize the differential gain and phase by
operating the amplifier in its most linear region. To optimize the

circuit for a 3 V supply, a value of 8 kΩ is recommended for R2.

V

C2

1mF

IN

C3

30mF

2mF

11.8kV

649V

R1

9kV

C1

R2

R3

1kV

AD812

649V

8

4

+V

S

C

OUT

47mF

75V

75V

CABLE

75V

V

OUT

PHASE

0.5
GAIN

0

–0.5

–1.0

–1.5

–2.0

–2.5

CLOSED-LOOP GAIN – dB

–3.0
–3.5

1 10 1000100

FREQUENCY – MHz

VS = 5V

90

0

–90

–180

–270

Figure 54. Closed-Loop Gain and Phase vs. Frequency,
Circuit of Figure 53

100

1V

90

50ns

V

IN

PHASE SHIFT – Degrees

C1859b–0–9/98

Figure 53. Biasing for Single Supply Operation

Dimensions shown in inches and (mm).

8-Lead Plastic DIP

(N-8)

0.39 (9.91)

0.165 60.01

(4.19 60.25)

0.125 (3.18)
MIN

0.018 60.003
(0.46 +0.08)

8

14

PIN 1

0.10

(2.54)

BSC

5

0.25

(6.35)

0.060 (1.52)

0.015 (0.38)

0.033 (0.84)
NOM

SEATING
PLANE

0.325 (8.25)

0.300 (7.62)

0.195 (4.95)

0.115 (2.93)

0.015 (0.381)

0.008 (0.204)

10
0%

Figure 55. Pulse Response of the Circuit of Figure 53 with

= 5 V

V

S

OUTLINE DIMENSIONS

0.1574 (4.00)

0.1497 (3.80)

0.0098 (0.25)

0.0040 (0.10)

SEATING

PLANE

500mV

0.1968 (5.00)

0.1890 (4.80)

85

PIN 1

0.0500
(1.27)

BSC

8-Lead Plastic SOIC

(SO-8)

0.2440 (6.20)

41

0.2284 (5.80)

0.0688 (1.75)

0.0532 (1.35)

0.0192 (0.49)

0.0138 (0.35)

0.0098 (0.25)

0.0075 (0.19)

88
08

0.0196 (0.50)

0.0099 (0.25)

0.0500 (1.27)

0.0160 (0.41)

3 458

V

OUT

PRINTED IN U.S.A.

–16–

REV. B