Datasheet AD811AR-16-REEL7, AD811AR-16-REEL, AD811AR-16, AD811AN, AD811ACHIPS Datasheet (Analog Devices)

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Page 1
High Performance
1 2 3 4
8 7 6 5
AD811
32
12019
18 17 16 15 14
9
10 11
12 13
4 5 6 7 8
AD811
NC NC
+V
S
NC OUTPUT
–V
S
NC
NC NC
NC
–IN
+IN
NC
NC
NC
NC
NC
NC –IN +IN
–V
S
NC
OUTPUT NC
+V
S
NC = NO CONNECT
NC = NO CONNECT
NCNCNC
a
140 MHz Bandwidth (3 dB, G = +1) 120 MHz Bandwidth (3 dB, G = +2) 35 MHz Bandwidth (0.1 dB, G = +2) 2500 V/s Slew Rate 25 ns Settling Time to 0.1% (For a 2 V Step) 65 ns Settling Time to 0.01% (For a 10 V Step)
Excellent Video Performance (R
0.01% Differential Gain, 0.01 Differential Phase
Voltage Noise of 1.9 nVHz
Low Distortion: THD = –74 dB @ 10 MHz Excellent DC Precision
3 mV max Input Offset Voltage
Flexible Operation
Specified for 5 V and 15 V Operation 2.3 V Output Swing into a 75 Load (V
APPLICATIONS Video Crosspoint Switchers, Multimedia Broadcast
Systems HDTV Compatible Systems Video Line Drivers, Distribution Amplifiers ADC/DAC Buffers DC Restoration Circuits Medical—Ultrasound, PET, Gamma and Counter
Applications
PRODUCT DESCRIPTION
The AD811 is a wideband current-feedback operational ampli­fier, optimized for broadcast quality video systems. The –3 dB bandwidth of 120 MHz at a gain of +2 and differential gain and
phase of 0.01% and 0.01° (R
= 150 ) make the AD811 an
L
excellent choice for all video systems. The AD811 is designed to meet a stringent 0.1 dB gain flatness specification to a band­width of 35 MHz (G = +2) in addition to the low differential gain and phase errors. This performance is achieved whether
driving one or two back terminated 75 cables, with a low
power supply current of 16.5 mA. Furthermore, the AD811 is
specified over a power supply range of ±4.5 V to ±18 V.
0.10
0.09
0.08
%
0.07
0.06
0.05
0.04
0.03
DIFFERENTIAL GAIN –
0.02
0.01
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
GAIN
6
5
PHASE
SUPPLY VOLTAGE –
=150 ⍀)
L
RF = 649V
= 3.58MHz
F
C
100 IRE MODULATED RAMP R
= 150V
L
6
Volts
= 5 V)
S
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
DIFFERENTIAL PHASE – Degrees
0.02
15
1413121110987
Video Op Amp
AD811
CONNECTION DIAGRAMS
8-Lead Plastic (N-8)
Cerdip (Q-8)
SOIC (SO-8) Packages
16-Lead SOIC (R-16) Package 20-Lead SOIC (R-20) Package
1
NC NC
2 3
–IN NC
4
+IN
5
NC
6 7
–V
S
AD811
8
NC
NC = NO CONNECT
The AD811 is also excellent for pulsed applications where tran­sient response is critical. It can achieve a maximum slew rate of
greater than 2500 V/µs with a settling time of less than 25 ns to
0.1% on a 2 volt step and 65 ns to 0.01% on a 10 volt step.
The AD811 is ideal as an ADC or DAC buffer in data acquisi­tion systems due to its low distortion up to 10 MHz and its wide unity gain bandwidth. Because the AD811 is a current feedback amplifier, this bandwidth can be maintained over a wide range of gains. The AD811 also offers low voltage and current noise of
1.9 nV/Hz and 20 pA/Hz, respectively, and excellent dc accu-
racy for wide dynamic range applications.
12
G = +2 R
9
R
6
3
GAIN – dB
0
–3
–6
1M
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
20-Lead LCC (E-20A) Package
1
16 15 14 13 12 11 10
9
= 150V
L
= R
G
NC NC +V
S
NC OUTPUT
NC NC NC
FB
NC
2
NC
3
NC
4
–IN
NC
5
+IN
6 7
NC
–V
8
S
9
NC
10
NC
NC = NO CONNECT
VS = 615V
VS = 65V
10M 100M
FREQUENCY – Hz
AD811
20 19 18
17
16 15
14 13 12 11
NC NC NC +V
S
NC OUTPUT NC NC NC
NC
Page 2
AD811–SPECIFICATIONS
(@ TA = +25C and VS = 15 V dc, R
Model Conditions V
S
Min Typ Max Min Typ Max Units
= 150 unless otherwise noted)
LOAD
AD811J/A
1
AD811S
2
DYNAMIC PERFORMANCE
Small Signal Bandwidth (No Peaking)
–3 dB
G = +1 R G = +2 R G = +2 R G = +10 R
0.1 dB Flat G = +2 R
Full Power Bandwidth
3
Slew Rate V
Settling Time to 0.1% 10 V Step, A Settling Time to 0.01% 65 65 ns Settling Time to 0.1% 2 V Step, A Rise Time, Fall Time R Differential Gain f = 3.58 MHz ±15 V 0.01 0.01 %
= 562 Ω±15 V 140 140 MHz
FB
= 649 Ω±15 V 120 120 MHz
FB
= 562 Ω±5 V 80 80 MHz
FB
= 511 Ω±15 V 100 100 MHz
FB
= 562 Ω±5 V 25 25 MHz
FB
= 649 Ω±15 V 35 35 MHz
R
FB
V
= 20 V p-p ±15 V 40 40 MHz
OUT
= 4 V p-p ±5 V 400 400 V/µs
OUT
= 20 V p-p ±15 V 2500 2500 V/µs
V
OUT
= 649, A
FB
= –1 ±15 V 50 50 ns
V
= –1 ±5 V 25 25 ns
V
= +2 ±15 V 3.5 3.5 ns
V
Differential Phase f = 3.58 MHz ±15 V 0.01 0.01 Degree THD @ f Third Order Intercept
= 10 MHz V
C
4
= 2 V p-p, A
OUT
@ f
= 10 MHz ±5 V 36 36 dBm
C
= +2 ± 15 V –74 –74 dBc
V
±15 V 43 43 dBm
INPUT OFFSET VOLTAGE ±5 V, ±15 V 0.5 3 0.5 3 mV
to T
T
MIN
Offset Voltage Drift 55µV/°C
MAX
55mV
INPUT BIAS CURRENT
–Input ±5 V, ±15 V 2 5 2 5 µA
to T
T
MIN
+Input ±5 V, ±15 V 2 10 2 10 µA
T
TRANSRESISTANCE T
MAX
to T
MIN
MAX
to T
MIN
MAX
V
= ±10 V
OUT
= ∞±15 V 0.75 1.5 0.75 1.5 M
R
L
= 200 Ω±15 V 0.5 0.75 0.5 0.75 M
R
L
= ±2.5 V
V
OUT
R
= 150 Ω±5 V 0.25 0.4 0.125 0.4 M
L
15 30 µA 20 25 µA
COMMON-MODE REJECTION
(vs. Common Mode)
V
OS
to T
T
MIN
MAX
to T
T
MIN
Input Current (vs. Common Mode) T
MAX
POWER SUPPLY REJECTION V
V
OS
+Input Current T –Input Current T
V
= ±2.5 ±5 V 56 60 50 60 dB
CM
V
= ±10 V ±15 V 60 66 56 66 dB
CM
to T
MIN
MAX
= ±4.5 V to ±18 V
S
T
to T
MIN
MAX
to T
MIN
MAX
to T
MIN
MAX
60 70 60 70 dB
13 1 3µA/V
0.3 2 0.3 2 µA/V
0.4 2 0.4 2 µA/V INPUT VOLTAGE NOISE f = 1 kHz 1.9 1.9 nV/Hz INPUT CURRENT NOISE f = 1 kHz 20 20 pA/Hz
OUTPUT CHARACTERISTICS
Voltage Swing, Useful Operating Range
5
±5 V ±2.9 ±2.9 V ±15 V ±12 ±12 V
Output Current T Short-Circuit Current 150 150 mA
= +25°C 100 100 mA
J
Output Resistance (Open Loop @ 5 MHz) 9 9
INPUT CHARACTERISTICS
+Input Resistance 1.5 1.5 M –Input Resistance 14 14 Input Capacitance +Input 7.5 7.5 pF Common-Mode Voltage Range ±5 V ±3 ±3V
±15 V ±13 ±13 V
POWER SUPPLY
Operating Range ±4.5 ±18 ±4.5 ±18 V Quiescent Current ±5 V 14.5 16.0 14.5 16.0 mA
±15 V 16.5 18.0 16.5 18.0 mA
TRANSISTOR COUNT # of Transistors 40 40
NOTES
1
The AD811JR is specified with ±5 V power supplies only, with operation up to ±12 volts.
2
See Analog Devices’ military data sheet for 883B tested specifications.
3
FPBW = slew rate/(2 π V
4
Output power level, tested at a closed loop gain of two.
5
Useful operating range is defined as the output voltage at which linearity begins to degrade.
Specifications subject to change without notice.
PEAK
).
–2–
REV. D
Page 3
AD811
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
AD811JR Grade Only . . . . . . . . . . . . . . . . . . . . . . . . .±12 V
Internal Power Dissipation
2
. . . . . . . . Observe Derating Curves
Output Short Circuit Duration . . . . . Observe Derating Curves
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .±6 V
Storage Temperature Range (Q, E) . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD811J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C
AD811A . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD811S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
8-Lead Plastic Package: θJA = 90°C/W
8-Lead Cerdip Package: θJA = 110°C/W 8-Lead SOIC Package: θJA = 155°C/W 16-Lead SOIC Package: θJA = 85°C/W 20-Lead SOIC Package: θJA = 80°C/W 20-Lead LCC Package: θJA = 70°C/W
ORDERING GUIDE
Temperature Package
Model Range Option*
AD811AN –40°C to +85°C N-8 AD811AR-16 –40°C to +85°C R-16 AD811AR-20 –40°C to +85°C R-20 AD811JR 0°C to +70°C SO-8 AD811SQ/883B –55°C to +125°C Q-8 5962-9313101MPA –55°C to +125°C Q-8 AD811SE/883B –55°C to +125°C E-20A 5962-9313101M2A –55°C to +125°C E-20A AD811JR-REEL 0°C to +70°C SO-8 AD811JR-REEL7 0°C to +70°C SO-8 AD811AR-16-REEL –40°C to +85°C R-16 AD811AR-16-REEL7 –40°C to +85°C R-16 AD811AR-20-REEL –40°C to +85°C R-20 AD811ACHIPS –40°C to +85°CDie AD811SCHIPS –55°C to +125°CDie
*E = Ceramic Leadless Chip Carrier; N = Plastic DIP; Q = Cerdip; SO (R) =
Small Outline IC (SOIC).
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD811 is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction tempera-
ture is +145°C. For the cerdip and LCC packages, the maxi­mum junction temperature is +175°C. If these maximums are
exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves in Figures 17 and 18.
While the AD811 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction tem­perature is not exceeded under all conditions. One important example is when the amplifier is driving a reverse terminated
75 cable and the cable’s far end is shorted to a power supply. With power supplies of ±12 volts (or less) at an ambient tem­perature of +25°C or less, if the cable is shorted to a supply rail,
then the amplifier will not be destroyed, even if this condition persists for an extended period.
ESD SUSCEPTIBILITY
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD811 features proprietary ESD pro­tection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic dis­charges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality.
METALIZATION PHOTOGRAPH
Contact Factory for Latest Dimensions.
Dimensions Shown in Inches and (mm).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD811 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. D
–3–
Page 4
AD811–Typical Performance Characteristics
20
TA = +258C
15
10
5
COMMON-MODE VOLTAGE RANGE – 6Volts
0
020
5
SUPPLY VOLTAGE – 6Volts
10
15
Figure 1. Input Common-Mode Voltage Range vs. Supply
35
30
VS = 615V
25
20
15
10
OUTPUT VOLTAGE – Volts p–p
5
VS = 65V
20
TA = +258C
15
10
5
MAGNITUDE OF THE OUTPUT VOLTAGE – 6 Volts
0
020
NO LOAD
= 150V
R
L
5
SUPPLY VOLTAGE – 6 Volts
10
15
Figure 4. Output Voltage Swing vs. Supply
21
18
15
12
9
6
QUIESCENT SUPPLY CURRENT – mA
VS = 615V
VS = 65V
0
10
100 LOAD RESISTANCE – V
1k
10k
Figure 2. Output Voltage Swing vs. Resistive Load
10
NONINVERTING INPUT
65 TO 615V
0
INVERTING
–10
–20
INPUT BIAS CURRENT – mA
–30
–40
–60 140
JUNCTION TEMPERATURE – 8C
INPUT
VS = 615V
VS = 65V
100 120806040200–20
Figure 3. Input Bias Current vs. Junction Temperature
3 –60
–40
200–20
JUNCTION TEMPERATURE – 8C
60
40 100
80
120
140
Figure 5. Quiescent Supply Current vs. Junction Temperature
10
8
6
4 2
0
–2 –4
INPUT OFFSET VOLTAGE – mV
–6
–8
–10
–40
–60
JUNCTION TEMPERATURE – 8C
VS = 65V
VS = 615V
120100806040200–20
140
Figure 6. Input Offset Voltage vs. Junction Temperature
REV. D–4–
Page 5
AD811
200
0
1.6k
120
40
600
80
400
160
1.4k1.2k1.0k
800
VALUE OF FEEDBACK RESISTOR (RFB) – V
–3dB BANDWIDTH – MHz
PEAKING – dB
8
6
4
2
BANDWIDTH
PEAKING
VO = 1V p–p V
S
= 615V
R
L
= 150V
GAIN = +2
10
0
250
200
VS = 615V
150
100
SHORT CIRCUIT CURRENT – mA
50
–60
–40
VS = 65V
JUNCTION TEMPERATURE – 8C
100 120806040200–20
140
Figure 7. Short Circuit Current vs. Junction Temperature
10
VS = 65V
1
2.0
1.5
1.0
0.5
TRANSRESISTANCE – MV
0
–60 140
–40
JUNCTION TEMPERATURE – 8C
VS = 65V R
= 150V
L
= 62.5V
V
OUT
VS = 615V
= 200V
R
L
V
= 610V
OUT
100 120806040200–20
Figure 10. Transresistance vs. Junction Temperature
100
NONINVERTING CURRENT VS = 65 TO 15V
10
INVERTING CURRENT VS = 65 TO 15V
100
10
0.1
CLOSED-LOOP OUTPUT RESISTANCE – V
0.01 10k 100M
100k 10M1M
FREQUENCY – Hz
VS = 615V
GAIN = +2 R
= 649V
FB
Figure 8. Closed-Loop Output Resistance vs. Frequency
10
RISE TIME
8
6
OVERSHOOT
4
RISETIME – ns
2
0 400
Figure 9. Rise Time and Overshoot vs. Value of Feedback Resistor, R
600
800
VALUE OF FEEDBACK RESISTOR (RFB) – V
FB
VS = 615V V R GAIN = +2
= 1V p–p
O
= 150V
L
1.4k1.2k1.0k
60
40
20
OVERSHOOT – %
0
1.6k
NOISE VOLTAGE – nV/ Hz
1
10
100 100k10k1k
VOLTAGE NOISE VS = 615V
VOLTAGE NOISE VS = 65V
FREQUENCY – Hz
NOISE CURRENT – pA/ Hz
1
Figure 11. Input Noise vs. Frequency
Figure 12. 3 dB Bandwidth and Peaking vs. Value of R
FB
REV. D
–5–
Page 6
AD811
110
100
90
80
70
CMRR – dB
60
50
40
30
1k
V
IN
649V
649V
150V
150V
FREQUENCY – Hz
V
OUT
VS = 65V
1M100k10k
VS = 615V
10M
Figure 13. Common-Mode Rejection vs. Frequency
80
70
60
50
40
PSRR – dB
30
20
10
5
1k
VS = 615V
VS = 65V
CURVES ARE FOR WORST CASE CONDITION WHERE ONE SUPPLY IS VARIED WHILE THE OTHER IS HELD CONSTANT.
FREQUENCY – Hz
RF = 649V A
= +2
V
1M100k10k
10M
Figure 14. Power Supply Rejection vs. Frequency
25
20
15
10
OUTPUT VOLTAGE – Volts p–p
5
GAIN = +10 OUTPUT LEVEL FOR 3% THD
0 100k 1M 100M10M
VS = 615V
VS = 65V
FREQUENCY – Hz
Figure 16. Large Signal Frequency Response
–50
V
= 2V p–p
OUT
R
= 100V
L
GAIN = +2
–70
–90
2ND HARMONIC
3RD HARMONIC
–110
HARMONIC DISTORTION – dBc
2ND HARMONIC
–130
1k 10M
10k
65V SUPPLIES
615V SUPPLIES
3RD HARMONIC
100k 1M
FREQUENCY – Hz
Figure 17. Harmonic Distortion vs. Frequency
2.5
16-LEAD SOIC
2.0
1.5
8-LEAD MINI-DIP
1.0
TOTAL POWER DISSIPATION – Watts
0.5 –50 80
–40
8-LEAD SOIC
AMBIENT TEMPERATURE – 8C
TJ MAX = +1458C
20-LEAD SOIC
60 70503020100–10–20–30 40
90
Figure 15. Maximum Power Dissipation vs. Temperature for Plastic Packages
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
8-LEAD CERDIP
1.2
1.0
0.8
TOTAL POWER DISSIPATION – Watts
0.6
0.4 –40
–60
20-LEAD LCC
AMBIENT TEMPERATURE – 8C
TJ MAX = +1758C
100 120806040200–20
Figure 18. Maximum Power Dissipation vs. Temperature for Hermetic Packages
–6–
140
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Typical Characteristics, Noninverting Connection–
R
FB
+V
S
V
TO
OUT
0.1mF
R
G
0.1mF
AD811
+
–V
S
V
IN
HP8130 PULSE GENERATOR
50V
Figure 19. Noninverting Amplifier Connection
TEKTRONIX P6201 FET PROBE
R
L
AD811
9
G = +1 R
= 150V
6
L
R
=
G
3
0
–3
GAIN – dB
–6
–9
–12
1M
FREQUENCY – Hz
Figure 22. Closed-Loop Gain vs. Frequency, Gain = +1
26
VS = 615V R
= 750V
FB
VS = 65V R
= 619V
FB
10M 100M
1V
100
90
V
IN
10
V
OUT
0%
10ns
1V
Figure 20. Small Signal Pulse Response, Gain = +1
100mV
100
90
V
IN
10
V
OUT
0%
10ns
23
20
17
GAIN – dB
14
11
8
1M
G = +10 R = 150V
L
10M 100M
FREQUENCY – Hz
V = 615V
S
R = 511V
FB
V = 65V
S
R = 442V
FB
Figure 23. Closed-Loop Gain vs. Frequency, Gain = +10
1V
100
V
90
IN
10
V
OUT
0%
20ns
1V
Figure 21. Small Signal Pulse Response, Gain = +10
REV. D
10V
Figure 24. Large Signal Pulse Response, Gain = +10
–7–
Page 8
AD811
–Typical Characteristics, Inverting Connection
R
FB
+V
S
V
IN
HP8130 PULSE GENERATOR
0.1mF
R
G
AD811
0.1mF
–V
S
V
TO
OUT
TEKTRONIX P6201 FET PROBE
R
L
Figure 25. Inverting Amplifier Connection
1V
100
90
V
IN
10
V
OUT
0%
10ns
1V
Figure 26. Small Signal Pulse Response, Gain = –1
6
3
0
–3
GAIN – dB
–6
–9
–12
1M
G = –1 R
= 150V
L
10M 100M
FREQUENCY – Hz
VS = 615V R
V = 65V
S
R = 562V
FB
FB
= 590V
Figure 28. Closed-Loop Gain vs. Frequency, Gain = –1
26
23
20
17
GAIN – dB
14
11
8
1M
G = –10 R
= 150V
L
10M 100M
FREQUENCY – Hz
VS = 65V R
= 442V
FB
VS = 615V R
= 511V
FB
Figure 29. Closed-Loop Gain vs. Frequency, Gain = –10
100mV
100
90
V
IN
10
V
OUT
0%
10ns
1V
Figure 27. Small Signal Pulse Response, Gain = –10
1V
100
90
V
IN
10
V
OUT
0%
10V
Figure 30. Large Signal Pulse Response, Gain = –10
–8–
20ns
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Page 9
AD811
APPLICATIONS General Design Considerations
The AD811 is a current feedback amplifier optimized for use in high performance video and data acquisition applications. Since it uses a current feedback architecture, its closed-loop –3 dB bandwidth is dependent on the magnitude of the feedback resis­tor. The desired closed-loop gain and bandwidth are obtained by varying the feedback resistor (R and varying the gain resistor (R
) to tune the bandwidth,
FB
) to get the correct gain. Table I
G
contains recommended resistor values for a variety of useful closed-loop gains and supply voltages.
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Resistance Values
VS = 15 V Closed-Loop –3 dB BW Gain R
FB
R
G
(MHz)
+1 750 140 +2 649 649 120 +10 511 56.2 100 –1 590 590 115 –10 511 51.1 95
VS = 5 V Closed-Loop –3 dB BW Gain R
FB
R
G
(MHz)
+1 619 80 +2 562 562 80 +10 442 48.7 65 –1 562 562 75 –10 442 44.2 65
VS = 10 V Closed-Loop –3 dB BW Gain R
FB
R
G
(MHz)
+1 649 105 +2 590 590 105 +10 499 49.9 80 –1 590 590 105 –10 499 49.9 80
Figures 11 and 12 illustrate the relationship between the feed­back resistor and the frequency and time domain response char­acteristics for a closed-loop gain of +2. (The response at other gains will be similar.)
The 3 dB bandwidth is somewhat dependent on the power supply voltage. As the supply voltage is decreased for example, the magnitude of internal junction capacitances is increased, causing a reduction in closed-loop bandwidth. To compensate for this, smaller values of feedback resistor are used at lower supply voltages.
Achieving the Flattest Gain Response at High Frequency
Achieving and maintaining gain flatness of better than 0.1 dB at frequencies above 10 MHz requires careful consideration of several issues.
Choice of Feedback and Gain Resistors
Because of the above-mentioned relationship between the 3 dB bandwidth and the feedback resistor, the fine scale gain flatness will, to some extent, vary with feedback resistor tolerance. It is, therefore, recommended that resistors with a 1% tolerance be used if it is desired to maintain flatness over a wide range of production lots. In addition, resistors of different construction have different associated parasitic capacitance and inductance. Metal-film resistors were used for the bulk of the characteriza­tion for this data sheet. It is possible that values other than those indicated will be optimal for other resistor types.
Printed Circuit Board Layout Considerations
As to be expected for a wideband amplifier, PC board parasitics can affect the overall closed loop performance. Of concern are stray capacitances at the output and the inverting input nodes. If a ground plane is to be used on the same side of the board as the signal traces, a space (3/16" is plenty) should be left around the signal lines to minimize coupling. Additionally, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. Line lengths less than 1/4" are recommended.
Quality of Coaxial Cable
Optimum flatness when driving a coax cable is possible only when the driven cable is terminated at each end with a resistor matching its characteristic impedance. If the coax was ideal, then the resulting flatness would not be affected by the length of the cable. While outstanding results can be achieved using inex­pensive cables, it should be noted that some variation in flatness due to varying cable lengths may be experienced.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz­ing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier’s response. In addition, if large current transients must be delivered to the load, then bypass capacitors
(typically greater than 1 µF) will be required to provide the best
settling time and lowest distortion. Although the recommended
0.1 µF power supply bypass capacitors will be sufficient in many
applications, more elaborate bypassing (such as using two paral­leled capacitors) may be required in some cases.
REV. D
–9–
Page 10
AD811
p
Driving Capacitive Loads
The feedback and gain resistor values in Table I will result in very flat closed-loop responses in applications where the load capacitances are below 10 pF. Capacitances greater than this will result in increased peaking and overshoot, although not necessarily in a sustained oscillation.
There are at least two very effective ways to compensate for this effect. One way is to increase the magnitude of the feedback resistor, which lowers the 3 dB frequency. The other method is to include a small resistor in series with the output of the ampli­fier to isolate it from the load capacitance. The results of these
two techniques are illustrated in Figure 32. Using a 1.5 k
feedback resistor, the output ripple is less than 0.5 dB when driv­ing 100 pF. The main disadvantage of this method is that it sacrifices a little bit of gain flatness for increased capacitive load drive capability. With the second method, using a series resistor, the loss of flatness does not occur.
R
FB
+V
S
0.1mF
R
G
RS (OPTIONAL)
C
L
0.1mF
AD811
–V
S
V
IN
R
T
V
OUT
R
L
Figure 31. Recommended Connection for Driving a Large Capacitive Load
12
100
90
80
70
V
60
S
50
40
VALUE OF R
30
20
10
0
10
LOAD CAPACITANCE –
G = +2 V = 615V
S
R VALUE SPECIFIED
S
IS FOR FLATTEST FREQUENCY RESPONSE
100
F
1000
Figure 33. Recommended Value of Series Resistor vs. the Amount of Capacitive Load
Figure 33 shows recommended resistor values for different load capacitances. Refer again to Figure 32 for an example of the results of this method. Note that it may be necessary to adjust the gain setting resistor, R results due to the divider formed by the series resistor, R
, to correct for the attenuation which
G
, and
S
the load resistance.
Applications which require driving a large load capacitance at a high slew rate are often limited by the output current available from the driving amplifier. For example, an amplifier limited to 25 mA output current cannot drive a 500 pF load at a slew rate
greater than 50 V/µs. However, because of the AD811’s 100 mA output current, a slew rate of 200 V/µs is achievable when driv-
ing this same 500 pF capacitor (see Figure 34).
2V
100
V
90
IN
100ns
R
= 1.5kV
9
6
3
GAIN – dB
0
–3
–6
1M
G = +2
= 615V
V
S
= 10kV
R
L
= 100pF
C
L
FB
= 0
R
S
= 649V
R
FB
= 30V
R
S
10M 100M
FREQUENCY – Hz
Figure 32. Performance Comparison of Two Methods for Driving a Capacitive Load
10
V
OUT
0%
5V
Figure 34. Output Waveform of an AD811 Driving a 500 pF Load. Gain = +2, R
= 10 k
R
S
= 649 Ω, RS = 15 Ω,
FB
–10–
REV. D
Page 11
Operation as a Video Line Driver
The AD811 has been designed to offer outstanding perfor­mance at closed-loop gains of one or greater, while driving multiple reverse-terminated video loads. The lowest differential
gain and phase errors will be obtained when using ±15 volt power supplies. With ±12 volt supplies, there will be an insig-
nificant increase in these errors and a slight improvement in
gain flatness. Due to power dissipation considerations, ±12 volt
supplies are recommended for optimum video performance. Excellent performance can be achieved at much lower supplies as well.
The closed-loop gain vs. frequency at different supply voltages is shown in Figure 36. Figure 37 is an oscilloscope photograph
of an AD811 line driver’s pulse response with ±15 volt supplies.
The differential gain and phase error vs. supply are plotted in Figures 38 and 39, respectively.
Another important consideration when driving multiple cables is the high frequency isolation between the outputs of the cables. Due to its low output impedance, the AD811 achieves better than 40 dB of output to output isolation at 5 MHz driv-
ing back terminated 75 cables.
75V CABLE
75V
75V
75V CABLE
75V
75V
V
#1
OUT
V
#2
OUT
V
IN
75V CABLE
75V
0.1mF
649V649V
+V
AD811
–V
S
0.1mF
S
Figure 35. A Video Line Driver Operating at a Gain of +2
AD811
1V
100
V
90
IN
10
V
OUT
0%
1V
Figure 37. Small Signal Pulse Response, Gain = +2,
= ±15 V
V
S
0.10
0.09
0.08
0.07
0.06
a.
0.05
0.04
DIFFERENTIAL GAIN – %
0.03
0.02
0.01
DRIVING A SINGLE, BACK TERMINATED, 75V COAX CABLE
b.
DRIVING TWO PARALLEL, BACK TERMINATED, COAX CABLES
b
a
6
5
SUPPLY VOLTAGE – 6Volts
Figure 38. Differential Gain Error vs. Supply Voltage for the Video Line Driver of Figure 35
10ns
RF= 649V F
= 3.58MHz
C
100 IRE MODULATED RAMP
15
1413121110987
12
9
6
3
GAIN – dB
0
–3
–6
1
G = +2
= 150V
R
L
= R
R
G
FB
10 100
FREQUENCY – MHz
VS = 615V R
VS = 65V
= 562V
R
FB
= 649V
FB
Figure 36. Closed-Loop Gain vs. Frequency, Gain = +2
REV. D
0.20
0.18
0.16
0.14
a.
0.12
0.10
0.08
0.06
DIFFERENTIAL PHASE – Degrees
0.04
0.02
6
5
DRIVING A SINGLE, BACK TERMINATED, 75V COAX CABLE
b.
DRIVING TWO PARALLEL, BACK TERMINATED, COAX CABLES
a
SUPPLY VOLTAGE – 6Volts
b
RF = 649V
= 3.58MHz
F
C
100 IRE MODULATED RAMP
Figure 39. Differential Phase Error vs. Supply Voltage for the Video Line Driver of Figure 35
–11–
15
1413121110987
Page 12
AD811
An 80 MHz Voltage-Controlled Amplifier Circuit
The voltage-controlled amplifier (VCA) circuit of Figure 40 shows the AD811 being used with the AD834, a 500 MHz, 4-quadrant multiplier. The AD834 multiplies the signal input by the dc control voltage, V
. The AD834 outputs are in the
G
form of differential currents from a pair of open collectors, ensuring that the full bandwidth of the multiplier (which ex­ceeds 500 MHz) is available for certain applications. Here, the AD811 op amp provides a buffered, single-ended ground­referenced output. Using feedback resistors R8 and R9 of
511 , the overall gain ranges from –70 dB, for V
+12 dB, (a numerical gain of four), when V
= 0 dB to
G
= +1 V. The over-
G
all transfer function of the VCA is:
V
= 4 (X1 – X2)(Y1 – Y2)
OUT
which reduces to V
= 4 VG VIN using the labeling conven-
OUT
tions shown in Figure 40. The circuit’s –3 dB bandwidth of 80 MHz, is maintained essentially constant—independent of
gain. The response can be maintained flat to within ±0.1 dB
from dc to 40 MHz at full gain with the addition of an optional capacitor of about 0.3 pF across the feedback resistor R8. The
circuit produces a full-scale output of ±4 V for a ±1 V input, and can drive a reverse-terminated load of 50 or 75 to ±2 V.
The gain can be increased to 20 dB (×10) by raising R8 and R9 to 1.27 k, with a corresponding decrease in –3 dB bandwidth
to about 25 MHz. The maximum output voltage under these
conditions will be increased to ±9 V using ±12 V supplies.
The gain-control input voltage, VG, may be a positive or nega­tive ground-referenced voltage, or fully differential, depending on the user’s choice of connections at Pins 7 and 8. A positive value of V ing the sign of V
results in an overall noninverting response. Revers-
G
simply causes the sign of the overall response
G
to invert. In fact, although this circuit has been classified as a voltage-controlled amplifier, it is also quite useful as a general­purpose four-quadrant multiplier, with good load-driving capa­bilities and fully-symmetrical responses from X- and Y-inputs.
The AD811 and AD834 can both be operated from power
supply voltages of ±5 V. While it is not necessary to power them
from the same supplies, the common-mode voltage at W1 and W2 must be biased within the common-mode range of the AD811’s input stage. To achieve the lowest differential gain and phase errors, it is recommended that the AD811 be operated
from power supply voltages of ±10 volts or greater. This VCA circuit is designed to operate from a ±12 volt dual power
supply.
FB
+12V
C1
0.1mF
+
V
G
V
IN
R1 100V
R2 100V
8765 X2
X1 +V
AD834
Y1 Y2 W2 1234
249V
W1
S
U1
–V
S
R3
*R8 = R9 = 511V FOR X4 GAIN
R4
182V
R5
182V
= 1.27kV FOR X10 GAIN
294V
294V
R6
R7
R8*
R9*
U3
AD811
C2
0.1mF
FB
V
OUT
R
L
–12V
Figure 40. An 80 MHz Voltage-Controlled Amplifier
–12–
REV. D
Page 13
AD811
A Video Keyer Circuit
By using two AD834 multipliers, an AD811, and a 1 V dc source, a special form of a two-input VCA circuit called a video keyer can be assembled. “Keying” is the term used in reference to blending two or more video sources under the control of a third signal or signals to create such special effects as dissolves and overlays. The circuit shown in Figure 41 is a two-input keyer, with video inputs V input V
. The transfer function (with V
G
and VB, and a control
A
at the load) is
OUT
given by:
V
= G VA + (1–G) V
OUT
B
where G is a dimensionless variable (actually, just the gain of the “A” signal path) that ranges from 0 when V when V
= +1 V. Thus, V
G
varies continuously between V
OUT
= 0, to 1
G
A
and VB as G varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal path through U1, which handles video input V clearly zero when V ensures that it is unity when V
= 0 and the scaling we have chosen
G
= +1 V; this takes care of the
G
first term of the transfer function. On the other hand, the V
. Its gain is
A
G
input to U2 is taken to the inverting input X2 while X1 is biased at an accurate +1 V. Thus, when V to video input V whereas when V
is already at its full-scale value of unity,
B
= +1 V, the differential input X1–X2 is zero.
G
= 0, the response
G
This generates the second term.
The bias currents required at the output of the multipliers are provided by R8 and R9. A dc-level-shifting network comprising R10/R12 and R11/R13 ensures that the input nodes of the AD811 are positioned at a voltage within its common-mode range. At high frequencies C1 and C2 bypass R10 and R11 respectively. R14 is included to lower the HF loop gain, and is needed because the voltage-to-current conversion in the AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 ; this is only about half the value
required for optimum flatness in the AD811’s response. (Note that this resistance is unaffected by G: when G = 1, all the feedback is via U1, while when G = 0 it is all via U2). R14 reduces the fractional amount of output current from the multi­pliers into the current-summing inverting input of the AD811, by sharing it with R8. This resistor can be used to adjust the bandwidth and damping factor to best suit the application.
To generate the 1 V dc needed for the “1–G” term an AD589
reference supplies 1.225 V ± 25 mV to a voltage divider consist-
ing of resistors R2 through R4. Potentiometer R3 should be adjusted to provide exactly +1 V at the X1 input.
In this case, we have shown an arrangement using dual supplies
of ±5 V for both the AD834 and the AD811. Also, the overall
gain in this case is arranged to be unity at the load, when it is
driven from a reverse-terminated 75 line. This means that the
“dual VCA” has to operate at a maximum gain of 2, rather
113V
V
G
(0 TO +1V dc)
V
A
(61V FS)
R5
1.87kV
174V
100V
1.02kV
V
B
(61V FS)
+5V
R7
45.3V
R6
226V
876 5
+5V
R1
U4
AD589
R2
R3
R4
X2 X1 +VSW1
U1
AD834
Y1 Y2 W2–V
1
876 5
X2
Y1 Y2 W2–V
1
2
X1 +V
U1
AD834
2
S
34
–5V
W1
S
S
34
–5V
C1
0.1mF
R8
29.4V
R9
29.4V
R10
2.49kV
+5V
C2
0.1mF
R11
2.49kV
R14
SEE TEXT
R12
6.98kV
R13
6.98kV
–5V
SETUP FOR DRIVING REVERSE-TERMINATED LOAD
Z
200V
200V
C3
0.1mF
C4
0.1mF
O
LOAD
GND
LOAD
GND
TO PIN 6
AD811
TO Y2
FB
AD811
FB
+5V
U3
–5V
V
OUT
Z
INSET
O
V
OUT
REV. D
Figure 41. A Practical Video Keyer Circuit
–13–
Page 14
AD811
than 4 as in the VCA circuit of Figure 40. However, this cannot be achieved by lowering the feedback resistor, since below a
critical value (not much less than 500 ) the AD811’s peaking
may be unacceptable. This is because the dominant pole in the open-loop ac response of a current-feedback amplifier is con­trolled by this feedback resistor. It would be possible to operate at a gain of X4 and then attenuate the signal at the output. Instead, we have chosen to attenuate the signals by 6 dB at the input to the AD811; this is the function of R8 through R11.
Figure 42 is a plot of the ac response of the feedback keyer,
when driving a reverse terminated 50 cable. Output noise and
adjacent channel feedthrough, with either channel fully off and the other fully on, is about –50 dB to 10 MHz. The feedthrough at 100 MHz is limited primarily by board layout. For V
= +1 V,
G
the –3 dB bandwidth is 15 MHz when using a 137 resistor for R14 and 70 MHz with R14 = 49.9 . For further information
regarding the design and operation of the VCA and video keyer circuits, refer to the application note “Video VCA’s and Keyers Using the AD834 & AD811” by Brunner, Clarke, and Gilbert, available FREE from Analog Devices.
R14 = 49.9
0
–10
–20
–30 –40
–50
–60
CLOSED-LOOP GAIN – dB
–70
–80
10k
ADJACENT
FEEDTHROUGH
100k
GAIN
CHANNEL
FREQUENCY – Hz
V
R14 = 137
10M1M
V
100M
Figure 42. A Plot of the AC Response of the Video Keyer
–14–
REV. D
Page 15
OUTLINE DIMENSIONS
PIN 1
0.299 (7.60)
0.291 (7.40)
0.419 (10.65)
0.404 (10.26)
1
16
9
8
0.018 (0.46)
0.014 (0.36)
0.050 (1.27) BSC
0.107 (2.72)
0.089 (2.26)
0.413 (10.50)
0.398 (10.10)
0.010 (0.25)
0.004 (0.10)
0.015 (0.38)
0.007 (1.18)
0.045 (1.15)
0.020 (0.50)
0.364 (9.246)
0.344 (8.738)
Dimensions shown in inches and (mm).
AD811
PIN 1
0.165 6 0.01
(4.19 6 0.25)
0.125 (3.18)
0.200.(5.08)
0.200 (5.08)
0.125 (3.18)
8- Lead Plastic DIP (N) Package
0.39 (9.91) MAX
8
MIN
0.018 6 0.003 (0.46 6 0.08)
5
0.25
0.033 (0.84)
NOM
(6.35)
0.035 6 0.01 (0.89 6 0.25)
14
0.10 (2.54) BSC
0.31
(7.87)
0.18 6 0.03 (4.57 6 0.75)
SEATING PLANE
8-Lead Cerdip (Q) Package
0.005 (0.13)
PIN 1
MAX
0.023 (0.58)
0.014 (0.36)
MIN
0.055 (1.4) MAX
85
1
4
0.100 (2.54) BSC
0.405 (10.29) MAX
0.070 (1.78)
0.030 (0.76)
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150 (3.81) MIN
SEATING PLANE
0.30 (7.62)
0.320 (8.13)
0.290 (7.37)
15°
158
REF
08
0.011 6 0.003 (0.28 6 0.08)
0.015 (0.38)
0.008 (0.20)
0.082 ± 0.018
(2.085 ± 0.455)
20-Lead LCC (E-20A) Package
0.350 ± 0.008 SQ
0.050
(1.27)
(8.89 ± 0.20) SQ
NO. 1 PIN
INDEX
0.040 x 45° (1.02 x 45°)
REF 3 PLCS
(0.635 ± 0.075)
0.020 x 45° (0.51 x 45°)
16-Lead SOIC (R-16) Package
0.025 ± 0.003
C1592b–0–8/99
REF
20-Lead Wide Body SOIC (R-20) Package
8-Lead SOIC (SO-8) Package
0.1 968 (5.00)
0.1 890 (4.80)
0.1574 (4.00)
85
0.1497 (3.80)
PIN 1
0.0500 (1.27)
0.0098 (0.25)
0.0040 (0.10) SEATING
PLANE
41
BSC
0.0192 (0.49)
0.0138 (0.35)
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
88
0.0500 (1.27)
08
0.0160 (0.41)
3 458
0.015 (0.38)
0.007 (0.18)
1
0.50 (1.27) BSC
0.512 (13.00)
0.496 (12.60)
0.019 (0.48)
0.014 (0.36)
1120
0.300 (7.60)
0.292 (7.40)
10
0.011 (0.28)
0.004 (0.10)
0.050 (1.27)
0.016 (0.40)
0.419 (10.65)
0.394 (10.00)
0.104 (2.64)
0.093 (2.36)
PRINTED IN U.S.A.
REV. D
–15–
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