Datasheet AD8052AR-REEL, AD8052AR, AD8051ART-REEL7, AD8051ART-REEL, AD8051AR-REEL7 Datasheet (Analog Devices)

Low Cost, High Speed

FREQUENCY – MHz

4.5

0

500.1 1 10

3.0

1.5

1.0

0.5

4.0

3.5

2.0

2.5

5.0

PEAK-TO-PEAK OUTPUT VOLTAGE SWING

(THD # 0.5%) – Volts

VS = +5V
G = –1
R

F

= 2kV

R

L

= 2kV

a

FEATURES
Low Cost Single (AD8051), Dual (AD8052) and Quad

(AD8054)
Voltage Feedback Architecture
Fully Specified at +3 V, +5 V and ⴞ5 V Supplies
Single Supply Operation

Output Swings to Within 25 mV of Either Rail

= 1K

= 1K

L

= +5 V

S

= 150 ⍀

L

= 100 ⍀

Input Voltage Range: –0.2 V to +4 V; V
High Speed and Fast Settling on +5 V:

110 MHz –3 dB Bandwidth (G = +1) (AD8051/AD8052)

150 MHz –3 dB Bandwidth (G = +1) (AD8054)

145 V/␮s Slew Rate

50 ns Settling Time to 0.1%
Small Packaging

AD8051 Available in SOT-23-5

AD8052 Available in ␮SOIC-8

AD8054 Available in TSSOP-14
Good Video Specifications (G = +2)

Gain Flatness of 0.1 dB to 20 MHz; R

0.03% Differential Gain Error; R

0.03ⴗ Differential Phase Error; R

L

L

Low Distortion

–80 dBc Total Harmonic @ 1 MHz, R
Outstanding Load Drive Capability

Drives 45 mA, 0.5 V from Supply Rails (AD8051/AD8052)

Drives 50 pF Capacitive Load (G = +1) (AD8051/AD8052)
Low Power of 2.75 mA/Amplifier (AD8054)
Low Power of 4.4 mA/Amplifier (AD8051/AD8052)

APPLICATIONS
Coax Cable Driver
Active Filters
Video Switchers
A/D Driver
Professional Cameras
CCD Imaging Systems
CD/DVD ROM

Rail-to-Rail Amplifiers

AD8051/AD8052/AD8054

CONNECTION DIAGRAMS

(Top Views)

SO-8

AD8051

1

NC

2

–IN

3

+IN

4

S

NC = NO CONNECT

8

NC

7

+V

S

6

V

OUT

5

NC–V

R-8, ␮SOIC (RM) R-14, TSSOP-14 (RU-14)

OUT1

–IN1
+IN1

–V

1

–

2

+

3

4

S

8

+V

S

7

OUT

6

–IN2

–
+

+IN2

5

AD8052

portable equipment. Low distortion and fast settling make them
ideal for active filter applications.

The AD8051/AD8052/AD8054 offer low power supply cur­rent and can operate on a single +3 V power supply. These
features are ideally suited for portable and battery powered
applications where size and power are critical.

The wide bandwidth and fast slew rate on a single +5 V supply
make these amplifiers useful in many general purpose, high speed

applications where dual power supplies of up to ±6 V and single

supplies from +3 V to +12 V are needed.

All of this low cost performance is offered in an 8-lead SOIC,

along with a tiny SOT-23-5 package (AD8051), a µSOIC

package (AD8052) and a TSSOP-14 (AD8054).

SOT-23-5 (RT)

AD8051

V

1

OUT

–V

2

S

3

1

OUT A

2

2IN A

3

+IN A

4

V+

AD8054

5

+IN B

6

2IN B 2IN C

7

OUT B

+–

5

+V

S

4

–IN+IN

14

OUT D

13

2IN D

12

+IN D

11

V2

10

+IN C

9
8

OUT C

PRODUCT DESCRIPTION

The AD8051 (single), AD8052 (dual) and AD8054 (quad) are
low cost, voltage feedback, high speed amplifiers designed to

operate on +3 V, +5 V or ±5 V supplies. They have true single

supply capability with an input voltage range extending 200␣ mV
below the negative rail and within 1␣ V of the positive rail.

Despite their low cost, the AD8051/AD8052/AD8054 provide
excellent overall performance and versatility. The output volt­age swing extends to within 25 mV of each rail, providing the
maximum output dynamic range with excellent overdrive recov­ery. This makes the AD8051/AD8052/AD8054 useful for video
electronics such as cameras, video switchers or any high speed

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

Figure 1. Low Distortion Rail-to-Rail Output Swing

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1999

(@ TA = +25ⴗC, VS = +5 V, RL = 2 k⍀ to +2.5 V,

AD8051/AD8052/AD8054–SPECIFICATIONS

AD8051A/AD8052A AD8054A

Parameter Conditions Min Typ Max Min Typ Max Units

DYNAMIC PERFORMANCE

–3 dB Small Signal Bandwidth G = +1, V

G = –1, +2, V

Bandwidth for 0.1 dB Flatness G = +2, V

R

L

R

F

R

F

Slew Rate G = –1, V
Full Power Response G = +1, V
Settling Time to 0.1% G = –1, VO = 2 V Step 50 40 ns

= 0.2 V p-p 70 110 80 150 MHz

O

= 0.2 V p-p 50 60 MHz

O

= 0.2 V p-p,

O

= 150 Ω to +2.5 V,
= 806 Ω for AD8051A/AD8052A 20 MHz
= 200 Ω for AD8054A 12 MHz

= 2 V Step 100 145 140 170 V/µs

O

= 2 V p-p 35 45 MHz

O

unless otherwise noted)

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion

1

fC = 5 MHz, VO = 2 V p-p, G = +2 –67 –68 dB

Input Voltage Noise f = 10 kHz 16 16 nV/√Hz
Input Current Noise f = 10 kHz 850 850 fA/√Hz
Differential Gain Error (NTSC) G = +2, R

R

L

Differential Phase Error (NTSC) G = +2, R

R

L

= 150 Ω to +2.5 V 0.09 0.07 %

L

= 1 kΩ to +2.5 V 0.03 0.02 %

= 150 Ω to +2.5 V 0.19 0.26 Degrees

L

= 1 kΩ to +2.5 V 0.03 0.05 Degrees

Crosstalk f = 5 MHz, G = +2 –60 –60 dB

DC PERFORMANCE

Input Offset Voltage 1.7 10 1.7 12 mV

T

MIN–TMAX

25 30 mV

Offset Drift 10 15 µV/°C
Input Bias Current 1.4 2.5 2 4.5 µA

T

MIN–TMAX

3.25 4.5 µA

Input Offset Current 0.1 0.75 0.2 1.2 µA
Open-Loop Gain R

= 2 kΩ to +2.5 V 86 98 82 98 dB

L

T

MIN–TMAX

= 150 Ω to +2.5 V 76 82 74 82 dB

R

L

T

MIN–TMAX

96 96 dB

78 78 dB

INPUT CHARACTERISTICS

Input Resistance 290 300 kΩ
Input Capacitance 1.4 1.5 pF
Input Common-Mode Voltage Range –0.2 to 4 –0.2 to 4 V
Common-Mode Rejection Ratio VCM = 0 V to +3.5 V 72 88 70 86 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing R

Output Current V

= 10␣ kΩ to +2.5 V 0.015 to 4.985 0.03 to 4.975 V

L

= 2␣ kΩ to +2.5 V 0.1 to 4.9 0.025 to 4.975 0.125 to 4.875 0.05 to 4.95 V

R

L

= 150 Ω to +2.5 V 0.3 to 4.625 0.2 to 4.8 0.55 to 4.4 0.25 to 4.65 V

R

L

= 0.5 V to +4.5 V 45 30 mA

OUT

T

MIN–TMAX

45 30 mA

Short Circuit Current Sourcing 80 45 mA

Sinking 130 85 mA

Capacitive Load Drive G = +1 (AD8051/AD8052) 50 pF

G = +2 (AD8054) 40 pF

POWER SUPPLY

Operating Range 3 12 3 12 V
Quiescent Current/Amplifier 4.4 5 2.75 3.275 mA
Power Supply Rejection Ratio ∆VS = ±1 V 70 80 68 80 dB

OPERATING TEMPERATURE RANGE –40 +85 –40 +85 °C

NOTES

1

Refer to Figure 15.

Specifications subject to change without notice.

–2–

REV. B

AD8051/AD8052/AD8054

SPECIFICATIONS

Parameter Conditions Min Typ Max Min Typ Max Units

DYNAMIC PERFORMANCE

–3 dB Small Signal Bandwidth G = +1, V

Bandwidth for 0.1 dB Flatness G = +2, V

Slew Rate G = –1, V
Full Power Response G = +1, V
Settling Time to 0.1% G = –1, VO = 2 V Step 55 55 ns

(@ TA = +25ⴗC, VS = +3 V, RL = 2 k⍀ to +1.5 V, unless otherwise noted)

AD8051A/AD8052A AD8054A

= 0.2 V p-p 70 110 80 135 MHz

O

G = –1, +2, V

R

= 150 Ω to 2.5 V,

L

= 402 Ω for AD8051A/AD8052A 17 MHz

R

F

R

= 200 Ω for AD8054A 10 MHz

F

= 0.2 V p-p 50 65 MHz

O

= 0.2 V p-p,

O

= 2 V Step 90 135 110 150 V/µs

O

= 1 V p-p 65 85 MHz

O

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion

1

fC = 5 MHz, VO = 2 V p-p,
G = –1, R

= 100 Ω to +1.5 V –47 –48 dB

L

Input Voltage Noise f = 10 kHz 16 16 nV/√Hz
Input Current Noise f = 10 kHz 600 600 fA/√Hz
Differential Gain Error (NTSC) G = +2, V

R
R

Differential Phase Error (NTSC) G = +2, V

R
R

= +1 V

CM

= 150 Ω to +1.5 V, 0.11 0.13 %

L

= 1 kΩ to +1.5 V 0.09 0.09 %

L

= +1 V

CM

= 150 Ω to +1.5 V 0.24 0.3 Degrees

L

= 1 k Ω to +1.5 V 0.10 0.1 Degrees

L

Crosstalk f = 5 MHz, G = +2 –60 –60 dB

DC PERFORMANCE

Input Offset Voltage 1.6 10 1.6 12 mV

T

MIN–TMAX

25 30 mV

Offset Drift 10 15 µV/°C
Input Bias Current 1.3 2.6 2 4.5 µA

T

MIN–TMAX

3.25 4.5 µA

Input Offset Current 0.15 0.8 0.2 1.2 µA
Open-Loop Gain R

= 2 kΩ 80 96 80 96 dB

L

T

MIN–TMAX

= 150 Ω 74 82 72 80 dB

R

L

T

MIN–TMAX

94 94 dB

76 76 dB

INPUT CHARACTERISTICS

Input Resistance 290 300 kΩ
Input Capacitance 1.4 1.5 pF
Input Common-Mode Voltage Range –0.2 to 2 –0.2 to 2 V
Common-Mode Rejection Ratio VCM = 0 V to 1.5 V 72 88 70 86 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing R

Output Current V

= 10␣ kΩ to +1.5 V 0.01 to 2.99 0.025 to 2.98 V

L

= 2␣ kΩ to +1.5 V 0.075 to 2.9 0.02 to 2.98 0.1 to 2.9 0.35 to 2.965 V

R

L

R

= 150 Ω to +1.5 V 0.2 to 2.75 0.125 to 2.875 0.35 to 2.55 0.15 to 2.75 V

L

= 0.5 V to +2.5 V 45 25 mA

OUT

T

MIN–TMAX

45 25 mA

Short Circuit Current Sourcing 60 30 mA

Sinking 90 50 mA

Capacitive Load Drive G = +1 (AD8051/AD8052) 45 pF

G = +2 (AD8054) 35 pF

POWER SUPPLY

Operating Range 3 12 3 12 V
Quiescent Current/Amplifier 4.2 4.8 2.625 3.125 mA
Power Supply Rejection Ratio ∆V

= +0.5 V 68 80 68 80 dB

S

OPERATING TEMPERATURE RANGE –40 +85 – 40 +85 °C

NOTES

1

Refer to Figure 15.

Specifications subject to change without notice.

–3–REV. B

(@ TA = +25ⴗC, VS = ⴞ5 V, RL = 2 k⍀ to Ground,

AD8051/AD8052/AD8054–SPECIFICATIONS

AD8051A/AD8052A AD8054A

Parameter Conditions Min Typ Max Min Typ Max Units

DYNAMIC PERFORMANCE

–3 dB Small Signal Bandwidth G = +1, VO = 0.2 V p-p 70 110 85 160 MHz

G = –1, +2, VO = 0.2 V p-p 50 65 MHz

Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p,

R

= 150 Ω,

L

R

= 1.1 kΩ for AD8051A/AD8052A 20 MHz

F

R

= 200 Ω for AD8054A 15 MHz

Slew Rate G = –1, V

Full Power Response G = +1, VO = 2 V p-p 40 50 MHz
Settling Time to 0.1% G = –1, VO = 2 V Step 50 40 ns

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion fC = 5 MHz, VO = 2 V p-p, G = +2 –71 –72 dB
Input Voltage Noise f = 10 kHz 16 16 nV/√Hz
Input Current Noise f = 10 kHz 900 900 fA/√Hz
Differential Gain Error (NTSC) G = +2, R

Differential Phase Error (NTSC) G = +2, R

Crosstalk f = 5 MHz, G = +2 –60 –60 dB

DC PERFORMANCE

Input Offset Voltage 1.8 11 1.8 13 mV

Offset Drift 10 15 µV/°C
Input Bias Current 1.4 2.6 2 4.5 µA

Input Offset Current 0.1 0.75 0.2 1.2 µA

Open-Loop Gain R

INPUT CHARACTERISTICS

Input Resistance 290 300 kΩ
Input Capacitance 1.4 1.5 pF

Input Common-Mode Voltage Range –5.2 to 4 –5.2 to 4 V

Common-Mode Rejection Ratio VCM = –5 V to +3.5 V 72 88 70 86 dB

F

= 2 V Step 105 170 150 190 V/µs

O

= 150 Ω 0.02 0.06 %

R

R

T

T

T

R

T

L

= 1 kΩ 0.02 0.02 %

L

L

MIN–TMAX

MIN–TMAX

L

MIN–TMAX

L

MIN–TMAX

= 150 Ω 0.11 0.15 Degrees

L

= 1 kΩ 0.02 0.03 Degrees

= 2 kΩ 88 96 84 96 dB

96 96 dB

= 150 Ω 78 82 76 82 dB

80 80 dB

unless otherwise noted)

27 32 mV

3.5 4.5 µA

OUTPUT CHARACTERISTICS

Output Voltage Swing R

Output Current V

= 10␣ kΩ –4.98 to +4.98 –4.97 to +4.97 V

L

R

= 2␣ kΩ –4.85 to +4.85 –4.97 to +4.97 –4.8 to +4.8 –4.9 to +4.9 V

L

R

= 150 Ω –4.45 to +4.3 –4.6 to +4.6 –4.0 to +3.8 –4.5 to +4.5 V

L

= –4.5 V to +4.5 V 45 30 mA

OUT

T

MIN–TMAX

45 30 mA

Short Circuit Current Sourcing 100 60 mA

Sinking 160 100 mA

Capacitive Load Drive G = +1 (AD8051/AD8052) 50 pF

G = +2 (AD8054) 40 pF

POWER SUPPLY

Operating Range 3 12 3 12 V
Quiescent Current/Amplifier 4.8 5.5 2.875 3.4 mA
Power Supply Rejection Ratio ∆VS = ±1 V 68806880dB

OPERATING TEMPERATURE RANGE –40 +85 –40 +85 °C

Specifications subject to change without notice.

–4–

REV. B

AD8051/AD8052/AD8054

AMBIENT TEMPERATURE – 8C

–50

0

TJ = +1508C

2.0

1.5

1.0

0.5

8-LEAD SOIC

PACKAGE

–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90

mSOIC

SOT-23-5

14-LEAD SOIC

MAXIMUM POWER DISSIPATION – Watts

14-LEAD TSSOP-14

ABSOLUTE MAXIMUM RATINGS

Supply␣ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6␣ V

Internal␣ Power␣ Dissipation

2

1

Small␣ Outline␣ Package (R) . . . Observe Power Derating Curves

SOT-23-5 Package . . . . . . . . Observe Power Derating Curves

µSOIC Package . . . . . . . . . . Observe Power Derating Curves

TSSOP-14 Package . . . . . . . Observe Power Derating Curves

Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±V

S

Differential␣ Input␣ Voltage . . . . . . . . . . . . . . . . . . . . . . . ±2.5␣ V

Output Short Circuit Duration

␣ ␣ . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves

Storage Temperature Range (R) . . . . . . . . . –65°C to +125°C

Operating Temperature Range (A Grade) . . . –40°C to +85°C

Lead Temperature Range (Soldering␣ 10␣ sec) . . . . . . . . +300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

2

Specification is for device in free air:

8-Lead SOIC: θJA = 155°C/W
5-Lead SOT-23-5: θJA = 240°C/W
8-Lead µSOIC: θJA = 200°C/W
14-Lead SOIC: θJA = 120°C/W
14-Lead TSSOP: θJA = 180°C/W

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the AD8051/
AD8052/AD8054 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for

ORDERING GUIDE

Temperature Package Package Brand

Model Range Descriptions Options* Code

plastic encapsulated devices is determined by the glass transi-

tion temperature of the plastic, approximately +150°C. Tempo-

rarily exceeding this limit may cause a shift in parametric
performance due to a change in the stresses exerted on the die by

the package. Exceeding a junction temperature of +175°C for an

extended period can result in device failure.

While the AD8051/AD8052/AD8054 are internally short circuit
protected, this may not be sufficient to guarantee that the maxi-

mum junction temperature (+150°C) is not exceeded under

all conditions. To ensure proper operation, it is necessary to ob­serve the maximum power derating curves.

Figure 2. Plot of Maximum Power Dissipation vs.
Temperature for AD8051/AD8052/AD8054

AD8051AR –40°C to +85°C 8-Lead SOIC SO-8
AD8051AR-REEL –40°C to +85°C 13" Tape and Reel SO-8
AD8051AR-REEL7 –40°C to +85°C 7" Tape and Reel SO-8
AD8051ART-REEL –40°C to +85°C 13" Tape and Reel RT-5 H2A
AD8051ART-REEL7 –40°C to +85°C 7" Tape and Reel RT-5 H2A

AD8052AR –40°C to +85°C 8-Lead SOIC SO-8
AD8052AR-REEL –40°C to +85°C 13" Tape and Reel SO-8
AD8052AR-REEL7 –40°C to +85°C 7" Tape and Reel SO-8
AD8052ARM –40°C to +85°C 8-Lead µSOIC RM-8 H4A
AD8052ARM-REEL –40°C to +85°C 13" Tape and Reel RM-8 H4A
AD8052ARM-REEL7 –40°C to +85°C 7" Tape and Reel RM-8 H4A

AD8054AR –40°C to +85°C 14-Lead SOIC R-14
AD8054AR-REEL –40°C to +85°C 13" Tape and Reel R-14
AD8054AR-REEL7 –40°C to +85°C 7" Tape and Reel R-14
AD8054ARU –40°C to +85°C 14-Lead µSOIC RU-14
AD8054ARU-REEL –40°C to +85°C 13" Tape and Reel RU-14

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

AD8054ARU-REEL7 –40°C to +85°C 7" Tape and Reel RU-14

*R = Small Outline; RM = Micro Small Outline; RT = Surface Mount; RU = TSSOP .

accumulate on the human body and test equipment and can discharge without detection.
Although the AD8051/AD8052/AD8054 feature proprietary ESD protection circuitry, perma­nent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. B

WARNING!

ESD SENSITIVE DEVICE

–5–

AD8051/AD8052/AD8054

3
2

1

0
–1
–2

–3

VS = +5V

–4

GAIN AS SHOWN

NORMALIZED GAIN – dB

R

–5

R
VO = 0.2V p-p

–6
–7

0.1 1 10 100

AS SHOWN

F

= 2kV

L

G = +10
R

= 2kV

F

G = +2
R

= 2kV

F

G = +5
R

= 2kV

F

FREQUENCY – MHz

G = +1

= 0

R

F

Figure 3. AD8051/AD8052 Normalized Gain vs.
Frequency; V

3
2

1

0
–1

–2

GAIN – dB

–3
–4
–5
–6
–7

0.1 5001 10 100

= +5 V

S

VS AS SHOWN
G = +1

= 2kV

R

L

= 0.2V p-p

V

O

VS = +3V

VS = 65V

FREQUENCY – MHz

VS = +5V

Figure 4. AD8051/AD8052 Gain vs. Frequency
vs. Supply

500

5

VS = +5V

4

GAIN AS SHOWN

3

AS SHOWN

R

F

= 5kV

R

L

2

= 0.2V p-p

V

O

1

0
–1
–2
–3

NORMALIZED GAIN – dB

–4
–5
–6
–7

100k

1M

G = +10

= 2kV

R

F

G = +5

= 2kV

R

F

FREQUENCY – Hz

G = +2

= 2kV

R

F

10M 100M

G = +1

= 0

R

F

500M

Figure 6. AD8054 Normalized Gain vs. Frequency;
V

= +5 V

S

6

5

G = +1
R

4

C

3

V

2

1

GAIN – dB

0
–1
–2

–3
–4

100k

= 2kV

L

= 5pF

L

= 0.2V p-p

O

1M 10M 100M

FREQUENCY – Hz

+3V
+5V
65V

65V

+3V
+5V

500M

Figure 7. AD8054 Gain vs. Frequency vs. Supply

3
2

1

0

–1

–2

GAIN – dB

–3

VS = +5V

–4

G = +1
R

= 2kV

L

–5

= 0.2V p-p

V

O

TEMPERATURE AS SHOWN

–6
–7

0.1
FREQUENCY – MHz

–408C

+858C

+258C

5001 10 100

Figure 5. AD8051/AD8052 Gain vs. Frequency vs.
Temperature

4

3

2

1

0

VS = +5V

–1

GAIN – dB

R

= 2kV TO 2.5V

L

–2

C

= 5pF

L

G = +1

–3

V

= 0.2V p-p

O

–4

–5

1 10 100

FREQUENCY – MHz

+858C

+258C

–408C

Figure 8. AD8054 Gain vs. Frequency vs. Temperature

–6–

500

REV. B

AD8051/AD8052/AD8054

80

40

–10

70
60

50

30
20

10

0

–20

30k 100k 1M 10M 100M

GAIN

PHASE

458 PHASE
MARGIN

VS = +5V
R

L

= 2kV

CL = 5pF

FREQUENCY – Hz

180
135

90

45
0

500M

OPEN-LOOP GAIN – dB

PHASE MARGIN – Degrees

6.3

6.2

6.1

6.0

5.9

5.8

0.1

VS = +5V
G = +2

= 150V

R

L

= 806V

R

F

= 0.2V p-p

V

O

1 10 100

FREQUENCY – MHz

5.7

5.6

GAIN FLATNESS – dB

5.5

5.4

5.3

Figure 9. AD8051/AD8052 0.1 dB Gain Flatness vs.
Frequency; G = +2

9

VS = 65V

= 4V p-p

V

O

VS = +5V
V

= 2V p-p

O

8

7
6

5
4

GAIN – dB

3

VS AS SHOWN

2

G = +2

= 2kV

R

L

1

= 2kV

R

F

AS SHOWN

V

O

0

–1

0.1 5001 10 100
FREQUENCY – MHz

6.3

6.2

6.1

6.0

5.9

5.8

VS = +5V

V

= 200

R

5.7

5.6

GAIN FLATNESS – dB

5.5

5.4

5.3

F

V

R

= 150

L

G = +2

= 0.2V p-p

V

O

1 10010

FREQUENCY – MHz

Figure 12. AD8054 0.1 dB Gain Flatness vs. Frequency;
G = +2

9

= 4V p-p

VS = +5V

= 2V p-p

V

O

8
7
6
5
4

GAIN – dB

3

VS AS SHOWN

2

G = +2

= 2kV

R

L

1

= 2kV

R

F

AS SHOWN

V

0

O

–1

0.1 5001 10 100

VS = 65V
V

O

FREQUENCY – MHz

Figure 10. AD8051/AD8052 Large Signal Frequency
Response; G = +2

80
70

60
50
40
30
20
10

OPEN-LOOP GAIN – dB

REV. B

0

–10
–20

0.01 5000.1 1 10 100

Figure 11. AD8051/AD8052 Open-Loop Gain and
Phase vs. Frequency

GAIN

PHASE

FREQUENCY – MHz

508 PHASE
MARGIN

VS = +5V
R

= 2kV

L

0
–45
–90
–135

PHASE – Degrees

–180

Figure 13. AD8054 Large Signal Frequency Response;
G = +2

Figure 14. AD8054 Open-Loop Gain and Phase
Margin vs. Frequency

–7–

AD8051/AD8052/AD8054

20

2

VO = 2V p-p

30

2

40

2

VS = +5V, G = +1

50

2

60

2

70

2

80

2

90

2

TOTAL HARMONIC DISTORTION – dBc

100

2

110

2

= 100

R

L

12345

VS = +5V, G = +2

= 2kV, RL = 100

R

F

V

VS = +5V, G = +2

= 2kV, RL = 2k

R

F

FUNDAMENTAL FREQUENCY – MHz

VS = +3V, G = 21

= 2kV, RL = 100

R

F

V

VS = +5V, G = +1

= 2k

R

V

L

V

678910

V

Figure 15. Total Harmonic Distortion

230

240

250

260

270

280

290
2100
2110

WORST HARMONIC – dBc

2120

2130
2140

0 5.00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

10MHz

5MHz

1MHz

OUTPUT VOLTAGE – V p-p

VS = +5V

= 2kV

R

L

G = +2

4.5

Figure 16. Worst Harmonic vs. Output Voltage

1000

VS = +5V

Hz

100

10

VOLTAGE NOISE – nA

1

10 10M100

1k 10k 100k 1M

FREQUENCY – Hz

Figure 18. Input Voltage Noise vs. Frequency

100

VS = +5V

10

1

CURRENT NOISE – pA Hz

0.1
10 10M100 1k 10k 100k 1M

FREQUENCY – Hz

Figure 19. Input Current Noise vs. Frequency

0.10
NTSC SUBSCRIBER (3.58MHz)

0.08

0.06

0.04

0.02

0.00

20.02

DIFFERENTIAL

DIFFERENTIAL

VS = +5, G = +2

GAIN ERROR – %

20.04

R

= 2kV, RL AS SHOWN

F

20.06
0

0.10

20.05

20.10

20.15

20.20

20.25

PHASE ERROR – Degrees

10 6020 7030 8040 90

0.05

0.00

VS = +5, G = +2
R

= 2kV, RL AS SHOWN

F

0

50

MODULATING RAMP LEVEL – IRE

RL = 150V

RL = 1kV

100

RL = 1kV

RL = 150V

10050106020 7030 8040 90

Figure 17. AD8051/AD8052 Differential Gain and Phase
Errors

0.10
NTSC SUBSCRIBER (3.58MHz)

0.05

0.00

GAIN – %

–0.05

VS = +5, G = +2

DIFFERENTIAL

DIFFERENTIAL

PHASE – Degrees

= 2kV, RL AS SHOWN

R

F

–0.10

1st 6th2nd 7th3rd 8th4th 9th5th 10th 11th

0.3

0.2

0.1

0.0
VS = +5, G = +2

–0.1

= 2kV,

R

F

–0.2

AS SHOWN

R

L

–0.3

1st 6th2nd 7th3rd 8th4th 9th5th 10th 11th

MODULATING RAMP LEVEL – IRE

RL = 1kV

RL = 150V

RL = 1kV

RL = 150V

Figure 20. AD8054 Differential Gain and Phase Errors

–8–

REV. B

AD8051/AD8052/AD8054

INPUT STEPS – Volts p-p

60

0

40

30

20

10

50

70

0.5 21 1.5

SETTING TIME TO 0.1% 2 ns

AD8051/AD8052

AD8054

VS = 15V
G = 21

R

L

= 2k

V

–10

VS = +5V

–20

= 2kV

R

F

= 2kV

R

L

–30

= 2V p-p

V

O

–40

–50

–60

–70

CROSSTALK – dB

–80

–90

–100

0.1
FREQUENCY – MHz

5001 10 100

Figure 21. AD8052 Crosstalk (Output-to-Output) vs.
Frequency

0

VS = +5V

–10

–20
–30
–40
–50
–60

CMRR – dB

–70
–80

–90

–100

0.03 500

0.1 1 10 100
FREQUENCY – MHz

Figure 22. CMRR vs. Frequency

–10
–20
–30

–40
–50
–60
–70

CROSSTALK – dB

–80
–90

–100
–110

0.1

RL = 100V

RL = 1kV

110

FREQUENCY – MHz

VS = 65V
R

= 1kV

F

= AS SHOWN

R

L

= 2V p-p

V

O

100

500

Figure 24. AD8054 Crosstalk (Output-to-Output) vs.
Frequency

20

VS = +5V

10

0
–10

–20
–30

–40

PSRR – dB

–50
–60

–70
–80

–PSRR

+PSRR

1 50010 1000.10.01

FREQUENCY – MHz

Figure 25. PSRR vs. Frequency

100

31

10

3.1

1

0.31

0.1

OUTPUT RESISTANCE – V

0.031

0.01

Figure 23. Closed Loop Output Resistance vs. Frequency

REV. B

0.1 1 10 100 500

VS = 15V

G = 11

FREQUENCY – MHz

Figure 26. Settling Time vs. Input Step

–9–

AD8051/AD8052/AD8054

1.00

0.90

0.80

0.70

0.60

0.50

0.40

0.30

0.20

0.10

OUTPUT SATURATION VOLTAGE – Volts

0

06551015202530354045505560

VOH = +858C

VOH = +258C

VOH = –408C

LOAD CURRENT – mA

VOL = –408C

VS = +5V

VOL = +858C

VOL = +258C

70 75 80 85

Figure 27. AD8051/AD8052 Output Saturation Voltage vs.
Load Current

100

RL = 2kV

90

RL = 150V

80

1.00
VS = +5V

0.875

0.750

0.625

0.500

0.375

0.250

0.125

OUTPUT SATURATION VOLTAGE – Volts

0.00

0303 6 9 121518212427

+5V –VOH (–558C)

LOAD CURRENT – mA

+5V –VOH (+258C)

VOL (–558C)

+5V –VOH (+1258C)

VOL (+1258C)

VOL (+258C)

Figure 29. AD8054 Output Saturation Voltage vs. Load
Current

OPEN-LOOP GAIN – dB

70

VS = +5V

60

05

0.5 1 1.5 2 2.5 3 3.5 4 4.5
OUTPUT VOLTAGE – Volts

Figure 28. Open-Loop Gain vs. Output Voltage

–10–

REV. B

AD8051/AD8052/AD8054

5

1.50V

Figure 30. 100 mV Step Response, G = +1

2.60

2.50

2.40

20ns

Figure 31. AD8051/AD8052 200 mV Step Response;

= +5 V, G = +1

V

S

2.5

VOLTS

Figure 33. Output Swing; G = –1, RL = +2 k

2.55

2.50

VOLTS

2.45

Ω

Figure 34. AD8054 100 mV Step Response; VS = +5 V,
G = +1

3.5

2.5

VOLTS

1.5

Figure 32. Large Signal Step Response; VS = +5 V, G = +2

4
3
2

1

21
22
23

24

Figure 35. Large Signal Step Response; VS = ±5 V, G = +1

REV. B

–11–

AD8051/AD8052/AD8054

Overdrive Recovery

Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this over­drive condition. As shown in Figure 36, the AD8051/AD8052/
AD8054 recovers within 60␣ ns from negative overdrive and
within 45␣ ns from positive overdrive.

Figure 36.␣ Overdrive Recovery

Driving Capacitive Loads

Consider the AD8051/AD8052 in a closed-loop gain of +1 with
+V

= 5 V and a load of 2 kΩ in parallel with 50 pF. Figures 37

S

and 38 show its frequency and time domain responses, respec­tively, to a small-signal excitation. The capacitive load drive of
the AD8051/AD8052/AD8054 can be increased by adding a
low valued resistor in series with the load. Figures 39 and 40
show the effect of a series resistor on capacitive drive for varying
voltage gains. As the closed-loop gain is increased, the larger
phase margin allows for larger capacitive loads with less peak­ing. Adding a series resistor with lower closed-loop gains ac­complishes the same effect. For large capacitive loads, the
frequency response of the amplifier will be dominated by the
roll-off of the series resistor and the load capacitance.

2.60

2.55

2.50

2.45

2.40

Figure 38. AD8051/AD8052 200 mV Step Response:
C

= 50 pF

L

10000

VS = +5V
# 30%

F

P

CAPACITIVE LOAD 2

1000

100

10

OVERSHOOT

1

162

RS = 3V

RS = 0V

R

R

G

F

V

IN

100mV STEP

50V

345

A

– V/V

CL

R

S

V

OUT

C

L

Figure 39. AD8051/AD8052 Capacitive Load Drive vs.
Closed-Loop Gain

8
6
4
2
0

22

GAIN – dB

24

VS = +5V

26

G = +1
R

= 2kV

L

28

C

= 50pF

L

V

= 200mV p-p

O

210

0.1 1 10 100
FREQUENCY – MHz

500

Figure 37. AD8051/AD8052 Closed-Loop Frequency
Response: C

= 50 pF

L

1000

VS = +5V
# 30%

OVERSHOOT

RS = 10V

R

50V

RS = 0V

R

G

F

R

S

V

OUT

C

L

100

CAPACITIVE LOAD – pF

10

162345

V

IN

100mV STEP

ACL – V/V

Figure 40. AD8054 Capacitive Load Drive vs. Closed-Loop
Gain

Circuit Description

The AD8051/AD8052/AD8054 is fabricated on Analog Devices’
proprietary eXtra-Fast Complementary Bipolar (XFCB) pro­cess, which enables the construction of PNP and NPN transis­tors with similar f

s in the 2 GHz–4 GHz region. The process is

T

dielectrically isolated to eliminate the parasitic and latch-up

–12–

REV. B

AD8051/AD8052/AD8054

problems caused by junction isolation. These features allow the
construction of high frequency, low distortion amplifiers with low
supply currents. This design uses a differential output input stage
to maximize bandwidth and headroom (see Figure 1). The smaller
signal swings required on the first stage outputs (nodes S1P, S1N)
reduce the effect of nonlinear currents due to junction capacitances
and improve the distortion performance. With this design har-

monic distortion of –80 dBc @ 1 MHz into 100 Ω with V

OUT

=

2 V p-p (Gain = +1) on a single 5 V supply is achieved.

The inputs of the device can handle voltages from –0.2 V below
the negative rail to within 1 V of the positive rail. Exceeding
these values will not cause phase reversal; however, the input
ESD devices will begin to conduct if the input voltages exceed
the rails by greater than 0.5 V. During this overdrive condition,
the output stays at the rail.

The rail-to-rail output range of the AD8051/AD8052/AD8054
is provided by a complementary common-emitter output stage.
High output drive capability is provided by injecting all out­put stage predriver currents directly into the bases of the output
devices Q8 and Q36. Biasing of Q8 and Q36 is accomplished by
I8 and I5, along with a common-mode feedback loop (not
shown). This circuit topology allows the AD8051/AD8052 to drive
45 mA of output current and the AD8054 to drive 30 mA of out­put current with the outputs within 0.5␣ V of the supply rails.

V

VINP
VINN

V

CC

R26

Q4

R2

R15

Q1

Q13

Q2

C7

EE

Q40

R5

V

SIP

I10

R39

Q5

EE

SIN

Q11

Q3

R21

I2 I3

Q22

R3

Q25

Q39

Q51

R27

R23

Q7

Q21 Q27

Q24 Q47

I7

Q50

Q31

Q23

I11

I9

Q36

I5

V

EE

C3

V

OUT

C9

Q8

I8

V

CC

Figure 41. AD8051/AD8052 Simplified Schematic

to a minimum. Parasitic capacitance of less than 1 pF at the
inverting input can significantly affect high speed performance.

Stripline design techniques should be used for long signal traces
(greater than about 25 mm). These should be designed with a

characteristic impedance of 50 Ω or 75 Ω and be properly termi-

nated at each end.

Active Filters

Active filters at higher frequencies require wider bandwidth op
amps to work effectively. Excessive phase shift produced by
lower frequency op amps can significantly impact active filter
performance.

Figure 42 shows an example of a 2␣ MHz biquad bandwidth
filter that uses three op amps of an AD8054. Such circuits are
sometimes used in medical ultrasound systems to lower the
noise bandwidth of the analog signal before A/D conversion.
Please note that the unused amplifiers’ inputs should be tied to
ground.

R6

1kV

C1

50pF

R2

2kV

R1

3kV

V

IN

2

3

1

AD8054

R3

2kV

6
5

AD8054

R4

2kV

C2

50pF

R5

2kV

7

9

10

AD8054

13
12

8

V

OUT

14

Figure 42. 2␣ MHz Biquad Bandpass Filter Using AD8054

The frequency response of the circuit is shown in Figure 43.

0

210

220

APPLICATIONS
Layout Considerations

The specified high speed performance of the AD8051/AD8052/
AD8054 requires careful attention to board layout and compo­nent selection. Proper RF design techniques and low-parasitic
component selection are necessary.

The PCB should have a ground plane covering all unused por­tions of the component side of the board to provide a low im­pedance path. The ground plane should be removed from the
area near the input pins to reduce the parasitic capacitance.

Chip capacitors should be used for the supply bypassing. One
end should be connected to the ground plane and the other

within 3 mm of each power pin. An additional large (4.7␣ µF to
10 µF) tantalum electrolytic capacitor should be connected in

parallel, but not necessarily so close, to supply current for fast,
large signal changes at the output.

The feedback resistor should be located close to the inverting
input pin in order to keep the parasitic capacitance at this node

REV. B

–13–

GAIN – dB

230

240

10k 100M100k 1M 10M

FREQUENCY – Hz

Figure 43. Frequency Response of 2␣ MHz Bandpass
Biquad Filter

A/D and D/A Applications

Figure 44 is a schematic showing the AD8051 used as a driver
for an AD9201, a 10-bit 20 MSPS dual A/D converter. This
converter is designed to convert I and Q signals in communica­tion systems. In this application, only the I channel is being
driven. The I channel is enabled by applying a logic HIGH to
SELECT, Pin 27.

The AD8051 is running from a dual supply and is configured

for a gain of +2. The input signal is terminated in 50 Ω and

AD8051/AD8052/AD8054

0.33mF

50V

+5V

AD8051

0.1mF

10mF

0.01mF

22V

1kV

22V

0.1mF

0.1mF

1kV

25V

0.1mF

10mF

15V

10mF

10mF 0.1mF

1kV

0.1mF

22V

Figure 44. AD8051 Driving an AD9201, a 10-Bit 20 MSPS A/D Converter

applied to the noninverting input of the AD8051. The amplifier
output is 2 V p-p, which is the maximum input range of the

AD9201. The 22 Ω series resistor limits the maximum current

that flows and helps to lower the distortion of the A/D.

The AD9201 has differential inputs for each channel. These are
designated the A and B inputs. The B inputs of each channel are
connected to VREF (Pin 8) which supplies a positive reference
of 2.5 V. Each of the B inputs has a small low pass filter that
also helps to reduce distortion.

The output of the op amp is ac coupled into INA-I (Pin 2) via
two parallel capacitors to provide good high frequency and low

frequency coupling. The 1 kΩ resistor references the signal to

VREF that is applied to INB-I. Thus, INA-I will swing both

22V

0.1mF

22V

10pF

10pF

0.1mF10mF

0.1mF10mF0.1mF

10pF

SLEEP
INA-I

INB-I

REFT-I
REFB-I

AVSS
REFSENSE
V

REF

AVDD

REFB-Q
REFT-Q

INB-Q

AD9201

CLK

SELECT

D9
D8
D7
D6
D5
D4
D3
D2
D1

D0

DVDD

DVSS

1V

DD

DATA OUT

15V

10mF0.1mF

INA-Q

10pF

THREE–STATE

positive and negative with respect to the bias voltage applied to
INB-I.

With the sampling clock running at 20 MSPS, the A/D output
was analyzed with a digital analyzer. Two input frequencies
were used, 1 MHz and 9.5 MHz, which is just short of the
Nyquist frequency. These signals were well filtered to minimize
any harmonics.

Figure 45 shows the FFT response of the A/D for the case of
1 MHz analog input. The SFDR is 71.66 dB and the A/D is
producing 8.8 ENOB (effective number of bits). When the
analog frequency was raised to 9.5 MHz, the SFDR was re­duced to 60.18 dB and the A/D operated with 8.46 ENOBs as
shown in Figure 46. The inclusion of the AD8051 in the circuit
had no worsening of the distortion performance of the AD9201.

10.0

25.0

210.0

215.0

220.0

225.0

230.0

235.0

240.0

245.0

250.0

255.0

260.0

265.0

270.0

275.0

280.0

285.0

290.0

295.0

2100.0

2105.0

2110.0

2115.0

2120.0

5.0

0.0

0.0E10

FUND

1.0E16

2ND

2.0E16

3RD

3.0E16

4TH

4.0E16

5TH

5.0E16

6TH

6.0E16

7TH

7.0E16

8TH

8.0E16

9.0E16

9TH

10.0E16

PART# 0

FFTSIZE 8192

FCLK
FUND
VIN
THD
SNR
SINAD
ENOB
SFDR
2ND
3RD
4TH
5TH
6TH
7TH
8TH
9TH

Figure 45. FFT Plot for AD8051 Driving the AD9201 at
1 MHz

20.0E16

998.5E13

20.51dB

268.13

54.97

54.76

8.80

271.66

274.53

276.06

276.35

279.05

280.36

275.08

288.12

277.87

10.0

25.0

210.0

215.0

220.0

225.0

230.0

235.0

240.0

245.0

250.0

255.0

260.0

265.0

270.0

275.0

280.0

285.0

290.0

295.0

2100.0

2105.0

2110.0

2115.0

2120.0

5.0

0.0

0.0E10

2ND

1.0E16

4TH

2.0E16

6TH

3.0E16

8TH

4.0E16

5.0E16

6.0E16

7TH

7.0E16

8.0E16

FUND

3RD

9.0E16

Figure 46. FFT Plot for AD8051 Driving the AD9201 at

9.5 MHz

–14–

10.0E16

PART#

FFTSIZE 8192

FCLK
FUND
VIN
THD
SNR
SINAD
ENOB
SFDR
2ND
3RD
4TH
5TH
6TH
7TH
8TH
9TH

REV. B

0

20.0E16

9.5E16

20.44dB

257.08

54.65

52.69

8.46

260.18

260.18

260.23

282.01

278.83

281.28

277.28

284.54

292.78

AD8051/AD8052/AD8054

Sync Stripper

Synchronizing pulses are sometimes carried on video signals so
as not to require a separate channel to carry the synchronizing
information. However, for some functions, like A/D conversion,
it is not desirable to have the sync pulses on the video signal.
These pulses will reduce the dynamic range of the video signal
and do not provide any useful information for such a function.

A sync stripper will remove the synchronizing pulses from a
video signal while passing all the useful video information. Fig­ure 47 shows a practical single supply circuit that uses only a
single AD8051. It is capable of directly driving a reverse termi­nated video line.

VIDEO WITHOUT SYNC

+

R2

1kV

0.1mF

10mF

100V

GROUND

TO A/D

V

BLANK

GROUND

VIDEO WITH SYNC

V

IN

(OR 2 3 V

+0.8V

R1
1kV

BLANK

+0.4V

AD8051

+3V OR +5V

)

Figure 47. Sync Stripper

The video signal plus sync is applied to the noninverting input
with the proper termination. The amplifier gain is set equal to

two via the two 1 kΩ resistors in the feedback circuit. A bias

voltage must be applied to R1 in order that the input signal has
the sync pulses stripped at the proper level.

The blanking level of the input video pulse is the desired place
to remove the sync information. This level is multiplied by two
by the amplifier. This level must be at ground at the output in
order for the sync stripping action to take place. Since the gain
of the amplifier from the input of R1 to the output is –1, a volt-

age equal to 2 × V

must be applied to make the blanking

BLANK

level come out at ground.

Single Supply Composite Video Line Driver

Many composite video signals have their blanking level at
ground and have video information that is both positive and
negative. Such signals require dual supply amplifiers to pass
them. However, by ac level shifting a single supply amplifier can
be used to pass these signals. The following complications may
arise from such techniques.

Signals of bounded peak-to-peak amplitude that vary in duty
cycle require larger dynamic swing capacity than their (bounded)
peak to peak amplitude after they are ac coupled. As a worst
case, the dynamic signal swing will approach twice the peak­to-peak value. The two conditions that define the maximum
dynamic wing requirements are a signal that is mostly low, but

goes high with a duty cycle that is a small fraction of a percent.
The opposite condition defines the other extreme.

The worst case of composite video is not quite this demanding.
One bounding condition is a signal that is mostly black for an
entire frame, but has a white (full amplitude) minimum width
spike at least once in a frame.

The other extreme is for a full white video signal. The blanking
intervals and sync tips of such a signal will have negative-going
excursions is compliance with the composite video specifica­tions. The combination of horizontal and vertical blanking inter­vals limit such a signal to being at the highest (white) level for a
maximum of about 75% of the time.

As a result of the duty cycles between the two extremes pre­sented above, a 1 V p-p composite video signal that is multiplied
by a gain of two requires about 3.2 V p-p of dynamic voltage
swing at the output for an op amp to pass a composite video
signal of arbitrary varying duty cycle without distortion.

Some circuits use a sync tip clamp to hold the sync tips at a
relatively constant level in order to lower the amount of dynamic
signal swing required. However, these circuits can have artifacts
like sync tip compression unless they are driven by a source with
a very low output impedance. The AD8051/AD8052/AD8054
have adequate signal swing when running on a single +5 V
supply to handle an ac coupled composite video signal.

The input to the circuit in Figure 48 is a standard composite
(1 V p-p) video signal that has the blanking level at ground. The
input network level shifts the video signal by means of ac cou­pling. The noninverting input of the op amp is biased to half of
the supply voltage.

The feedback circuit provides unity gain for the dc biasing of the
input, and provides a gain of two for any signals that are in the
video bandwidth. The output is ac coupled and terminated to
drive the line.

The capacitor values were selected for providing minimum “tilt”
or field time distortion of the video signal. These values would
be required for video that is considered to be studio or broad­cast quality. However, if a lower consumer grade of video,
sometimes referred to as “consumer video” is all that is desired,
the values and the cost of the capacitors can be reduced by as
much as a factor of five with minimum visible degradation in the
picture.

+5V

4.99kV

+

1kV

10mF

R

G

10mF

AD8051

220mF

R

1kV

0.1mF

F

+

1000mF

+

0.1mF

10mF

R

75V

BT

V

OUT

R

L

75V

COMPOSITE

VIDEO

IN

75V

R

T

4.99kV
47mF

+

Figure 48. Single Supply Composite Video Line Driver

REV. B

–15–

AD8051/AD8052/AD8054

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

0.1574 (4.00)

0.1497 (3.80)

0.0098 (0.25)

0.0040 (0.10)

SEATING

PLANE

0.122 (3.10)

0.114 (2.90)

0.006 (0.15)

0.002 (0.05)
SEATING

PLANE

0.1968 (5.00)

0.1890 (4.80)

8

PIN 1

0.0500
(1.27)

BSC

0.122 (3.10)

0.114 (2.90)

8

1

PIN 1

0.0256 (0.65) BSC

0.120 (3.05)

0.112 (2.84)

0.018 (0.46)

0.008 (0.20)

8-Lead SOIC

(SO-8)

5

0.2440 (6.20)

41

0.2284 (5.80)

0.0688 (1.75)

0.0532 (1.35)

0.0192 (0.49)

0.0138 (0.35)

0.0098 (0.25)

0.0075 (0.19)

8-Lead ␮SOIC

(RM-8)

5

0.199 (5.05)

0.187 (4.75)

4

0.043 (1.09)

0.037 (0.94)

0.011 (0.28)

0.003 (0.08)

0.0196 (0.50)

0.0099 (0.25)

8°
0°

0.0500 (1.27)

0.0160 (0.41)

0.120 (3.05)

0.112 (2.84)

33°
27°

x 45°

0.028 (0.71)

0.016 (0.41)

0.1574 (4.00)

0.1497 (3.80)

0.0098 (0.25)

0.0040 (0.10)

SEATING

PLANE

0.177 (4.50)

0.169 (4.30)

0.006 (0.15)

0.002 (0.05)

SEATING

PLANE

0.3444 (8.75)

0.3367 (8.55)

14 8

PIN 1

0.0500

0.0192 (0.49)

(1.27)

0.0138 (0.35)

BSC

14-Lead TSSOP

0.201 (5.10)

0.193 (4.90)

14 8

1

PIN 1

0.0118 (0.30)

0.0256
(0.65)

0.0075 (0.19)

BSC

14-Lead SOIC

(R-14)

0.2440 (6.20)

71

0.2284 (5.80)

0.0688 (1.75)

0.0532 (1.35)

0.0098 (0.25)

0.0075 (0.19)

(RU-14)

0.256 (6.50)

0.246 (6.25)

7

0.0433
(1.10)
MAX

0.0079 (0.20)

0.0035 (0.090)

0.0196 (0.50)

0.0099 (0.25)

8°
0°

0.0500 (1.27)

0.0160 (0.41)

8°
0°

C3139b–0–9/99

x 45°

0.028 (0.70)

0.020 (0.50)

0.0709 (1.800)

0.0590 (1.500)

0.0512 (1.300)

0.0354 (0.900)

0.0590 (0.150)

0.0000 (0.000)

PIN 1

5-Lead Plastic Surface Mount

(RT-5)

0.1220 (3.100)

0.1063 (2.700)

4 5

0.1181 (3.000)

1 3

2

0.0748 (1.900)
REF

0.0197 (0.500)

0.0118 (0.300)

0.0984 (2.500)

0.0374 (0.950) REF

0.0571 (1.450)

0.0354 (0.900)

SEATING
PLANE

10°

0°

0.0079 (0.200)

0.0035 (0.090)

0.0236 (0.600)

0.0039 (0.100)

–16–

PRINTED IN U.S.A.

REV. B