FEATURES
Wide BandwidthAD8047, G = +1 AD8048, G = +2
Small Signal250 MHz260 MHz
Large Signal (2 V p-p) 130 MHz160 MHz
5.8 mA Typical Supply Current
Low Distortion, (SFDR) Low Noise
–66 dBc typ @ 5 MHz
–54 dBc typ @ 20 MHz
5.2 nV/√
Drives 50 pF Capacitive Load
High Speed
Slew Rate 750 V/µs (AD8047), 1000 V/µs (AD8048)
Settling 30 ns to 0.01%, 2 V Step
±3 V to ±6 V Supply Operation
APPLICATIONS
Low Power ADC Input Driver
Differential Amplifiers
IF/RF Amplifiers
Pulse Amplifiers
Professional Video
DAC Current to Voltage Conversion
Baseband and Video Communications
Pin Diode Receivers
Active Filters/Integrators
PRODUCT DESCRIPTION
The AD8047 and AD8048 are very high speed and wide bandwidth amplifiers. The AD8047 is unity gain stable. The
AD8048 is stable at gains of two or greater. The AD8047 and
AD8048, which utilize a voltage feedback architecture, meet the
requirements of many applications that previously depended on
current feedback amplifiers.
A proprietary circuit has produced an amplifier that combines
many of the best characteristics of both current feedback and
voltage feedback amplifiers. For the power (6.6 mA max) the
AD8047 and AD8048 exhibit fast and accurate pulse response
(30 ns to 0.01%) as well as extremely wide small signal and
large signal bandwidth and low distortion. The AD8047
achieves –54 dBc distortion at 20 MHz and 250 MHz small signal and 130 MHz large signal bandwidths.
Hz (AD8047), 3.8 nV/√Hz (AD8048) Noise
Voltage Feedback Op Amps
AD8047/AD8048
FUNCTIONAL BLOCK DIAGRAM
8-Pin Plastic Mini-DIP (N), Cerdip (Q)
and SO (R) Packages
The AD8047 and AD8048’s low distortion and cap load drive
make the AD8047/AD8048 ideal for buffering high speed
ADCs. They are suitable for 12 bit/10 MSPS or 8 bit/60 MSPS
ADCs. Additionally, the balanced high impedance inputs of the
voltage feedback architecture allow maximum flexibility when
designing active filters.
The AD8047 and AD8048 are offered in industrial (–40°C to
+85°C) temperature ranges and are available in 8-pin plastic
DIP and SOIC packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Storage Temperature Range (N, R) . . . . . . . .–65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
The maximum power that can be safely dissipated by these devices is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature
of the plastic, approximately +150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a
change in the stresses exerted on the die by the package. Exceeding a junction temperature of +175°C for an extended period can
result in device failure.
While the AD8047 and AD8048 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150°C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves.
2.0
8-PIN MINI-DIP PACKAGE
1.5
1.0
0.5
MAXIMUM POWER DISSIPATION – Watts
0
–50 80
–40
8-PIN SOIC PACKAGE
0 10 –10 –20 –30 20 30 40 50 60 70
AMBIENT TEMPERATURE –
TJ = +150°C
°
C
90
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–IN
0.045
(1.14)
V
OUT
Figure 2. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
+IN
0.044
(1.13)
–V
S
Model RangeDescription Option*
TemperaturePackagePackage
AD8047AN–40°C to +85°CPlastic DIPN-8
AD8048
+V
S
AD8047AR–40°C to +85°CSOICR-8
AD8047-EBEvaluation
Board
AD8048AN–40°C to +85°CPlastic DIPN-8
AD8048AR–40°C to +85°CSOICR-8
Figure 15. AD8047 Small Signal Frequency Response
G = +1
0.1
0
–0.1
RL = 100Ω
–0.2
R
= 0Ω FOR DIP
F
= 66.5Ω FOR SOIC
R
F
–0.3
V
= 300mV p-p
OUT
–0.4
–0.5
OUTPUT – dBm
–0.6
–0.7
–0.8
–0.9
1M
FREQUENCY – Hz
1G100M10M
1
0
–1
RL = 100Ω
= 0Ω FOR DIP
R
F
–2
–3
–4
–5
OUTPUT – dBm
–6
–7
–8
–9
= 66.5Ω FOR SOIC
R
F
= 2V p-p
V
OUT
FREQUENCY – Hz
1G100M10M1M
Figure 18. AD8047 Large Signal Frequency Response,
G = +1
1
0
–1
RL = 100Ω
–2
R
= RIN = 200Ω
F
= 300mV p-p
V
–3
OUT
–4
–5
OUTPUT – dBm
–6
–7
–8
–9
FREQUENCY – Hz
1G100M10M1M
Figure 16. AD8047 0.1 dB Flatness, G = +1
70
60
50
40
30
20
GAIN – dB
10
0
–10
–20
–30
1k
GAIN
RL = 100Ω
100k1M100M
FREQUENCY – Hz
PHASE
MARGIN
100
80
60
40
20
0
–20
–40
PHASE MARGIN – Degrees
–60
–80
–100
1G10M10k
Figure 17. AD8047 Open-Loop Gain and Phase Margin vs.
Frequency
Figure 19. AD8047 Small Signal Frequency Response,
G = –1
–20
–30
–40
–50
–60
–70
–80
OUTPUT – dBm
–90
–100
–110
–120
RL = 1kΩ
= 2V p-p
V
OUT
2ND HARMONIC
3RD HARMONIC
10M
FREQUENCY – Hz
Figure 20. AD8047 Harmonic Distortion vs. Frequency,
G = +1
–6–
100M1M100k10k
REV. 0
Page 7
–20
SETTLING TIME – ns
0.5
0.4
–0.4
010
ERROR – %
20
0.0
–0.1
–0.2
–0.3
0.2
0.1
0.3
–0.5
5152535453040
RL = 100Ω
R
F
= 0Ω
V
OUT
= 2V STEP
17
13
3
100100k10k1k10
15
9
11
5
7
FREQUENCY – Hz
INPUT NOISE VOLTAGE – nV/√Hz
RL = 100Ω
–30
–40
–50
–60
–70
–80
–90
HARMONIC DISTORTION – dBc
–100
–110
–120
= 2V p-p
V
OUT
2ND HARMONIC
3RD HARMONIC
FREQUENCY – Hz
10M
AD8047/AD8048
100M1M100k10k
G = +1
Figure 22. AD8047 Harmonic Distortion vs. Output Swing,
G = +1
REV. 0
Figure 21. AD8047 Harmonic Distortion vs. Frequency,
–25
f = 20MHz
–30
R
= 1kΩ
L
RF = 0Ω
–35
–40
–45
–50
–55
HARMONIC DISTORTION – dBc
–60
–65
1.66.52.53.54.55.5
0.04
0.02
0.00
–0.02
DIFF GAIN – %
–0.04
0.04
0.02
0.00
–0.02
DIFF PHASE – Degrees
–0.04
3RD HARMONIC
2ND HARMONIC
OUTPUT SWING – V p-p
11th1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th
11th1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th
Figure 23. AD8047 Differential Gain and Phase Error,
G = +2, R
= 150 Ω, RF = 200 Ω, RIN = 200
L
Ω
Figure 24. AD8047 Short-Term Settling Time, G = +1
0.25
0.20
0.15
0.10
0.05
0.00
–0.05
ERROR – %
–0.10
–0.15
–0.20
–0.25
04
261014181216
8
SETTLING TIME – µs
RL = 100Ω
R
= 0Ω
F
V
= 2V STEP
OUT
Figure 25. AD8047 Long-Term Settling Time, G = +1
Figure 26. AD8047 Noise vs. Frequency
–7–
Page 8
AD8047/AD8048
–3
10M1G100M1M
5
1
3
–1
FREQUENCY – Hz
OUTPUT – dBm
6
4
0
2
–2
RL = 100Ω
R
F
= RIN = 200Ω
V
OUT
= 2V p-p
7
AD8048–Typical Characteristics
7
6
5
RL = 100Ω
R
= RIN = 200Ω
4
F
V
= 300mV p-p
OUT
3
2
1
OUTPUT – dBm
0
–1
–2
–3
10M1G100M1M
FREQUENCY – Hz
Figure 27. AD8048 Small Signal Frequency Response,
G = +2
6.5
6.4
RL = 100Ω
R
= RIN = 200Ω
6.3
6.2
6.1
6.0
5.9
OUTPUT – dBm
5.8
5.7
5.6
5.5
F
V
OUT
= 300mV p-p
10M1G100M1M
FREQUENCY – Hz
Figure 28. AD8048 0.1 dB Flatness, G = +2
90
80
70
60
50
40
GAIN – dB
–10
–20
30
20
10
0
10k100k1G100M10M1M
1k
RL = 100Ω
FREQUENCY – Hz
Figure 29. AD8048 Open-Loop Gain and Phase Margin vs.
Frequency
PHASE
100
80
60
40
20
0
–20
–40
PHASE – Degrees
–60
–80
–100
–120
Figure 30. AD8048 Large Signal Frequency Response,
G = +2
1
0
RL = 100Ω
–1
–2
–3
–4
–5
OUTPUT – dBm
–6
–7
–8
–9
= RIN = 200Ω
R
F
V
= 300mV p-p
OUT
10M1G100M1M
FREQUENCY – Hz
Figure 31. AD8048 Small Signal Frequency Response,
G = –1
–20
RL = 1kΩ
–30
–40
–50
–60
–70
–80
–90
–100
HARMONIC DISTORTION – dBc
–110
–120
= 2V p-p
V
OUT
2ND HARMONIC
3RD HARMONIC
FREQUENCY – Hz
10M
Figure 32. AD8048 Harmonic Distortion vs. Frequency,
G = +2
–8–
100M1M100k10k
REV. 0
Page 9
SETTLING TIME – ns
0.5
0.4
–0.4
010
ERROR – %
20
0.0
–0.1
–0.2
–0.3
0.2
0.1
0.3
–0.5
5152535453040
RL = 100Ω
RF = 200Ω
V
OUT
= 2V STEP
17
13
3
100100k10k1k10
15
9
11
5
7
FREQUENCY – Hz
INPUT NOISE VOLTAGE – nV/√Hz
–20
RL = 100Ω
–30
–40
–50
–60
–70
–80
–90
–100
HARMONIC DISTORTION – dBc
–110
–120
V
OUT
= 2V p-p
2ND HARMONIC
3RD HARMONIC
FREQUENCY – Hz
10M
AD8047/AD8048
100M1M100k10k
Figure 33. AD8048 Harmonic Distortion vs. Frequency,
G = +2
Figure 34. AD8048 Harmonic Distortion vs. Output Swing,
G = +2
REV. 0
–15
–20
–25
–30
–35
–40
–45
–50
–55
HARMONIC DISTORTION – dBc
–60
–65
–70
–0.02
DIFF GAIN – %
–0.04
–0.02
DIFF PHASE – Degrees
–0.04
f = 20MHz
R
= 1kΩ
L
RF = 200
2ND HARMONIC
1.55.52.53.54.56.5
0.04
0.02
0.00
0.04
0.02
0.00
OUTPUT SWING – Volts p-p
3RD HARMONIC
11th1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th
11th1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th
Figure 35. AD8048 Differential Gain and Phase Error,
G = +2, R
= 150 Ω, RF = 200 Ω, RIN = 200
L
Ω
Figure 36. AD8048 Short-Term Settling Time, G = +2
0.25
0.20
0.15
0.10
0.05
0.0
–0.05
ERROR – %
–0.10
–0.15
–0.20
–0.25
04
261014181216
8
SETTLING TIME – µs
RL = 100Ω
= 200Ω
R
F
= 2V STEP
V
OUT
Figure 37. AD8048 Long-Term Settling Time 2 V Step,
G = +2
Figure 38. AD8048 Noise vs. Frequency
–9–
Page 10
AD8047/AD8048–Typical Characteristics
100
0.01
1G
1
0.1
100k10k
10
100M10M1M
FREQUENCY – Hz
R
OUT
– Ω
90
70
60
50
40
30
20
10
0
3k10k100M1M100k
FREQUENCY – Hz
PSRR – dB
80
–PSRR
+PSRR
500M
100
90
80
70
60
CMRR – dB
50
40
30
20
FREQUENCY – Hz
∆VCM = 1V
R
L
100M
= 100Ω
Figure 39. AD8047 CMRR vs. Frequency
100
10
– Ω
1
OUT
R
100
90
80
70
60
CMRR – dB
50
40
30
1G10M1M100k
20
FREQUENCY – Hz
∆VCM = 1V
R
100M
= 100Ω
L
1G10M1M100k
Figure 42. AD8048 CMRR vs. Frequency
Figure 40. AD8047 Output Resistance vs. Frequency,
G = +1
PSRR – dB
0.1
0.01
90
80
70
60
50
40
30
20
10
0
10k100k1G100M10M1M
–PSRR
100k10k
FREQUENCY – Hz
+PSRR
FREQUENCY – Hz
100M10M1M
Figure 41. AD8047 PSRR vs. Frequency
1G
Figure 43. AD8048 Output Resistance vs. Frequency,
G = +2
Figure 44. AD8048 PSRR vs. Frequency,
G = +2
REV. 0–10–
Page 11
AD8047/AD8048
JUNCTION TEMPERATURE – °C
7.5
5.5
–60140–40 –20020406080 100 120
7.0
6.0
5.0
4.5
6.5
8.0
SUPPLY CURRENT – mA
±6V
±6V
±5V
±5V
AD8048
AD8047
AD8048
AD8047
4.1
3.9
3.7
3.5
3.3
3.1
2.9
OUTPUT SWING – Volts
2.7
2.5
2.3
–60140–40
–200204060 80 100 120
JUNCTION TEMPERATURE – °C
+V
OUT
–V
OUT
+V
OUT
–V
OUT
+V
OUT
–V
OUT
RL = 1kΩ
RL = 150Ω
RL = 50Ω
Figure 45. AD8047/AD8048 Output Swing vs. Temperature
2600
2400
2200
2000
1800
AD8048
83.0
82.0
81.0
80.0
79.0
CMRR – –dB
78.0
77.0
76.0
AD8047
AD8048
140–40–60120806040100200–20
JUNCTION TEMPERATURE – °C
Figure 48. AD8047/AD8048 CMRR vs. Temperature
1600
1400
OPEN-LOOP GAIN – V/V
1200
1000
–60140–40 –20020406080 100 120
JUNCTION TEMPERATURE – °C
AD8047
Figure 46. AD8047/AD8048 Open-Loop Gain vs.
Temperature
94
92
90
88
86
84
PSRR – –dB
82
80
78
76
–60
Figure 47. AD8047/AD8048 PSRR vs. Temperature
+PSRR
AD8048
–PSRR
+PSRR
–PSRR
–40 –20020406080 100 120 140
JUNCTION TEMPERATURE – °C
AD8048
AD8047
AD8047
Figure 49. AD8047/AD8048 Supply Current vs.
Temperature
900
800
700
600
500
400
300
INPUT OFFSET VOLTAGE – µV
200
100
–60140–40 –200204060 80 100 120
JUNCTION TEMPERATURE – °C
AD8048
AD8047
Figure 50. AD8047/AD8048 Input Offset Voltage vs.
Temperature
REV. 0
–11–
Page 12
AD8047/AD8048
R
F
V
OUT
AD8047
C
F
C
I
I
I
THEORY OF OPERATION
General
The AD8047 and AD8048 are wide bandwidth, voltage feedback amplifiers. Since their open-loop frequency response follows the conventional 6 dB/octave roll-off, their gain bandwidth
product is basically constant. Increasing their closed-loop gain
results in a corresponding decrease in small signal bandwidth.
This can be observed by noting the bandwidth specification
between the AD8047 (gain of 1) and AD8048 (gain of 2).
Feedback Resistor Choice
The value of the feedback resistor is critical for optimum performance on the AD8047 and AD8048. For maximum flatness at a
gain of 2, R
When the AD8047 is configured as a unity gain follower, R
and R
F
should be set to 200 Ω for the AD8048.
G
F
should be set to 0 Ω (no feedback resistor should be used) for
the plastic DIP and 66.5 Ω for the SOIC.
+V
S
R
F
G = 1 +
R
TERM
G
3
AD8047/48
2
R
G
–V
V
IN
R
10µF
7
0.1µF
6
0.1µF
4
10µF
S
R
F
V
OUT
Figure 51. Noninverting Operation
+V
S
10µF
R
F
V
R
G = –
IN
TERM
R
G
R
G
7
3
AD8047/48
2
4
–V
S
R
0.1µF
0.1µF
F
6
10µF
V
OUT
Figure 52. Inverting Operation
When the AD8047 is used in the transimpedance (I to V) mode,
such as in photodiode detection, the value of R
capacitance (C
) are usually known. Generally, the value of R
I
selected will be in the kΩ range, and a shunt capacitor (C
across R
The value of C
will be required to maintain good amplifier stability.
F
required to maintain optimal flatness (<1 dB
F
and diode
F
)
F
Peaking) and settling time can be estimated as:
1/2
2
C
≅ (2 ω
where ω
F
is equal to the unity gain bandwidth product of the
O
OCIRF
[]
amplifier in rad/sec, and C
–1)/ω
is the equivalent total input
I
capacitance at the inverting input. Typically ω
2
R
O
F
= 800 × 10
O
6
rad/sec (see Open-Loop Frequency Response curve, Figure 17).
As an example, choosing R
C
to be 1.1 pF (Note: CI includes both source and parasitic
F
= 10 kΩ and C
F
= 5 pF, requires
I
circuit capacitance). The bandwidth of the amplifier can be
estimated using the C
F
calculated as:
f
3 dB
1. 6
≅
2 πR
FCF
For general voltage gain applications, the amplifier bandwidth
can be closely estimated as:
ω
f
≅
3 dB
2π 1+
O
R
F
R
G
This estimation loses accuracy for gains of +2/–1 or lower due
to the amplifier’s damping factor. For these “low gain” cases,
the bandwidth will actually extend beyond the calculated value
(see Closed-Loop BW plots, Figures 15 and 26).
As a rule of thumb, capacitor C
(R
FiRG
will not be required if:
F
)× CI≤
NG
4 ω
O
where NG is the Noise Gain (1 + RF/RG) of the circuit. For
most voltage gain applications, this should be the case.
Figure 53. Transimpedance Configuration
Pulse Response
Unlike a traditional voltage feedback amplifier, where the slew
speed is dictated by its front end dc quiescent current and gain
bandwidth product, the AD8047 and AD8048 provide “on demand” current that increases proportionally to the input “step”
signal amplitude. This results in slew rates (1000 V/µs) compa-
rable to wideband current feedback designs. This, combined
with relatively low input noise current (1.0 pA/√
Hz), gives the
AD8047 and AD8048 the best attributes of both voltage and
current feedback amplifiers.
Large Signal Performance
The outstanding large signal operation of the AD8047 and
AD8048 is due to a unique, proprietary design architecture.
F
In order to maintain this level of performance, the maximum
180 V-MHz product must be observed, (e.g., @ 100 MHz,
V
≤ 1.8 V p-p) on the AD8047 and 250 V-MHz product on
O
the AD8048.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 µF) will be required to provide the best
settling time and lowest distortion. A parallel combination of at
least 4.7 µF, and between 0.1 µF and 0.01 µF, is recommended.
Some brands of electrolytic capacitors will require a small series
damping resistor ≈4.7 Ω for optimum results.
Driving Capacitive Loads
The AD8047/AD8048 have excellent cap load drive capability
for high speed op amps as shown in Figures 55 and 57. However, when driving cap loads greater than 25 pF, the best frequency response is obtained by the addition of a small series
resistance. It is worth noting that the frequency response of the
–12–
REV. 0
Page 13
AD8047/AD8048
75Ω
CABLE
200Ω
200Ω
75Ω
CABLE
75Ω
75Ω
V
OUT
+V
S
–V
S
75Ω
V
IN
0.1µF
10µF
AD8047/
AD8048
3
2
7
0.1µF
10µF
4
6
circuit when driving large capacitive loads will be dominated by
the passive roll-off of R
AD8047
SERIES
R
F
and CL.
R
SERIES
1kΩ
R
L
C
L
Figure 54. Driving Capacitive Loads
500mV
5ns
(1000 V/µs) give higher performance capabilities to these appli-
cations over previous voltage feedback designs.
With a settling time of 30 ns to 0.01% and 13 ns to 0.1%, the
devices are an excellent choice for DAC I/V conversion. The
same characteristics along with low harmonic distortion make
them a good choice for ADC buffering/amplification. With superb linearity at relatively high signal frequencies, the AD8047
and AD8048 are ideal drivers for ADCs up to 12 bits.
Operation as a Video Line Driver
The AD8047 and AD8048 have been designed to offer outstanding performance as video line drivers. The important
specifications of differential gain (0.01%) and differential phase
(0.02°) meet the most exacting HDTV demands for driving
video loads.
Figure 55. AD8047 Large Signal Transient Response;
= 2 V p-p, G = +1, RF = 0 Ω, R
V
O
R
F
= 0 Ω, CL = 27 pF
SERIES
Figure 58. Video Line Driver
Active Filters
The wide bandwidth and low distortion of the AD8047 and
R
R
IN
AD8048
SERIES
1kΩ
R
L
C
L
AD8048 are ideal for the realization of higher bandwidth active
filters. These characteristics, while being more common in many
current feedback op amps, are offered in the AD8047 and AD8048
in a voltage feedback configuration. Many active filter configurations are not realizable with current feedback amplifiers.
A multiple feedback active filter requires a voltage feedback
Figure 56. Driving Capacitive Loads
amplifier and is more demanding of op amp performance than
other active filter configurations such as the Sallen-Key. In
general, the amplifier should have a bandwidth that is at least
ten times the bandwidth of the filter if problems due to phase
shift of the amplifier are to be avoided.
Figure 59 is an example of a 20 MHz low pass multiple feedback active filter using an AD8048.
+5V
C1
50pF
R3
2
AD8048
100Ω
3
500mV
5ns
R4
154Ω
R1
154Ω
V
IN
C2
100pF
78.7Ω
Figure 57. AD8048 Large Signal Transient Response;
V
= 2 V p-p, G = +2, RF = RIN = 200 Ω, R
O
= 27 pF
C
L
APPLICATIONS
The AD8047 and AD8048 are voltage feedback amplifiers well
suited for such applications as photodetectors, active filters, and
log amplifiers. The devices’ wide bandwidth (260 MHz), phase
margin (65°), low noise current (1.0 pA/√
REV. 0
Hz), and slew rate
SERIES
= 0 Ω,
Figure 59. Active Filter Circuit
Choose:
= Cutoff Frequency = 20 MHz
F
O
α = Damping Ratio = 1/Q = 2
–13–
–5V
10µF
0.1µF
1
7
6
0.1µF
5
4
10µF
V
OUT
Page 14
AD8047/AD8048
H = Absolute Value of Circuit Gain =
Then:
k =2 π F
4 C1(H + 1)
C2 =
R1 =
R3 =
R 4 = H ( R1)
α
2 HK
2 K (H +1)
A/D Converter Driver
As A/D converters move toward higher speeds with higher resolutions, there becomes a need for high performance drivers that
will not degrade the analog signal to the converter. It is desirable from a system’s standpoint that the A/D be the element in
the signal chain that ultimately limits overall distortion. This
places new demands on the amplifiers used to drive fast, high
resolution A/Ds.
With high bandwidth, low distortion and fast settling time the
AD8047 and AD8048 make high performance A/D drivers for
advanced converters. Figure 60 is an example of an AD8047
used as an input driver for an AD872, a 12-bit, 10 MSPS A/D
converter.
Layout Considerations
The specified high speed performance of the AD8047 and
AD8048 requires careful attention to board layout and component selection. Proper RF design techniques and low pass parasitic component selection are mandatory
+5V ANALOG
1
2
ANALOG IN
AD8047
3
4
–5V
ANALOG
–R4
= 1
R1
C1
O
2
α
α
+5V ANALOG
4
AV
0.1µF
10µF
0.1µF
7
6
0.1µF
5
10µF
0.1µF
1µF
5
1
2
27
28
26
DD
AGND
V
INA
V
INB
REF GND
REF IN
REF OUT
0.1µF
The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Chip capacitors should be used for the supply bypassing (see
Figure 60). One end should be connected to the ground plane
and the other within 1/8 inch of each power pin. An additional
large (0.47 µF–10 µF) tantalum electrolytic capacitor should be
connected in parallel, though not necessarily so close, to supply
current for fast, large signal changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the inverting input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50 Ω or 75 Ω and be properly terminated at each end.
Evaluation Board
An evaluation board for both the AD8047 and AD8048 is available that has been carefully laid out and tested to demonstrate
that the specified high speed performance of the device can be
realized. For ordering information, please refer to the Ordering
Guide.
The layout of the evaluation board can be used as shown or
serve as a guide for a board layout.
+5V DIGITAL
10Ω
0.1µF
+5V DIGITAL
0.1µF
CLOCK INPUT
49.9Ω
DIGITAL OUTPUT
AD872
AV
SS
3
DV
DGND
DRV
DRGND
BIT10
BIT11
BIT12
AGND
AV
SS
CLK
OTR
MSB
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
25
DD
DD
0.1µF
7
6
22
23
21
20
19
18
17
16
15
14
13
12
11
10
9
8
24
–5V ANALOG
Figure 60. AD8047 Used as Driver for an AD872, a 12-Bit, 10 MSPS A/D Converter
–14–
REV. 0
Page 15
AD8047/AD8048
R
F
+V
R
G
NI
R
T
S
R
O
OUT
–V
S
+V
OPTIONAL
–V
S
S
C1
1000pFC30.1µF
C2
1000pFC40.1µF
C5
10µF
C6
10µF
Noninverting Configuration
Supply Bypassing
Figure 61. Noninverting Configurations for Evaluation Boards