Page 1
Low Power, 350 MHz
V
FEATURES
Low power: 1 mA quiescent current per amplifier
High speed
−3 dB bandwidth (G = +1): 350 MHz
Slew rate: 425 V/μs
Low cost
Low noise
8 nV/√Hz at 100 kHz
600 fA/√Hz at 100 kHz
Low input bias current: 750 nA maximum
Low distortion
−90 dB SFDR at 1 MHz
−65 dB SFDR at 5 MHz
Wide supply range: 3 V to 12 V
Small packaging: 8-lead SOIC
Supports defense and aerospace applications (AQEC standard)
Extended temperature range: −55°C to +105°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Battery-powered instrumentation
Filters
ADC drivers
Level shifting
Buffering
Photo multipliers
Voltage Feedback Amplifier
AD8039-EP
FUNCTIONAL BLOCK DIAGRAM
AD8039-EP
1
OUT1
2
–IN1
+IN1
3
–V
4
S
Figure 1. 8-Lead SOIC_N
24
G = +10
21
18
15
G = +5
12
9
G = +2
GAIN (dB)
6
3
G = +1
0
–3
–6
FREQUENCY (MHz)
Figure 2. Small Signal Frequency Response for Various Gains,
= 500 mV p-p, VS = ±5 V
V
OUT
8
+V
S
V
7
OUT2
–IN2
6
+IN2
5
09557-001
10000.1 1 10 100
9557-002
GENERAL DESCRIPTION
The AD8039-EP dual amplifier is a high speed (350 MHz) voltage
feedback amplifier with an exceptionally low quiescent current
of 1.0 mA per amplifier typical (1.5 mA maximum). Despite its
low power and low cost, the amplifier provides excellent overall
performance. Additionally, it offers a high slew rate of 425 V/μs
and a low input offset voltage of 3 mV maximum.
The Analog Devices, Inc., proprietary XFCB process allows low
noise operation (8 nV/√Hz and 600 fA/√Hz) at extremely low
quiescent currents. Given its wide supply voltage range (3 V to
12 V), wide bandwidth, and small packaging, the AD8039-EP
amplifier is designed to work in a variety of applications where
power and space are at a premium.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
The AD8039-EP amplifier has a wide input common-mode range
of 1 V from either rail and swings to within 1 V of each rail on the
output. This amplifier is optimized for driving capacitive loads up
to 20 pF. If driving larger capacitive loads, a small series resistor
is needed to avoid excessive peaking or overshoot.
The AD8039-EP amplifier is available in an 8-lead SOIC package
and is rated to work over the extended temperature range of
−55°C to +105°C.
Additional application and technical information can be found in
the AD8038/AD8039 data sheet.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
Page 2
AD8039-EP
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
REVISION HISTORY
2/11—Revision 0: Initial Version
Absolute Maximum Ratings ............................................................5
Maximum Power Dissipation ......................................................5
Output Short Circuit .....................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions ..........................................................................7
Ordering Guide .............................................................................7
Rev. 0 | Page 2 of 8
Page 3
AD8039-EP
SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 2 kΩ, gain = +1, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, V
G = +2, V
G = +1, V
Bandwidth for 0.1 dB Flatness G = +2, V
Slew Rate G = +1, V
T
MIN
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, V
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, V
Third Harmonic fC = 1 MHz, V
Second Harmonic fC = 5 MHz, V
Third Harmonic fC = 5 MHz, V
Crosstalk, Output-to-Output f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage TA = 25°C 0.5 3 mV
T
MIN
Input Offset Voltage Drift 4.5 µV/°C
Input Bias Current TA = 25°C 400 750 nA
T
MIN
Input Bias Current Drift 3 nA/°C
Input Offset Current ±25 nA
Open-Loop Gain V
OUT
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ ±4 V
Common-Mode Rejection Ratio VCM = ±2.5 V, TA = 25°C 61 67 dB
V
= ±2.5 V, T
CM
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output ±4 V
Capacitive Load Drive 30% overshoot, G = +2 20 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current per Amplifier TA = 25°C 1.0 1.5 mA
T
MIN
Power Supply Rejection Ratio
−Supply TA = 25°C 71 77 dB
T
MIN
+Supply TA = 25°C 64 70 dB
T
MIN
= 0.5 V p-p, T
OUT
= 0.5 V p-p 175 MHz
OUT
= 2 V p-p 100 MHz
OUT
= 0.2 V p-p 45 MHz
OUT
= 2 V step, RL = 2 kΩ 400 425 V/µs
OUT
to T
300 325 V/µs
MAX
= 2 V step 18 ns
OUT
= 2 V p-p, RL = 2 kΩ −90 dBc
OUT
= 2 V p-p, RL = 2 kΩ −92 dBc
OUT
= 2 V p-p, RL = 2 kΩ −65 dBc
OUT
= 2 V p-p, RL = 2 kΩ −70 dBc
OUT
to T
4.5 mV
MAX
to T
2.0 µA
MAX
MIN
to T
300 350 MHz
MAX
= ±2.5 V 70 dB
to T
MIN
to T
2.6 mA
MAX
to T
63 dB
MAX
to T
63 dB
MAX
Rev. 0 | Page 3 of 8
59 dB
MAX
Page 4
AD8039-EP
TA = 25°C, VS = 5 V, RL = 2 kΩ to VS/2, gain = +1, unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, V
G = +2, V
G = +1, V
Bandwidth for 0.1 dB Flatness G = +2, V
Slew Rate G = +1, V
T
MIN
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, V
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, V
Third Harmonic fC = 1 MHz, V
Second Harmonic fC = 5 MHz, V
Third Harmonic fC = 5 MHz, V
Crosstalk, Output-to-Output f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage TA = 25°C 0.8 3 mV
T
MIN
Input Offset Voltage Drift 3 V/°C
Input Bias Current TA = 25°C 400 750 nA
T
MIN
Input Bias Current Drift 3 nA/°C
Input Offset Current ±30 nA
Open-Loop Gain V
OUT
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ 1.0 to 4.0 V
Common-Mode Rejection Ratio VCM = ±1 V, TA = 25°C 59 65 dB
V
= ±1 V, T
CM
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output 0.9 to 4.1 V
Capacitive Load Drive 30% overshoot, G = +2 20 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current per Amplifier TA = 25°C 0.9 1.5 mA
Power Supply Rejection Ratio T
MIN
= 0.2 V p-p, T
OUT
= 0.2 V p-p 150 MHz
OUT
= 2 V p-p 30 MHz
OUT
= 0.2 V p-p 45 MHz
OUT
= 2 V step, RL = 2 kΩ 340 365 V/µs
OUT
to T
275 305 V/µs
MAX
= 2 V step 18 ns
OUT
= 2 V p-p, RL = 2 kΩ −82 dBc
OUT
= 2 V p-p, RL = 2 kΩ −79 dBc
OUT
= 2 V p-p, RL = 2 kΩ −60 dBc
OUT
= 2 V p-p, RL = 2 kΩ −67 dBc
OUT
to T
4.5 mV
MAX
to T
2.0 µA
MAX
MIN
to T
275 300 MHz
MAX
= ±2.5 V 70 dB
to T
MIN
to T
65 71 dB
MAX
59 dB
MAX
Rev. 0 | Page 4 of 8
Page 5
AD8039-EP
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 12.6 V
Power Dissipation See Figure 3
Common-Mode Input Voltage ±VS
Differential Input Voltage ±4 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −55°C to +105°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8039-EP
package is limited by the associated rise in junction temperature
(T
) on the die. The plastic encapsulating the die locally reaches
J
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8039-EP.
Exceeding a junction temperature of 175°C for an extended
time can result in changes in the silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θ
ambient temperature (T
package (P
) determine the junction temperature of the die.
D
), and total power dissipated in the
A
The junction temperature can be calculated as
T
= TA + (PD × θJA)
J
The power dissipated in the package (P
) is the sum of the quies-
D
cent power dissipation and the power dissipated in the package
due to the load drive for all outputs. The quiescent power is the
voltage between the supply pins (V
current (I
the total drive power is V
). Assuming the load (RL) is referenced to midsupply,
S
/2 × I
S
the package and some in the load (V
) multiplied by the quiescent
S
, some of which is dissipated in
OUT
× I
OUT
). The difference
OUT
between the total drive power and the load power is the drive
power dissipated in the package.
P
= quiescent power + (total drive power − load power)
D
P
= [VS × IS] + [(VS/2) × (V
D
OUT/RL
)] − [V
OUT
2
/RL]
),
JA
RMS output voltages should be considered. If RL is referenced to
−V
V
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads from metal traces, throughholes, ground, and power
planes reduces θ
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC_N
(125°C/W) on a JEDEC standard 4-layer board. θ
approximations.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current
from the AD8039-EP will likely cause a catastrophic failure.
ESD CAUTION
2.0
1.5
8-LEAD
SOIC_N
1.0
0.5
MAXIMUM POWER DISSIPATI O N (W )
0
–55
–25 5 35 65 95 125
AMBIENT TE M P ERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
, as in single-supply operation, then the total drive power is
S
× I
. If the rms signal levels are indeterminate, consider the
S
OUT
= VS/4 for RL to midsupply.
OUT
= (VS × IS) + (VS/4)2/RL
P
D
referenced to −VS, worst case
L
= VS/2.
OUT
.
JA
values are
JA
09557-003
.
JA
Rev. 0 | Page 5 of 8
Page 6
AD8039-EP
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±5 V, CL = 5 pF, RG = RF = 1 kΩ, RL = 2 kΩ, frequency = 1 MHz, TA = −55°C to +105°C, unless otherwise noted.
2.0
1.5
1.0
0.5
0
–0.5
GAIN (dB)
–1.0
–1.5
–2.0
–2.5
–3.0
0.1
1 10 100
FREQUENCY ( M Hz )
–40°C
–55°C
+25°C
+105°C
Figure 4. Small Signal Frequency Response vs. Temperature,
Gain = +1, V
= ±5 V, V
S
= 500 mV p-p
OUT
+85°C
1000
09557-004
12
9
6
3
GAIN (dB)
0
–3
–6
0.1
1 10 100
FREQUENCY (M Hz )
+25°C
+105°C
Figure 5. Large Signal Frequency Response vs. Temperature,
Gain = +2, V
= ±5 V, V
S
= 2 V p-p
OUT
–55°C
1000
09557-005
Rev. 0 | Page 6 of 8
Page 7
AD8039-EP
OUTLINE DIMENSIONS
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.
85
1
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
BSC
6.20 (0.2441)
5.80 (0.2284)
4
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
45°
012407-A
Figure 6. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
1
Model
AD8039SRZ-EPR7 −55°C to +105°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
1
Z = RoHS Compliant Part.
Temperature Range Package Description Package Option
Rev. 0 | Page 7 of 8
Page 8
AD8039-EP
NOTES
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09557-0-2/11(0)
Rev. 0 | Page 8 of 8
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