Datasheet AD8013AR-14-REEL7, AD8013AR-14-REEL, AD8013AR-14, AD8013AN, AD8013ACHIPS Datasheet (Analog Devices)
Page 1
REV. A
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Single Supply, Low Power,
Triple Video Amplifier
FEATURES
Three Video Amplifiers in One Package
Drives Large Capacitive Load
Excellent Video Specifications (R
L
= 150 V)
Gain Flatness 0.1 dB to 60 MHz
0.02% Differential Gain Error
0.06° Differential Phase Error
Low Power
Operates on Single +5 V to +13 V Power Supplies
4 mA/Amplifier Max Power Supply Current
High Speed
140 MHz Unity Gain Bandwidth (3 dB)
Fast Settling Time of 18 ns (0.1%)
1000 V/ms Slew Rate
High Speed Disable Function per Channel
Turn-Off Time 30 ns
Easy to Use
95 mA Short Circuit Current
Output Swing to Within 1 V of Rails
APPLICATIONS
LCD Displays
Video Line Driver
Broadcast and Professional Video
Computer Video Plug-In Boards
Consumer Video
RGB Amplifier in Component Systems
AD8013
PIN CONFIGURATION
14-Pin DIP & SOIC Package
1
2
3
4
5
6
7
14
13
12
11
10
9
8
AD8013
OUT 2
–IN 2
+IN 2
–V
S
+IN 3
–IN 3
OUT 3
DISABLE 1
DISABLE 2
DISABLE 3
+V
S
+IN 1
–IN 1
OUT 1
PRODUCT DESCRIPTION
The AD8013 is a low power, single supply, triple video
amplifier. Each of the three amplifiers has 30 mA of output
current, and is optimized for driving one back terminated video
load (150 Ω) each. Each amplifier is a current feedback amplifier and features gain flatness of 0.1 dB to 60 MHz while offering
FREQUENCY – Hz
–0.5
1M
1G
10M
NORMALIZED GAIN – dB
100M
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
G = +2
R
L
= 150Ω
VS = ± 5V
VS = +5V
Fine-Scale Gain Flatness vs. Frequency, G = +2, RL= 150
Ω
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
differential gain and phase error of 0.02% and 0.06°. This
makes the AD8013 ideal for broadcast and professional video
electronics.
The AD8013 offers low power of 4 mA per amplifier max and
runs on a single +5 V to +13 V power supply. The outputs of
each amplifier swing to within one volt of either supply rail to
easily accommodate video signals. The AD8013 is unique
among current feedback op amps by virtue of its large capacitive
load drive. Each op amp is capable of driving large capacitive
loads while still achieving rapid settling time. For instance it
can settle in 18 ns driving a resistive load, and achieves 40 ns
(0.1%) settling while driving 200 pF.
The outstanding bandwidth of 140 MHz along with 1000 V/µs
of slew rate make the AD8013 useful in many general purpose
high speed applications where a single +5 V or dual power
supplies up to ±6.5 V are required. Furthermore the AD8013’s
high speed disable function can be used to power down the
amplifier or to put the output in a high impedance state. This
can then be used in video multiplexing applications. The
AD8013 is available in the industrial temperature range of
–40°C to +85°C.
1
0
0%
100
9
0
500ns
500mV
5V
Channel Switching Characteristics for a 3:1 Mux
Page 2
AD8013–SPECIFICA TIONS
Model AD8013A
Conditions V
S
Min Typ Max Units
DYNAMIC PERFORMANCE
Bandwidth (3 dB) No Peaking, G = +2 +5 V 100 125 MHz
No Peaking, G = +2 ±5 V 110 140 MHz
Bandwidth (0.1 dB) No Peaking, G = +2 +5 V 50 MHz
No Peaking, G = +2 ±5 V 60 MHz
Slew Rate 2 V Step +5 V 400 V/µs
6 V Step ±5 V 600 1000 V/µs
Settling Time to 0.1% 0 V to +2 V ±5 V 18 ns
4.5 V Step, C
LOAD
= 200 pF ±6 V 40 ns
R
LOAD
> 1 kΩ, RFB = 4 kΩ
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion f
C
= 5 MHz, RL = 1 k ±5 V –76 dBc
f
C
= 5 MHz, RL = 150 Ω±5 V –66 dBc
Input Voltage Noise f = 10 kHz +5 V, ±5 V 3.5 nV/√
Hz
Input Current Noise f = 10 kHz (–I
IN
) +5 V, ±5 V 12 pA/√Hz
Differential Gain (R
L
= 150 Ω) f = 3.58 MHz, G = +2 +5 V
1
0.05 %
±5 V 0.02 0.05 %
Differential Phase (R
L
= 150 Ω) f = 3.58 MHz, G = +2 +5 V
1
0.06 Degrees
±5 V 0.06 0.12 Degrees
DC PERFORMANCE
Input Offset Voltage T
MIN
to T
MAX
+5 V, ±5 V 2 5 mV
Offset Drift 7 µV/°C
Input Bias Current (–) +5 V, ± 5 V 2 10 µA
Input Bias Current (+) T
MIN
to T
MAX
+5 V, ±5 V 3 15 µA
Open-Loop Transresistance +5 V 650 800 kΩ
T
MIN
to T
MAX
550 kΩ
±5 V 800 k 1.1 M Ω
T
MIN
to T
MAX
650 kΩ
INPUT CHARACTERISTICS
Input Resistance +Input ±5 V 200 kΩ
–Input ±5 V 150 Ω
Input Capacitance ±5 V 2 pF
Input Common-Mode Voltage Range ±5 V 3.8 ±V
+5 V 1.2 3.8 +V
Common-Mode Rejection Ratio
Input Offset Voltage +5 V 52 56 dB
Input Offset Voltage ±5 V 52 56 dB
–Input Current +5 V, ±5 V 0.2 0.4 µA/V
+Input Current +5 V, ±5 V 5 7 µA/V
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 1 kΩ VOL–V
EE
0.8 1.0 V
V
CC–VOH
0.8 1.0 V
R
L
= 150 Ω VOL–V
EE
1.1 1.3 V
V
CC–VOH
1.1 1.3 V
Output Current +5 V 30 mA
±5 V 25 30 mA
Short-Circuit Current ±5 V 95 mA
Capacitive Load Drive ±5 V 1000 pF
MATCHING CHARACTERISTICS
Dynamic
Crosstalk G = +2, f = 5 MHz +5 V, ±5 V 70 dB
Gain Flatness Match f = 20 MHz ±5 V 0.1 dB
DC
Input Offset Voltage +5 V, ±5 V 0.3 mV
–Input Bias Current +5 V, ±5 V 1.0 µA
(@ TA = +258C, R
LOAD
= 150 V, unless otherwise noted)
–2–
REV. A
Page 3
AD8013
Model AD8013A
Conditions V
S
Min Typ Max Units
POWER SUPPLY
Operating Range Single Supply +4.2 +13 V
Dual Supply ±2.1 ±6.5 V
Quiescent Current/Amplifier +5 V 3.0 3.5 mA
± 5 V 3.4 4.0 mA
±6.5 V 3.5 mA
Quiescent Current/Amplifier Power Down +5 V 0.25 0.35 mA
± 5 V 0.3 0.4 mA
Power Supply Rejection Ratio
Input Offset Voltage V
S
= ±2.5 V to ±5 V 70 76 dB
–Input Current +5 V, ±5 V 0.03 0.2 µA/V
+Input Current +5 V, ±5 V 0.07 1.0 µA/V
DISABLE CHARACTERISTICS
Off Isolation f = 6 MHz +5 V, ±5 V –70 dB
Off Output Impedance G = +1 +5 V, ± 5 V 12 pF
Turn-On Time 50 ns
Turn-Off Time 30 ns
Switching Threshold –VS + xV 1.3 1.6 1.9 V
NOTES
1
The test circuit for differential gain and phase measurements on a +5 V supply is ac coupled.
Specifications subject to change without notice.
–3–
REV. A
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 V Total
Internal Power Dissipation
2
Plastic (N) . . . . . . . . . 1.6 Watts (Observe Derating Curves)
Small Outline (R) . . . . 1.0 Watts (Observe Derating Curves)
Input Voltage (Common Mode) . . Lower of ±V
S
or ±12.25 V
Differential Input Voltage . . . . . . . . Output ±6 V (Clamped)
Output Voltage Limit
Maximum . . . . . . . . . Lower of (+12 V from –V
S
) or (+VS)
Minimum . . . . . . . . . Higher of (–12.5 V from +V
S
) or (–VS)
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . .Observe Power Derating Curves
Storage Temperature Range
N and R Package . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD8013A . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Pin Plastic DIP Package: θJA = 75°C/Watt
14-Pin SOIC Package: θJA = 120°C/Watt
ORDERING GUIDE
Temperature Package Package
Model Range Description Options
AD8013AN –40°C to +85°C 14-Pin Plastic DIP N-14
AD8013AR-14 –40°C to +85°C 14-Pin Plastic SOIC R-14
AD8013AR-14-REEL –40°C to +85°C 14-Pin Plastic SOIC R-14
AD8013AR-14-REEL7 –40°C to +85°C 14-Pin Plastic SOIC R-14
AD8013ACHIPS –40°C to +85°C Die Form
Maximum Power Dissipation
The maximum power that can be safely dissipated by the AD8013
is limited by the associated rise in junction temperature. The
maximum safe junction temperature for the plastic encapsulated
parts is determined by the glass transition temperature of the
plastic, about 150°C. Exceeding this limit temporarily may
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of 175°C for an extended period can result in
device failure.
While the AD8013 is internally short circuit protected, this may
not be enough to guarantee that the maximum junction temperature is not exceeded under all conditions. To ensure proper
operation, it is important to observe the derating curves.
It must also be noted that in (noninverting) gain configurations
(with low values of gain resistor), a high level of input overdrive
can result in a large input error current, which may result in a
significant power dissipation in the input stage. This power
must be included when computing the junction temperature rise
due to total internal power.
MAXIMUM POWER DISSIPATION – Watts
AMBIENT TEMPERATURE – °C
2.5
2.0
0.5
–50 90–40 –30 –20 0 10 20 30 40 50 60 70 80
1.5
1.0
–10
TJ = +150°C
14-PIN DIP PACKAGE
14-PIN SOIC
Maximum Power Dissipation vs. Ambient Temperature
Page 4
AD8013
REV. A
–4–
METALIZATION PHOTO
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
+IN1
5
+v
s
4
DISABLE 3
3
2 DISABLE 2
1 DISABLE 1
14 OUT 2
–IN1 6
OUT1 7
OUT3 8
–IN3 9
10
+IN3
11
–V
S
12
+IN2
13
–IN2
0.071 (1.81)
0.044 (1.13)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8013 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
SUPPLY VOLTAGE – ± Volts
6
0
172
COMMON-MODE VOLTAGE RANGE – ± Volts
3456
5
4
3
2
1
Figure 1. Input Common-Mode Voltage Range vs.
Supply Voltage
SUPPLY VOLTAGE – ± Volts
12
0
172
OUTPUT VOLTAGE SWING – V p-p
3456
10
8
6
4
2
NO LOAD
RL = 150Ω
Figure 2. Output Voltage Swing vs. Supply Voltage
Page 5
–5–
REV. A
AD8013
LOAD RESISTANCE – Ω
10
8
0
10 10k100
OUTPUT VOLTAGE SWING – V p-p
1k
6
4
2
VS = ±5V
VS = +5V
Figure 3. Output Voltage Swing vs. Load Resistance
JUNCTION TEMPERATURE – °C
12
9
6
–60 140–40
SUPPLY CURRENT – mA
–20 0 20 40 60 80 100 120
11
10
8
7
VS = ± 5V
VS = +5V
Figure 4. Total Supply Current vs. Junction Temperature
SUPPLY VOLTAGE – ± Volts
11
7
SUPPLY CURRENT – mA
9
8
10
1723456
TA = +25°C
Figure 5. Supply Current vs. Supply Voltage
JUNCTION TEMPERATURE – °C
3
0
–3
–60 140–40
INPUT BIAS CURRENT – µA
–20 0 20 40 60 80 100 120
2
1
–1
–2
–I
B
+I
B
Figure 6. Input Bias Current vs. Junction Temperature
JUNCTION TEMPERATURE – °C
2
–1
–4
–60 140–40
INPUT OFFSET VOLTAGE – mV
–20 0 20 40 60 80 100 120
1
0
–2
–3
VS = +5V
VS = ±5V
Figure 7. Input Offset Voltage vs. Junction
Temperature
JUNCTION TEMPERATURE – °C
140
130
80
–60 140–40
SHORT CIRCUIT CURRENT – mA
–20 0 20 40 60 80 100 120
120
100
90
SOURCE
SINK
VS = ± 5V
Figure 8. Short Circuit Current vs. Junction
Temperature
Page 6
AD8013
REV. A
–6–
FREQUENCY – Hz
10
100k 1G1M
COMMON-MODE REJECTION – dB
10M 100M
70
60
20
50
40
30
V
CM
R
R
R
R
Figure 12. Common-Mode Rejection vs. Frequency
FREQUENCY – Hz
80
0
100k 1G1M 10M 100M
70
POWER SUPPLY REJECTION – dB
60
10
+PSR
20
30
40
50
–PSR
VS = ±5V
Figure 13. Power Supply Rejection Ratio vs. Frequency
FREQUENCY – Hz
120
40
100k 1G1M
TRANSIMPEDANCE – dB
10M 100M
100
80
60
0
–45
–90
–135
–180
PHASE – Degrees
140
10k
VS = ±5V
R
L
= 1k
Figure 14. Open-Loop Transimpedance vs. Frequency
(Relative to 1
Ω
)
FREQUENCY – Hz
1k
100
0.01
100k 1G1M
CLOSED-LOOP OUTPUT RESISTANCE – Ω
10M 100M
10
1
0.1
VS = ±5V
G = +2
Figure 9. Closed-Loop Output Resistance vs.
Frequency
FREQUENCY – Hz
100k
10k
10
1M 1G10M
OUTPUT RESISTANCE – Ω
100M
1k
100
Figure 10. Output Resistance vs. Frequency, Disabled
State
FREQUENCY – Hz
1k
100
1
100 1M1k
VOLTAGE NOISE nV/
√
Hz
10k 100k
10
1k
100
1
10
CURRENT NOISE pA/
√
Hz
NONINVERTING I
INVERTING I
V
NOISE
Figure 11. Input Current and Voltage Noise vs.
Frequency
Page 7
–7–
REV. A
AD8013
FREQUENCY – Hz
1k 100M10k
HARMONIC DISTORTION – dBc
100k 1M 10M
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
G = +2
V
O
= 2V p-p
V
S
= ±5V
2nd
R
L
= 150Ω
2nd
R
L
= 1kΩ
3rd
R
L
= 1kΩ
3rd
R
L
= 150Ω
Figure 15. Harmonic Distortion vs. Frequency
OUTPUT STEP SIZE – V p-p
18234567
1800
1600
SLEW RATE – V/µs
800
600
400
200
1200
1000
1400
VS = ±5V
R
L
= 500Ω
G = +10
G = –1
G = +2
G = +1
Figure 16. Slew Rate vs. Output Step Size
10
0%
100
90
20ns
2V
2V
V
IN
V
OUT
Figure 17. Large Signal Pulse Response, Gain = +1,
(R
F
= 2 kΩ, RL = 150 Ω, VS = ±5 V)
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
0
–90
–180
–270
PHASE SHIFT – Degrees
G = +1
R
L
= 150Ω
VS = ±5V
VS = +5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 18. Closed-Loop Gain and Phase vs. Frequency,
G = +1, R
L
= 150
Ω
SUPPLY VOLTAGE – ±Volts
2000
1.5 7.52.5
SLEW RATE – V/µs
3.5 4.5 5.5 6.5
1800
1200
600
400
200
1600
1400
1000
800
G = +10
G = –1
G = +2
G = +1
Figure 19. Maximum Slew Rate vs. Supply Voltage
10
0%
100
90
20ns
500mV
500mV
V
IN
V
OUT
Figure 20. Small Signal Pulse Response, Gain = +1,
(RF = 2 kΩ, RL = 150 Ω, VS = ±5 V)
Page 8
AD8013
REV. A
–8–
10
0%
100
90
20ns50mV
500mV
V
IN
V
OUT
Figure 21. Large Signal Pulse Response, Gain = +10,
R
F
= 301 Ω, RL = 150 Ω, VS = ±5 V)
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
0
–90
–180
–270
PHASE SHIFT – Degrees
G = +10
R
L
= 150Ω
VS = ±5V
VS = +5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 22. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 150
Ω
10
0%
100
90
20ns
50mV
500mV
V
IN
V
OUT
Figure 23. Small Signal Pulse Response, Gain = +10,
(R
F
= 301 Ω, RL = 150 Ω, VS = ±5 V)
10
0%
100
90
20ns2V
2V
V
IN
V
OUT
Figure 24. Large Signal Pulse Response, Gain = –1,
(RF = 698 Ω, RL = 150 Ω, VS = ±5 V)
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
0
90
180
–90
PHASE SHIFT – Degrees
G = –1
R
L
= 150Ω
VS = ±5V
VS = +5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 25. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 150
Ω
10
0%
100
90
20ns
500mV
500mV
V
IN
V
OUT
Figure 26. Small Signal Pulse Response, Gain = –1,
(R
F
= 698 Ω, RL = 150 Ω, VS = ±5 V)
Page 9
–9–
REV. A
AD8013
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
180
90
0
–90
PHASE SHIFT – Degrees
G = –10
R
L
= 150Ω
VS = ±5V
VS = +5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 27. Closed-Loop Gain and Phase vs. Frequency,
G = –10, R
L
= 150
Ω
To estimate the –3 dB bandwidth for closed-loop gains of 2 or
greater, for feedback resistors not listed in the following table,
the following single pole model for the AD8013 may be used:
ACL .
G
1+ SC
T(RF
+Gn rin)
where: CT = transcapacitance > 1 pF
R
F
= feedback resistor
G = ideal closed loop gain
Gn =
1+
R
F
R
G
= noise gain
rin = inverting input resistance > 150 Ω
ACL = closed loop gain
The –3 dB bandwidth is determined from this model as:
f
3
.
1
2 π C
T(RF
+Gn rin)
This model will predict –3 dB bandwidth to within about 10%
to 15% of the correct value when the load is 150 Ω and V
S
=
±5 V. For lower supply voltages there will be a slight decrease in
bandwidth. The model is not accurate enough to predict either
the phase behavior or the frequency response peaking of the
AD8013.
It should be noted that the bandwidth is affected by attenuation
due to the finite input resistance. Also, the open-loop output
resistance of about 12 Ω reduces the bandwidth somewhat when
driving load resistors less than about 250 Ω. (Bandwidths will
be about 10% greater for load resistances above a few hundred
ohms.)
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback
Resistor, R
L
= 150 Ω (SOIC)
VS – Volts Gain RF – Ohms BW – MHz
±5 +1 2000 230
+2 845 (931) 150 (135)
+10 301 80
–1 698 (825) 140 (130)
–10 499 85
+5 +1 2000 180
+2 887 (931) 120 (130)
+10 301 75
–1 698 (825) 130 (120)
–10 499 80
Driving Capacitive Loads
When used in combination with the appropriate feedback
resistor, the AD8013 will drive any load capacitance without
oscillation. The general rule for current feedback amplifiers is
that the higher the load capacitance, the higher the feedback
resistor required for stable operation. Due to the high open-loop
transresistance and low inverting input current of the AD8013,
the use of a large feedback resistor does not result in large closedloop gain errors. Additionally, its high output short circuit current
makes possible rapid voltage slewing on large load capacitors.
For the best combination of wide bandwidth and clean pulse
response, a small output series resistor is also recommended.
Table II contains values of feedback and series resistors which
result in the best pulse responses. Figure 29 shows the AD8013
driving a 300 pF capacitor through a large voltage step with
virtually no overshoot. (In this case, the large and small signal
pulse responses are quite similar in appearance.)
General
The AD8013 is a wide bandwidth, triple video amplifier that
offers a high level of performance on less than 4.0 mA per
amplifier of quiescent supply current. The AD8013 uses a
proprietary enhancement of a conventional current feedback
architecture, and achieves bandwidth in excess of 200MHz with
low differential gain and phase errors, making it an extremely
efficient video amplifier.
The AD8013’s wide phase margin coupled with a high output
short circuit current make it an excellent choice when driving
any capacitive load. High open-loop gain and low inverting
input bias current enable it to be used with large values of
feedback resistor with very low closed-loop gain errors.
It is designed to offer outstanding functionality and performance
at closed-loop inverting or noninverting gains of one or greater.
Choice of Feedback & Gain Resistors
Because it is a current feedback amplifier, the closed-loop bandwidth of the AD8013 may be customized using different values
of the feedback resistor. Table I shows typical bandwidths at
different supply voltages for some useful closed-loop gains when
driving a load of 150 Ω.
The choice of feedback resistor is not critical unless it is
important to maintain the widest, flattest frequency response.
The resistors recommended in the table are those (chip
resistors) that will result in the widest 0.1 dB bandwidth without
peaking. In applications requiring the best control of bandwidth,
1% resistors are adequate. Package parasitics vary between the
14-pin plastic DIP and the 14-pin plastic SOIC, and may result
in a slight difference in the value of the feedback resistor used to
achieve the optimum dynamic performance. Resistor values and
widest bandwidth figures are shown in parenthesis for the SOIC
where they differ from those of the DIP. Wider bandwidths than
those in the table can be attained by reducing the magnitude of
the feedback resistor (at the expense of increased peaking),
while peaking can be reduced by increasing the magnitude of
the feedback resistor.
Increasing the feedback resistor is especially useful when driving
large capacitive loads as it will increase the phase margin of the
closed-loop circuit. (Refer to the section on driving capacitive
loads for more information.)
Page 10
AD8013
REV. A
–10–
4
+V
S
AD8013
1.0µF
0.1µF
11
1.0µF
0.1µF
–V
S
R
G
R
T
V
IN
15Ω
C
L
V
O
R
F
R
S
Figure 28. Circuit for Driving a Capacitive Load
Table II. Recommended Feedback and Series Resistors vs.
Capacitive Load and Gain
RS – Ohms
CL – pF RF – Ohms G = 2 G ≥ 3
20 2k 25 15
50 2k 25 15
100 3k 20 15
200 4k 15 15
300 6k 15 15
≥500 7k 15 15
10
0%
100
90
50ns
500mV
1V
V
IN
V
OUT
Figure 29. Pulse Response Driving a Large Load Capacitor.
C
L
= 300 pF, G = +2, RF = 6k, RS = 15
Ω
Overload Recovery
The three important overload conditions are: input commonmode voltage overdrive, output voltage overdrive, and input
current overdrive. When configured for a low closed-loop gain,
the amplifier will quickly recover from an input commonmode voltage overdrive; typically in under 25 ns. When configured for a higher gain, and overloaded at the output, the
recovery time will also be short. For example, in a gain of +10,
with 15% overdrive, the recovery time of the AD8013 is about
20 ns (see Figure 30). For higher overdrive, the response is
somewhat slower. For 6 dB overdrive, (in a gain of +10), the
recovery time is about 65 ns.
10
0%
100
90
50ns
500mV
5V
V
IN
V
OUT
Figure 30. 15% Overload Recovery, G = +10 (RF = 300 Ω,
R
L
= 1 kΩ, VS = ±5 V)
As noted in the warning under “Maximum Power Dissipation,”
a high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. Though this
current is internally limited to about 30 mA, its effect on the
total power dissipation may be significant.
High Performance Video Line Driver
At a gain of +2, the AD8013 makes an excellent driver for a
back terminated 75 Ω video line (Figures 31, 32, and 33). Low
differential gain and phase errors and wide 0.1 dB bandwidth
can be realized. The low gain and group delay matching errors
ensure excellent performance in RGB systems. Figures 34 and
35 show the worst case matching.
75Ω
75Ω
V
OUT
75Ω
CABLE
75Ω
75Ω
CABLE
4
+V
S
AD8013
0.1µF
11
0.1µF
–V
S
R
G
V
IN
R
F
Figure 31. A Video Line Driver Operating at a Gain of +2
(R
F
= RG from Table I)
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
0
–90
–180
–270
PHASE SHIFT – Degrees
G = +2
R
L
= 150Ω
VS = ±5V
VS = +5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 32. Closed-Loop Gain & Phase vs. Frequency
for the Line Driver
FREQUENCY – Hz
1M 1G10M
NORMALIZED GAIN – dB
100M
+0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
G = +2
R
L
= 150Ω
VS = +5V
VS = ±5V
+0.2
Figure 33. Fine-Scale Gain Flatness vs. Frequency,
G = +2, R
L
= 150
Ω
Page 11
–11–
REV. A
AD8013
FREQUENCY – Hz
1.5
1.0
–2.0
1M 1G10M
GAIN MATCHING – dB
100M
0.5
0
–0.5
–1.0
–1.5
G = +2
RL = 150Ω
VS = +5V
VS = ±5V
Figure 34. Closed-Loop Gain Matching vs. Frequency
FREQUENCY – Hz
10
8
2
4
6
–1.0
0.5
0
–0.5
1.0
100k 100M1M
GROUP DELAY – ns
10M
VS = +5V
VS = ±5V
G = +2
RL = 150Ω
G = +2
RL = 150Ω
DELAY
MATCHING
DELAY
VS = +5V
VS = ±5V
Figure 35. Group Delay and Group Delay Matching
vs. Frequency, G = +2, R
L
= 150
Ω
Disable Mode Operation
Pulling the voltage on any one of the Disable pins about 1.6V
up from the negative supply will put the corresponding
amplifier into a disabled, powered down, state. In this
condition, the amplifier’s quiescent current drops to about
0.3 mA, its output becomes a high impedance, and there is
a high level of isolation from input to output. In the case of
the gain of two line driver for example, the impedance at the
output node will be about the same as for a 1.6 kΩ resistor
(the feedback plus gain resistors) in parallel with a 12 pF
capacitor and the input to output isolation will be about
66 dB at 5 MHz.
Leaving the Disable pin disconnected (floating) will leave
the corresponding amplifier operational, in the enabled
state. The input impedance of the disable pin is about 40 kΩ
in parallel with a few picofarads. When driven to 0 V, with
the negative supply at –5 V, about 100 µA flows into the
disable pin.
When the disable pins are driven by complementary output
CMOS logic, on a single 5 V supply, the disable and enable
times are about 50 ns. When operated on dual supplies,
level shifting will be required from standard logic outputs to
the Disable pins. Figure 36 shows one possible method
which results in a negligible increase in switching time.
+5V
10k
TO DISABLE PIN
V
I
VI HIGH => AMPLIFIER ENABLED
V
I
LOW => AMPLIFIER DISABLED
–5V
4k
8k
Figure 36. Level Shifting to Drive Disable Pins on Dual
Supplies
The AD8013’s input stages include protection from the large
differential input voltages that may be applied when disabled.
Internal clamps limit this voltage to about ±3 V. The high input to
output isolation will be maintained for voltages below this limit.
3:1 Video Multiplexer
Wiring the amplifier outputs together will form a 3:1 mux with
excellent switching behavior. Figure 37 shows a recommended
configuration which results in –0.1 dB bandwidth of 35 MHz
and OFF channel isolation of 60 dB at 10 MHz on ±5 V
supplies. The time to switch between channels is about 50 ns.
Switching time is virtually unaffected by signal level.
665Ω
75Ω
V
IN
1
84Ω
845Ω
DISABLE 1
V
OUT
75Ω
75Ω
CABLE
–V
S
7
654
+V
S
1
665Ω
75Ω
V
IN
2
84Ω
845Ω
DISABLE 2
14
13
12 2
665Ω
75Ω
V
IN
3
84Ω
845Ω
8
9
10
3
11
DISABLE 3
Figure 37. A Fast Switching 3:1 Video Mux (Supply
Bypassing Not Shown)
10
0%
100
90
200ns
500mV
5V
Figure 38. Channel Switching Characteristic for the
3:1 Mux
Page 12
AD8013
REV. A
–12–
C2084–18–10/95
PRINTED IN U.S.A.
2:1 Video Multiplexer
Configuring two amplifiers as unity gain followers and using the
third to set the gain results in a high performance 2:1 mux
(Figures 39 and 40). This circuit takes advantage of the very low
crosstalk between Channels 2 and 3 to achieve the OFF channel
isolation shown in Figure 40. This circuit can achieve
differential gain and phase of 0.03% and 0.07° respectively.
V
OUT
VINA
R1
2kΩ
VINB
R3
10Ω
R4
10Ω
R2
2kΩ
R5
845Ω
R6
845Ω
7
6
5
1
14
13
12
2
8
9
10
3
2
3
DISABLE
DISABLE
Figure 39. 2:1 Mux with High Isolation and Low
Differential Gain and Phase Errors
FREQUENCY – Hz
1G1M
CLOSED-LOOP GAIN – dB
100M
–8
–1
–2
–3
–4
–5
–6
–7
–40
–50
–60
–70
FEEDTHROUGH – dB
–80
0
1
2
–30
10M
GAIN
FEEDTHROUGH
Figure 40. 2:1 Mux ON Channel Gain and Mux OFF Channel
Feedthrough vs. Frequency
Gain Switching
The AD8013 can be used to build a circuit for switching between
any two arbitrary gains while maintaining a constant input
impedance. The example of Figure 41 shows a circuit for switching
between a noninverting gain of 1 and an inverting gain of 1. The
total time for channel switching and output voltage settling is
about 80 ns.
6
5
4
1
7
+5V
DIS 1
698Ω 698Ω
15Ω
V
OUT
10
9
3
11
8
–5V
DIS 3
845Ω
1k
845Ω
1k
2k
13
14
12
50Ω
100Ω
V
IN
Figure 41. Circuit to Switch Between Gains of –1 and +1
10
0%
100
90
200ns
500mV5V500mV
Figure 42. Switching Characteristic for Circuit of Figure 41
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Plastic DIP (N-14)
14
17
8
0.795 (20.19)
0.725 (18.42)
0.280 (7.11)
0.240 (6.10)
PIN 1
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
0.160 (4.06)
0.115 (2.93)
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
14-Lead SOIC (R-14)
14 8
71
0.3444 (8.75)
0.3367 (8.55)
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8°
0°
0.0196 (0.50)
0.0099 (0.25)
x 45°
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