Datasheet AD7400 Datasheet (Analog Devices)

Isolated Sigma-Delta Modulator

J

Preliminary Technical Data

FEATURES

Up to 20 MHz Data Rate (AD7401)
10 MHz Data Rate (AD7400)

nd

2

Order Modulator
±4 LSB INL @16 Bits
Onboard Digital Isolator
Onboard Reference
Low Power Operation:
15 mA @ 5 V

-40⬚C to +105⬚C Operating Range
16-ld SOIC Package
Safety and Regulatory Approvals
UL Recognition
3750 V
CSA Component Acceptance Notice ~5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950:2000
V

IORM

for 1 minute per UL 1577

RMS

= 840V

PEAK

V

FUNCTIONAL BLOCK DIAGRAM

DD1

AD7400/AD7401

APPLICATIONS
AC Motor Control
Data Acquisition Systems
A/D + Opto-Isolator Replacement

GENERAL DESCRIPTION

The AD7400/AD7401 are 2nd order sigma-delta modulators
that convert an analog input signal into a high speed 1-bit data
stream with onboard digital isolation based on Analog Devices’
iCoupler® technology. The AD7400/AD7401 operate from a 5 V
power supply and accept a differential input signal of ±200 mV.
The analog input is continuously sampled by the analog
modulator, eliminating the need for external sample and hold
circuitry. The input information is contained in the output
stream as a density of ones with data rates up to 20MHz. The
original information can be reconstructed with an appropriate
digital filter. The serial I/O may use a 5V or 3V supply (V

The serial interface is digitally isolated. High-speed CMOS,

V

DD2

DD2

).

VIN+

VIN-

T/H

BUF

REF

*MCLKIN pin on AD7401

Σ-∆ ADC

CONTROL LOGIC

UPDATE

ENCODE DECODE

UPDATE

ENCODE DECODE

GND1

Rev. Pr

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.

WATCHDOG

MDAT

WATCHDOG

MCLKOUT*

GND2

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

AD7400/AD7401 Preliminary Technical Data

combined with monolithic air core transformer technology, means the onboard isolation provides outstanding performance
characteristics superior to alternatives such as optocoupler devices. The parts provide an on-chip 2.5V reference. The AD7400/AD7401
are offered in a 16-lead SOIC package and have an operating temperature range of -40°C to +105°C.

TABLE OF CONTENTS

AD7400—Specifications.................................................................. 3

Pin Functional Descriptions........................................................8

AD7401—Specifications.................................................................. 4

TIMING SPECIFICATIONS1..................................................... 5

Absolute Maximum Ratings

1,3

......................................................... 6

REVISION HISTORY

Revision PrJ: Preliminary Version

Theory of Operation.....................................................................9

Outline Dimensions....................................................................... 10

Rev. PrJ | Page 2 of 10

Preliminary Technical Data AD7400/AD7401

AD7400—SPECIFICATIONS

Table 1. (V
otherwise noted.)

Parameter B Version

STATIC PERFORMANCE When Tested with Sinc3 Filter

Resolution

Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift vs. Temperature

Offset Drift vs. V
Absolute Reference Voltage Tolerance ±1 %min/max
V

Drift vs. Temperature2 60

REF

V

Drift vs. V

REF

ANALOG INPUT

Input Voltage Range
DC Leakage Current ±1 µA max

DYNAMIC SPECIFICATIONS When Tested with Sinc3 Filter

Signal to Noise + Distortion Ratio (SINAD) 2 70

Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Effective number of bits 12 Bits
Isolation Transient Immunity

Signal Delay 20

LOGIC OUTPUTS

Output High Voltage, VOH V
Output Low Voltage, VOL 0.4 V max IO = 20 µA

POWER REQUIREMENTS

V

+4.5/+5.5 Vmin/Vmax

DD1

V

+4.5/+5.5 Vmin/Vmax

DD2

+2.7/+3.3 Vmin/Vmax

7

I

18 mA max V

DD1

7

I

DD2

NOTES

1

Temperature ranges as follows: -40⬚C to +105⬚C

2

See Terminology section.

3

Sample tested @ 25⬚C to ensure compliance.

4

Filter as defined by Verilog Code.

5

All voltages are relative to their respective ground.

Specifications subject to change without notice.

= V

DD1

2

= 4.5V to 5.5V, , VIN+ = -200mV to +200mV and VIN- = 0V; TA = T

DD2

2

2

2

2

DD1

2

0.2 % typ

DD1

2

1

to T

MIN

1,5

Units Test Conditions/Comments

16 Bits min Filter output truncated to 16 Bits
±4 LSB max
±0.9 LSB max Guaranteed No Missed Codes to 15 bits
±0.5 mV max Bipolar Input Range
5
2

µV/⬚C max
µV/⬚C typ

0.05 mV/V typ

ppm/⬚C typ

±200 mV min/max For specified performance. Full range ±320mV.

VIN+ = 21Hz, 400mV

76

dBmin
dB typ

-80 dB typ

2

-80 dB typ

15
20

24

– 0.1 V min IO = -20 µA

DD2

5 mA max V

kV/µs min
kV/µs typ
µs typ
µs max

Delay through filter varies with actual value of on­board clock. Decimation by 256.

= 5.5V

DD1

= 5.5V

DD2

, f

MAX

sine wave

pk-pk

= 10MHz unless

MCLK

4

4

Rev. PrJ | Page 3 of 10

AD7400/AD7401 Preliminary Technical Data

AD7401—SPECIFICATIONS

Table 2. (V
otherwise noted.)

Parameter B Version

STATIC PERFORMANCE When Tested with Sinc3 Filter

Resolution

Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift vs. Temperature

Offset Drift vs. V
Absolute Reference Voltage Tolerance ±1 %min/max
V

Drift vs. Temperature2 60

REF

V

Drift vs. V

REF

ANALOG INPUT

Input Voltage Range
DC Leakage Current ±1 µA max

DYNAMIC SPECIFICATIONS When Tested with Sinc3 Filter

Signal to Noise + Distortion Ratio (SINAD) 4 70

Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Effective number of bits 12 Bits
Isolation Transient Immunity

Signal Delay 10

LOGIC INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, IIN ±1 µA max
Input Capacitance, C

LOGIC OUTPUTS

Output High Voltage, VOH V
Output Low Voltage, VOL 0.4 V max IO = 20 µA

POWER REQUIREMENTS

V

+4.5/+5.5 Vmin/Vmax

DD1

V

+4.5/+5.5 Vmin/Vmax

DD2

+2.7/+3.3 Vmin/Vmax

7

I

21.2 mA max V

DD1

7

I

DD2

NOTES

3

Temperature ranges as follows: -40⬚C to +105⬚C

4

See Terminology section.

3

Sample tested @ 25⬚C to ensure compliance.

4

Filter as defined by Verilog Code.

5

All voltages are relative to their respective ground.

Specifications subject to change without notice.

= V

DD1

2

= 4.5V to 5.5V, , VIN+ = -200mV to +200mV and VIN- = 0V; TA = T

DD2

2

2

2

2

DD1

2

0.2 % typ

DD1

2

2 V min

INH

0.8 V max

INL

3

IN

3

to T

MIN

1,5

Units Test Conditions/Comments

16 Bits min Filter output truncated to 16 Bits
±4 LSB max
±0.9 LSB max Guaranteed No Missed Codes to 15 bits
±0.5 mV max Bipolar Input Range
5
2

µV/⬚C max
µV/⬚C typ

0.05 mV/V typ

ppm/⬚C typ

±200 mV min/max For specified performance. Full range ±320mV.

VIN+ = 21Hz, 400mV

76

dBmin
dB typ

-80 dB typ

2

-80 dB typ

15
20

12

kV/µs min
kV/µs typ
µs typ
µs max

Delay through filter varies with actual value of external
clock. Decimation by 256.

10 pF max

– 0.1 V min IO = -20 µA

DD2

= 5.5V

DD1

3.92 mA max V

= 5.5V, Digital I/Ps = 0 V or V

DD1

, f

MAX

sine wave

pk-pk

= 20MHz unless

MCLK

4

4

DD1

Rev. PrJ | Page 4 of 10

Preliminary Technical Data AD7400/AD7401

TIMING SPECIFICATIONS

Table 3. AD7400/AD7401 Timing Specifications (V

Parameter Limit at T

F

MCLKOUT

10 MHz typ AD7400

MIN

, T

1

= V

DD1

Unit Description

MAX

= 4.5V to 5.5V, T

DD2

A

= T

8.2/13.2 MHz min/max

2

T

MCLKIN

1 MHz min AD7401

20 MHz max

3

t

1

3

t

2

t

3

t

4

NOTES

1

Sample tested @ 25⬚C to ensure compliance. All input signals are specified with tr = tf = 5ns (10% to 90% of V

1.

2

Mark Space ratio for the MCLKIN input is 40/60 to 60/40.

3

Measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8V or 2.0V.

30 ns max Data Access Time after MCLK Rising Edge
15 ns min Data Hold Time after MCLK Rising Edge

0.4 x t

0.4 x t

ns max Master Clock Low Time

MCLKIN

ns max Master Clock High Time

MCLKIN

I

OL

+1.6V

OUTPUT

PIN

TO

C

L

50pF

200µA

to T

MAX

DD1

unless otherwise noted.)

MIN

) and timed form a voltage level of 1.6 Volts. See Figure

MCLKIN /

MCLKOUT

MDAT

200µA

I

OH

Figure 1. Load Circuit for Digital Output Timing Specifications

t

4

t

t

1

t

2

3

Figure 2. Data Timing

Rev. PrJ | Page 5 of 10

AD7400/AD7401 Preliminary Technical Data

ABSOLUTE MAXIMUM RATINGS

Table 4. AD7400/AD7401 Absolute Maximum Ratings (T

V

to GND1 -0.3 V to +6.5V

DD1

V

to GND

DD2

Analog Input Voltage to GND
Digital Input Voltage to GND
Output Voltage to GND
Input Current to Any Pin Except Supplies
Operating Temperature Range -40°C to +105°C
Storage Temperature Range -65°C to +150°C
Junction Temperature +150°C
SOIC Package
θJA Thermal Impedance 89.2 °C/W
θJC Thermal Impedance 55.6 °C/W
Resistance (Input-Output), R

REGULATORY INFORMATION (PENDING)

Table 5. Insulation and Safety Related Specifications

Parameter Symbol Value Units Conditions

Input-Output Withstand Momentary
Withstand Voltage

Minimum External Air Gap
(Clearance)

Minimum External Tracking
(Creepage)

Minimum Internal Gap (Internal
Clearance)

Tracking Resistance (Comparative
Tracking Index)

Isolation Group IIIa Material Group (DIN VDE 0110,1/89,Table 1)

UL1

Recognized under 1577
component recognition program

Double insulation, 3750 V rms
isolation voltage

NOTES

1

In accordance with UL1577, each AD7400/AD7401 is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (current leakage detection limit =
10 µA).

2

In accordance with DIN EN 60747-5-2, each AD7400/AD7401 is proof tested by applying an insulation test voltage ≥ 1670 V peak for 1 second (partial discharge
detection limit = 5 pC).

2

1

2

2

I-O

1

CSA

Approved under CSA Component

1

Acceptance Notice #5A

Reinforced insulation per
CSA 60950-1-03 and IEC 60950-1,
630 V rms maximum working voltage

1,3

= +25°C unless otherwise noted)

A

Capacitance (Input-Output), C

-0.3 V to +6.5 V

-0.3 V to V

-0.3 V to V

-0.3 V to V

2

V

3750 min. V Note 1

ISO

+0.3V

DD1

DD2

DD2

±10mA

+0.5 V

+0.3V

12

Ω

10

Lead Temperature, Soldering
Vapor Phase (60 sec) +215°C
Infared (15 sec) +220°C
ESD TBD

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause

permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.

2

Transient currents of up to 100mA will not cause SCR latch up.

3

All voltages are relative to their respective ground.

L(I01) 8.4 min mm

Measured from input terminals to output terminals, shortest

1pF

I-O

distance through air.

L(I02) 8.1 min mm

Measured from input terminals to output terminals, shortest
distance path along body.

0.025 min mm Insulation distance through insulation.

CTI >175 V DIN IEC 112/VDE 0303 Part 1

2

VDE

Certified according to DIN EN 60747-5-2
(VDE 0884 Part 2):2003-01

2

Basic insulation, 891 V peak

Complies with DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01,
DIN EN 60950 (VDE 0805):2001-12; EN 60950:2000

Reinforced insulation, 891 V peak

Rev. PrJ | Page 6 of 10

Preliminary Technical Data AD7400/AD7401

DIN EN 60747-5-2 (VDE 0884 PART 2) INSULATION CHARACTERISTICS (PENDING)

Table 6.

Description Symbol Characteristic Unit

Installation classification per DIN VDE 0110
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 600 V rms

I–IV

I–III
Climatic Classification 40/105/21
Pollution Degree (DIN VDE 0110, Table 1) 2
Maximum Working Insulation Voltage V
Input to Output Test Voltage, Method b1
V

× 1.875 = VPR, 100% Production Test,

IORM

t

= 1 sec, Partial Discharge < 5 pC

m

Input to Output Test Voltage, Method a
After Environmental Tests Subgroup 1)
V

× 1.6 = VPR, tm = 60 sec, Partial Discharge < 5p C

IORM

After Input and/or Safety Test Subgroup 2/3)
V

× 1.2 = VPR, tm = 60 sec, Partial Discharge < 5p C

IORM

Highest Allowable Overvoltage
(Transient Overvoltage, t

= 10 sec)

TR

Safety-Limiting Values (Maximum value allowed in the event of a failure, also see Thermal
Derating Curve)

Case Temperature
Side 1 Current
Side 2 Current

IORM

V

PR

V

PR

6000 V peak

V

TR

T

S

IS1
I

S2

891

1670

1426

1069

150

TBD

TBD
Insulation Resistance at TS, VIO = 500 V RS >109 Ω

This isolator is suitable for “basic electrical isolation” only within the safety limit data. Maintenance of the safety data shall be ensured by
means of protective circuits.

Vpeak
V peak

Vpeak

Vpeak

°C
mA
mA

"*" marking on packages denotes DIN EN 60747-5-2 approval for 891 V peak working voltage.

Rev. PrJ | Page 7 of 10

AD7400/AD7401 Preliminary Technical Data

V

VIN+

VIN-

V

GND

DD1

NC

NC

NC

DD1

1

1

2

AD7400

3

4

TOP VIEW

5

(Not t o Sc ale)

6

7

8

GND

16

NC

15

14

MCLKOUT

13

NC

12

MDAT

11

NC

10

GND

9

2

V

DD2

2

V

VIN+

VIN-

V

GND

DD1

NC

NC

NC

DD1

1

1

2

AD7401

3

4

TOP VIEW

5

(Not t o Sc ale)

6

7

8

16

15

14

13

12

11

10

9

GND

2

NC

V

DD2

MCLKIN

NC

MDAT

NC

GND

2

Pin Functional Descriptions

Table 7. AD7400/AD7401 Pin Function Descriptions

Pin
Number

1,7 V

2 VIN+ VIN+ Positive analog Input, range of ±200 mV .
3 VIN­11 MDAT MDAT

13 MCLKIN

13 MCLKOUT

14 V

8 GND

9,16 GND

4-6,10,12,15 NC NC No Connect

AD7400
Pin

AD7401 Pin
Mnemonic

Mnemonic

V

DD1

V

DD2

1

2

DD1

VIN-

DD2

GND

GND

Description

Supply Voltage, 5 V ±10%. This is the supply voltage for the isolated side of the
AD7400/AD7401 and is relative to GND

1

Negative analog input (normally connected to GND1).
Serial Data Output. The single bit modulator output is supplied to this pin as a serial data

stream. The bits are clocked out on the rising edge of the MCLKIN/MCLKOUT input.
Master Clock. Logic Input. An external clock is applied at this pin. A serial clock input from

1MHz to 20MHz may be applied to this pin on the AD7401. The bit stream form the
modultaor is valid on the rising edge of MCLKIN.

Master Clock. Logic Output, 10MHz typical. The bit stream form the modultaor is valid on the
rising edge of MCLKOUT on the AD7400.

Supply Voltage, 5 V ±10% or 3V ±10%. This is the supply voltage for the non-isolated side of
the AD7400/AD7401 and is relative to GND2.

1

Ground. This is the ground reference point for all circuitry on the isolated side of the
AD7400/AD7401.

2

Ground. This is the ground reference point for all circuitry on the non-isolated side of the
AD7400/AD7401.

.

Rev. PrJ | Page 8 of 10

Preliminary Technical Data AD7400/AD7401

Theory of Operation

CIRCUIT INFORMATION

The AD7400/AD7401 Isolated Sigma-Delta Modulator converts
an analog input signal into a high-speed, (10MHz using on­board MCLK on AD7400, or up to 20MHz using external
MCLK on AD7401), single-bit data stream; the time average of
the modulator’s single-bit data is directly proportional to the

input signal. Figure 4 shows a typical application circuit where
the AD7400/AD7401 is used to provide isolation between the
analog input, a current sensing resistor, and the digital output
which is then processed by a digital filter to provide an N-bit
word.

ISOLATED

+5V

AD7400

V

DD1

SIGMA-

VIN+

INPUT

CURRENT

R

SHUNT

+

DELTA

MOD/

VIN-

ENCODER

DECODER ENCODER

GND

1

DECODER

MDAT

MCLKOUT

MCLKIN

GND

Figure 4. Typical Application Circuit

ANALOG INPUT
The differential analog input of the AD7400/AD7401 is
implemented with a switched capacitor circuit. This circuit

nd

implements a 2

-order modulator stage which digitizes the
input signal into a 1-bit output stream. The sample clock
(MCLK) provides the clock signal for the conversion process as
well as the output data-framing clock. This clock source is
internal on the AD7400 and external on the AD7401. In the case

Table 8. Analog Input Range

Analog Input Voltage Input

Full Scale Range 640 mV

NON-ISOLATED

+5V/+3V

V

DD2

V

DD

SINC3 FILTER

MDAT

MCLK

(UP TO 20MHz

2

with AD7401)

CCLK

GND

+5

SCLK

SDAT

of the AD7401 different clock frequencies allow for a variety of
solutions and signal bandwidths or for accurate synchronization
of several AD7401 devices used in the same system.
The analog input signal is continuously sampled by the
modulator and compared to an internal voltage reference. A
digital stream which accurately represents the analog input over
time appears at the output of the converter. See figure x.

+Full Scale +320 mV

+ Specified Input range +200 mV

Zero 0 mV

-Specified Input range -200 mV

-Full Scale -320mV

Rev. PrJ | Page 9 of 10

AD7400/AD7401 Preliminary Technical Data

PR04718-0-11/04(PrJ)

OUTLINE DIMENSIONS

10.50 (0.4134)

10.10 (0.3976)

16

1

1.27 (0.0500)
BSC

0.30 (0.0118)

0.10 (0.0039)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

0.51 (0.0201)

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-013AA

9

7.60 (0.2992)

7.40 (0.2913)

8

2.65 (0.1043)

2.35 (0.0925)

SEATING
PLANE

10.65 (0.4193)

10.00 (0.3937)

0.33 (0.0130)

0.20 (0.0079)

0.75 (0.0295)

0.25 (0.0098)

8°
0°

× 45°

1.27 (0.0500)

0.40 (0.0157)

Figure 2. 16-Lead Short Outline Package [SOIC] Wide Body (RW-16)—Dimensions shown in millimeters

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Ordering Guide

AD7266 Products Temperature Package Package Description Package Outline

AD7400YRWZ –40°C to +105°C Short Outline I.C. Package RW-16

AD7400YRWZ-REEL –40°C to +105°C Short Outline I.C. Package RW-16

AD7400YRWZ-REEL7 –40°C to +105°C Short Outline I.C. Package RW-16

AD7401YRWZ –40°C to +105°C Short Outline I.C. Package RW-16

AD7401YRWZ-REEL –40°C to +105°C Short Outline I.C. Package RW-16

AD7401YRWZ-REEL7 –40°C to +105°C Short Outline I.C. Package RW-16

© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.

Rev. PrJ | Page 10 of 10