Datasheet AD706KN, AD706JR-REEL, AD706JR, AD706JN, AD706AR-REEL Datasheet (Analog Devices)

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Page 1
Dual Picoampere Input
a
FEATURE HIGH DC PRECISION
50 mV max Offset Voltage
0.6 mV/8C max Offset Drift 110 pA max Input Bias Current
LOW NOISE
0.5 mV p-p Voltage Noise, 0.1 Hz to 10 Hz LOW POWER
750 mA Supply Current Available in 8-Lead Plastic Mini-DlP, Hermetic Cerdip
and Surface Mount (SOIC) Packages
Available in Tape and Reel in Accordance with
EIA-481A Standard
Single Version: AD705, Quad Version: AD704 PRIMARY APPLICATIONS
Low Frequency Active Filters Precision Instrumentation Precision Integrators
Current Bipolar Op Amp
AD706
CONNECTION DIAGRAM
Plastic Mini-DIP (N)
Cerdip (Q) and
Plastic SOIC (R) Packages
AMPLIFIER 1 AMPLIFIER 2
AD706
TOP VIEW
8
7
6
5
1INV–
–IN
1IN
1
2
3
4
OUTPUT
The AD706 is offered in three varieties of an 8-lead package: plastic mini-DIP, hermetic cerdip and surface mount (SOIC). “J” grade chips are also available.

PRODUCT DESCRIPTION

The AD706 is a dual, low power, bipolar op amp that has the low input bias current of a BiFET amplifier, but which offers a significantly lower I
drift over temperature. It utilizes superbeta
B
bipolar input transistors to achieve picoampere input bias cur­rent levels (similar to FET input amplifiers at room tempera­ture), while its I a BiFET amp, for which I
typically only increases by 5× at 125°C (unlike
B
doubles every 10°C for a 1000×
B
increase at 125°C). The AD706 also achieves the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier.
Since it has only 1/20 the input bias current of an OP07, the AD706 does not require the commonly used “balancing” resis­tor. Furthermore, the current noise is 1/5 that of the OP07, which makes this amplifier usable with much higher source impedances. At 1/6 the supply current (per amplifier) of the OP07, the AD706 is better suited for today’s higher density boards.
The AD706 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in preci­sion instrumentation and as a high quality integrator. The AD706 is internally compensated for unity gain and is available in five performance grades. The AD706J and AD706K are rated over the commercial temperature range of 0°C to +70°C. The AD706A and AD706B are rated over the industrial temperature range of –40°C to +85°C.

PRODUCT HIGHLIGHTS

1. The AD706 is a dual low drift op amp that offers BiFET level input bias currents, yet has the low I
drift of a bipolar
B
amplifier. It may be used in circuits using dual op amps such as the LT1024.
2. The AD706 provides both low drift and high dc precision.
3. The AD706 can be used in applications where a chopper amplifier would normally be required but without the chopper’s inherent noise.
100
10
– nA
B
1
TYPICAL I
0.1
0.01 –55 +125+25 +110
TYPICAL JFET AMP
AD706
TEMPERATURE – 8C
Figure 1. Input Bias Current vs. Temperature
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1997
Page 2
AD706–SPECIFICA TIONS
(@ TA = +258C, VCM = 0 V and 615 V dc, unless otherwise noted)
AD706J/A AD706K/B
Parameter Conditions Min Typ Max Min Typ Max Units
INPUT OFFSET VOLTAGE
Initial Offset 30 100 10 50 µV Offset T
MIN
to T
MAX
40 150 25 100 µV vs. Temp, Average TC 0.2 1.5 0.2 0.6 µV/°C vs. Supply (PSRR) VS = ±2 V to ±18 V 110 132 112 132 dB
T
MIN
to T
MAX
VS = ±2.5 V to ±18 V 106 126 108 126 dB
Long Term Stability 0.3 0.3 µV/Month
INPUT BIAS CURRENT
1
VCM = 0 V 50 200 30 110 pA
VCM = ±13.5 V 250 160 pA vs. Temp, Average TC 0.3 0.2 pA/°C T
to T
MIN MIN
to T
MAX MAX
T
VCM = 0 V 300 200 pA
VCM = ±13.5 V 400 300 pA
INPUT OFFSET CURRENT VCM = 0 V 30 150 30 100 pA
VCM = ±13.5 V 250 200 pA vs. Temp, Average TC 0.6 0.4 pA/°C T
to T
MIN MIN
to T
MAX MAX
T
VCM = 0 V 80 250 80 200 pA
VCM = ±13.5 V 80 350 80 300 pA
MATCHING CHARACTERISTICS
Offset Voltage 150 75 µV
Input Bias Current
to T
MIN
MIN
to T
MAX
MAX
2
T
250 150 µV 300 150 pA 500 250 pA
T
Common-Mode Rejection 106 110 dB
T
MIN
to T
MAX
106 108 dB
Power Supply Rejection 106 110 dB
T
MIN
to T
MAX
104 106 dB
Crosstalk @ f = 10 Hz
(Figure 19a) RL = 2 k 150 150 dB
FREQUENCY RESPONSE
Unity Gain Crossover
Frequency 0.8 0.8 MHz
Slew Rate G = –1 0.15 0.15 V/µs
T
MIN
to T
MAX
0.15 0.15 V/µs
INPUT IMPEDANCE
Differential 40i2 40i2MipF Common Mode 300i2 300i2GipF
INPUT VOLTAGE RANGE
Common-Mode Voltage ± 13.5 ±14 ±13.5 ±14 V Common-Mode Rejection
Ratio VCM = ±13.5 V 110 132 114 132 dB
T
MIN
to T
MAX
108 128 108 128 dB
INPUT CURRENT NOISE 0.1 Hz to 10 Hz 3 3 pA p-p
f = 10 Hz 50 50 fA/Hz
INPUT VOLTAGE NOISE 0.1 Hz to 10 Hz 0.5 0.5 1.0 µV p-p
f = 10 Hz 17 17 nV/Hz
f = 1 kHz 15 22 15 22 nV/Hz
OPEN-LOOP GAIN VO = ± 12 V
R
= 10 k 200 2000 400 2000 V/mV
LOAD
T
MIN
to T
MAX
150 1500 300 1500 V/mV VO = ±10 V R
2 k 200 1000 300 1000 V/mV
LOAD =
T
MIN
to T
MAX
150 1000 200 1000 V/mV
OUTPUT CHARACTERISTICS
Voltage Swing R
= 10 kΩ±13 ±14 ±13 ±14 V
LOAD
T
MIN
to T
MAX
±13 ±14 ±13 ±14 V
Current Short Circuit ± 15 ±15 mA Capacitive Load
Drive Capability Gain = +1 10,000 10,000 pF
–2–
REV. C
Page 3
AD706
WARNING!
ESD SENSITIVE DEVICE
Parameter Conditions Min Typ Max Min Typ Max Units
AD706J/A AD706K/B
POWER SUPPLY
Rated Performance ± 15 ± 15 V Operating Range ± 2.0 ±18 ± 2.0 ±18 V Quiescent Current, Total 0.75 1.2 0.75 1.2 mA
T
MIN
to T
MAX
0.8 1.4 0.8 1.4 mA
TRANSISTOR COUNT # of Transistors 90 90
NOTES
l
Bias current specifications are guaranteed maximum at either input.
2
Input bias current match is the difference between corresponding inputs (IB of –IN of Amplifier #1 minus IB of –IN of Amplifier #2).
CMRR match is the difference between
PSRR match is the difference between
All min and max specifications are guaranteed. Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

VOS#1
V
VOS#1
V
SUPPLY
for amplifier #1 and
CM
for amplifier #l and
l
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation
(Total: Both Amplifiers)
2
. . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . +0.7 Volts
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
AD706J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD706A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead Plastic Package: θJA = 100°C/Watt
3
The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds ±0.7 volts, external series protection resistors should be added to limit the input current to less than 25 mA.
8-Lead Cerdip Package: θJA = 110°C/Watt 8-Lead Small Outline Package: θJA = 155°C/Watt
VOS#2
V
CM
VOS#2
V
SUPPLY
S
for amplifier #2 expressed in dB.
for amplifier #2 expressed in dB.

ORDERING GUIDE

Temperature Package
Model Range Description Option*
AD706AN –40°C to +85°C Plastic DIP N-8 AD706JN 0°C to +70°C Plastic DIP N-8 AD706KN 0°C to +70°C Plastic DIP N-8 AD706JR 0°C to +70°C SOIC R-8 AD706JR-REEL 0°C to +70°C Tape and Reel AD706AQ –40°C to +85°C Cerdip Q-8 AD706BQ –40°C to +85°C Cerdip Q-8 AD706AR –40°C to +85°C SOIC R-8 AD706AR-REEL – 40°C to +85°C Tape and Reel
*N = Plastic DIP; Q = Cerdip, R = Small Outline Package.

METALIZATION PHOTOGRAPH

Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
OUTPUT A
1
8
+V
S
–INPUT A
+INPUT A
–V
2
3
4
S
0.074 (1.88)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD706 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. C
–3–
0.118 (3.00)
7
6 5
OUTPUT B
–INPUT B +INPUT B
Page 4
AD706–Typical Characteristics
(@ +258C, VS = 615 V, unless otherwise noted)
1000
SAMPLE SIZE: 3000
800
600
400
NUMBER OF UNITS
200
0
–80 –40 0 40 80
INPUT OFFSET VOLTAGE – mV
Figure 2. Typical Distribution of Input Offset Voltage
1V
S
–0.5
–1.0
–1.5
11.5
11.0
(REFERRED TO SUPPLY VOLTAGES)
10.5
INPUT COMMON-MODE VOLTAGE LIMIT – Volts
–V
S
0 5101520
SUPPLY VOLTAGE – 6Volts
Figure 5. Input Common-Mode Voltage Range vs. Supply Voltage
1000
SAMPLE SIZE: 5100
800
600
400
NUMBER OF UNITS
200
0
–160 –80 0 80 160
INPUT BIAS CURRENT – pA
Figure 3. Typical Distribution of Input Bias Current
35
30
25
20
15
10
5
OUTPUT VOLTAGE – Volts p-p
0
1k 10k 1M
FREQUENCY – Hz
100k
Figure 6. Large Signal Frequency Response
1000
SAMPLE SIZE: 2400
800
600
400
NUMBER OF UNITS
200
0
–120 –60 0 60 120
INPUT OFFSET CURRENT – pA
Figure 4. Typical Distribution of Input Offset Current
100
SOURCE RESISTANCE MAY BE EITHER BALANCED
10
1.0
OFFSET VOLTAGE DRIFT – mV/8C
0.1
OR UNBALANCED
FOR INDUSTRIAL TEMPERATURE RANGE
1k 10k 100M
100k 1M 10M
SOURCE RESISTANCE – V
Figure 7. Offset Voltage Drift vs. Source Resistance
200
SAMPLE SIZE: 375
–558C TO 11258C
160
120
80
NUMBER OF UNITS
40
0
–0.8
–0.4 0 0.4 0.8
OFFSET VOLTAGE DRIFT – mV/8C
Figure 8. Typical Distribution of Offset Voltage Drift
4
3
2
1
CHANGE IN OFFSET VOLTAGE – mV
0
0
1234
WARM-UP TIME – Minutes
Figure 9. Change in Input Offset Voltage vs. Warm-Up Time
60
40
20
0
–20
INPUT BIAS CURRENT – pA
–40
–60
5
–15
–10 –5 0 5 COMMON-MODE VOLTAGE – Volts
POSITIVE I
NEGATIVE I
B
B
10
15
Figure 10. Input Bias Current vs. Common-Mode Voltage
–4–
REV. C
Page 5
AD706
g
1000
100
10
VOLTAGE NOISE – nV/!Hz
1
1 10 1000
FREQUENCY – Hz
100
Figure 11. Input Noise Voltage Spectral Density
1000
900
800
700
QUIESCENT CURRENT – mA
600
0
5101520
SUPPLY VOLTAGE – 6 Volts
+1258C
+258C
–558C
Figure 14. Quiescent Supply Current vs. Supply Voltage
1000
100
100V 10kV
10
CURRENT NOISE – fA/!Hz
1
1 10 1000
20MV
FREQUENCY – Hz
100
V
OUT
Figure 12. Input Noise Current Spectral Density
+160
+140
+120
+100
+80
CMRR – dB
+60
+40
+20
0
0.1
1 10 100 10k
1k
FREQUENCY – Hz
100k
1M
Figure 15. Common-Mode Rejection Ratio vs. Frequency
0.5mV
0
5
TIME – Seconds
10
Figure 13. 0.1 Hz to 10 Hz Noise Voltage
180
160
140
120
100
PSRR – dB
80
60
40
20
0.1
1 10 100 10k
+ PSRR
FREQUENCY – Hz
– PSRR
100k
1k
1M
Figure 16. Power Supply Rejection Ratio vs. Frequency
10M
–558C
+258C
+1258C
1M
OPEN-LOOP VOLTAGE GAIN
100k
1 2 4 6 8 10 100
LOAD RESISTANCE – kV
Figure 17. Open-Loop Gain vs. Load Resistance vs. Load Resistance
140
120
100
80
60
40
20
0
OPEN-LOOP VOLTAGE GAIN – dB
–20
0.01
0.1 1 10 1k FREQUENCY – Hz
100
GAIN
PHASE
100k 10M
10k
1M
Figure 18. Open-Loop Gain and Phase Shift vs. Frequency
0
30
60
rees
90
120
150
180
PHASE SHIFT – De
210
240
+V
S
–0.5
–1.0
–1.5
+1.5
+1.0
(REFERRED TO SUPPLY VOLTAGES)
+0.5
OUTPUT VOLTAGE SWING – Volts
–V
S
0 5101520
SUPPLY VOLTAGE – 6 Volts
Figure 19. Output Voltage Swing vs. Supply Voltage
REV. C
–5–
Page 6
AD706
–80
–100
–120
CROSSTALK – dB
–140
–160
10
100 1k 10k 100k
FREQUENCY – Hz
Figure 20a. Crosstalk vs. Frequency
+V
0.1mF
S
2
1/2
AD706
3
4
0.1mF
SINE WAVE GENERATOR
–V
S
1000
100
0.01
CLOSED-LOOP OUTPUT IMPEDANCE – V
0.001
10
1
0.1
1
AV = –1000
AV = + 1
I
= +1mA
OUT
10 100 1k 10k
FREQUENCY – Hz
100k
Figure 21. Magnitude of Closed-Loop Output Impedance vs. Frequency
R
F
+V
1/2
AD706
S
0.1mF
8
4
2kV
R
L
V
OUT
C
L
V
#1
R 2kV
L
OUT
20V p-p
V
IN
1
20kV
+V
S
2.21kV 8
6
1/2
AD706
5
CROSSTALK = 20 LOG
1mF 0.1mF
7
Figure 20b. Crosstalk Test Circuit
SQUARE WAVE INPUT
–V
0.1mF
S
Figure 22a. Unity Gain Follower (For Large Signal
#2
Applications, Resistor R
V
OUT
V
#2
OUT
10
–20dB
V
#1
OUT
Through the Input Protection Diodes)
Limits the Current
F
Figure 22b. Unity Gain Follower Large Signal Pulse Response, R
, CL = 1,000 pF
10 k
=
F
Small Signal Pulse Response, RF =
, CL = 100 pF
0
–6–
Figure 22c. Unity Gain Follower
Figure 22d. Unity Gain Follower Small Signal Pulse Response, R
, CL = 1000 pF
0
REV. C
=
F
Page 7
10kV
+V
S
+
0.1mF
R
L
2.5kV
0.1µF
S
V
IN
SQUARE WAVE INPUT
10kV
1/2
AD706
+
8
4
–V
Figure 23a. Unity Gain Inverter Connection
AD706
V
OUT
C
L
Figure 23b. Unity Gain Inverter Large Signal Pulse Response, C
= 1,000 pF
L
Figure 23c. Unity Gain Inverter Small Signal Pulse Response, C
Figure 24 shows an in-amp circuit that has the obvious advan­tage of requiring only one AD706, rather than three op amps, with subsequent savings in cost and power consumption. The transfer function of this circuit (without R
V
OUT
= (V
IN#1
V
IN#2
G
)1+
 
) is:
R R3
4
 
for R1 = R4 and R2 = R3
Input resistance is high, thus permitting the signal source to have an unbalanced output impedance.
RG (OPTIONAL)
1
) (1+ ) + ( )
IN#2
R3
R4 R3
2R4
R
R4
49.9kV
1/2
AD706
5
A2
7
6
+
4
–V
S
G
OUTPUT
0.1mF
R1
49.9kV
RP*
V
1kV
IN#1
RP*
V
1kV
IN#2
*OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER
THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE.
R2
+V
S
0.1mF
8
2
A1
3
+
1/2
AD706
V
= (V
– V
OUT
IN#1
FOR R1 = R4, R2 = R3
Figure 23d. Unity Gain Inverter Small
= 100 pF
L
Signal Pulse Response, CL = 1000 pF
increases with gain, once initial trimming is accomplished—but CMR is still dependent upon the ratio matching of Resistors R1 through R4. Resistor values for this circuit, using the optional gain resistor, RG, can be calculated using:
R1= R4 = 49.9k R2 = R3 =
RG=
49.9k
0.9G 1
99.8k
0.06 G
where G = Desired Circuit Gain
Table I provides practical 1% resistance values. (Note that without resistor R
, R2 and R3 = 49.9 k/G–1.)
G
Table I. Operating Gains of Amplifiers A1 and A2 and
Practical 1% Resistor Values for the Circuit of Figure 24
Circuit Gain Gain of A1 Gain of A2 R2, R3 R1, R4
1.10 11.00 1.10 499 k 49.9 k
1.33 4.01 1.33 150 k 49.9 k
1.50 3.00 1.50 100 k 49.9 k
2.00 2.00 2.00 49.9 k 49.9 k
10.1 1.11 10.10 5.49 k 49.9 k
101.0 1.01 101.0 499 49.9 k 1001 1.001 1001 49.9 49.9 k
Figure 24. A Two Op-Amp Instrumentation Amplifier
Furthermore, the circuit gain may be fine trimmed using an optional trim resistor, RG. Like the three op-amp circuit, CMR
REV. C
For a much more comprehensive discussion of in-amp applica­tions, refer to the Instrumentation Amplifier Applications Guide— available free from Analog Devices, Inc.
–7–
Page 8
AD706
C2
C1
+
3
1/2
AD706
2
R5
2MV
1
4
0.1mF
–V
S
C5
0.01mF
OPTIONAL BALANCE RESISTOR NETWORKS*
R1
1MV
INPUT
*WITHOUT THE NETWORK, PINS 1 & 2, AND 6 & 7 OF THE AD706 ARE TIED TOGETHER.
CAPACITORS C1 & C2 ARE SOUTHERN ELECTRONICS MPCC, POLYCARB 65%, 50 VOLT
1MV
R2
Figure 25. A 1 Hz, 4-Pole Active Filter
A 1 Hz, 4-Pole, Active Filter
Figure 25 shows the AD706 in an active filter application. An important characteristic of the AD706 is that both the input bias current, input offset current and their drift remain low over most of the op amp’s rated temperature range. Therefore, for most applications, there is no need to use the normal balancing resistor. Adding the balancing resistor enhances performance at high temperatures, as shown by Figure 26.
+V
S
R3
1MVR41MV
C3
5
C4
AD706
6
R6
2MV
0.1mF
8
+
1/2
7
OUTPUT
C6
0.01mF
180
120
WITHOUT OPTIONAL
BALANCE RESISTOR, R3
60
0
WITH OPTIONAL BALANCE
RESISTOR, R3
–60
–120
OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) – mV
–180
–40 0 +40
TEMPERATURE – 8C
+80 +120
Figure 26. VOS vs. Temperature Performance of the 1 Hz Filter
C1429b–2–12/97PRINTED IN U.S.A.
0.200 (5.08) MAX
0.200 (5.08)
0.125 (3.18)
0.005 (0.13) MIN
0.023 (0.58)
0.014 (0.36)
Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values
Section 1 Section 2 Desired Low Frequency Frequency C1 C2 C3 C4 Pass Response (Hz) Q (Hz) Q (mF) (mF) (mF) (mF)
Bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616 Butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.0609
0.1 dB Chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.0385
0.2 dB Chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.0347
0.5 dB Chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.0290
1.0 dB Chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.0242
NOTE Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8
1
PIN 1
0.405 (10.29) MAX
0.100
(2.54)
BSC
0.055 (1.4) MAX
5
4
0.070 (1.78)
0.030 (0.76)
Cerdip
(Q-8)
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150 (3.81) MIN
SEATING PLANE
15°
0°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
0.210 (5.33) MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
Plastic Mini-DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
PIN 1
0.100
(2.54)
BSC
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
14
0.130 (3.30) MIN
SEATING PLANE
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.2440 (6.20)
0.2284 (5.80)
0.0098 (0.25)
0.0040 (0.10) SEATING
PLANE
SOIC (R-8)
0.1968 (5.00)
0.1890 (4.80)
85
0.0500 (1.27)
BSC
PIN 1
0.1574 (4.00)
0.1497 (3.80)
41
0.102 (2.59)
0.094 (2.39)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
8° 0°
0.0500 (1.27)
0.0160 (0.41)
x 45°
–8–
REV. C
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