0.6 mV/8C max Offset Drift
110 pA max Input Bias Current
LOW NOISE
0.5 mV p-p Voltage Noise, 0.1 Hz to 10 Hz
LOW POWER
750 mA Supply Current
Available in 8-Lead Plastic Mini-DlP, Hermetic Cerdip
and Surface Mount (SOIC) Packages
Available in Tape and Reel in Accordance with
EIA-481A Standard
Single Version: AD705, Quad Version: AD704
PRIMARY APPLICATIONS
Low Frequency Active Filters
Precision Instrumentation
Precision Integrators
Current Bipolar Op Amp
AD706
CONNECTION DIAGRAM
Plastic Mini-DIP (N)
Cerdip (Q) and
Plastic SOIC (R) Packages
AMPLIFIER 1AMPLIFIER 2
AD706
TOP VIEW
8
7
6
5
V1
OUTPUT
–IN
1INV–
–IN
1IN
1
2
3
4
OUTPUT
The AD706 is offered in three varieties of an 8-lead package:
plastic mini-DIP, hermetic cerdip and surface mount (SOIC).
“J” grade chips are also available.
PRODUCT DESCRIPTION
The AD706 is a dual, low power, bipolar op amp that has the
low input bias current of a BiFET amplifier, but which offers a
significantly lower I
drift over temperature. It utilizes superbeta
B
bipolar input transistors to achieve picoampere input bias current levels (similar to FET input amplifiers at room temperature), while its I
a BiFET amp, for which I
typically only increases by 5× at 125°C (unlike
B
doubles every 10°C for a 1000×
B
increase at 125°C). The AD706 also achieves the microvolt
offset voltage and low noise characteristics of a precision bipolar
input amplifier.
Since it has only 1/20 the input bias current of an OP07, the
AD706 does not require the commonly used “balancing” resistor. Furthermore, the current noise is 1/5 that of the OP07,
which makes this amplifier usable with much higher source
impedances. At 1/6 the supply current (per amplifier) of the
OP07, the AD706 is better suited for today’s higher density
boards.
The AD706 is an excellent choice for use in low frequency
active filters in 12- and 14-bit data acquisition systems, in precision instrumentation and as a high quality integrator. The
AD706 is internally compensated for unity gain and is available
in five performance grades. The AD706J and AD706K are rated
over the commercial temperature range of 0°C to +70°C. The
AD706A and AD706B are rated over the industrial temperature
range of –40°C to +85°C.
PRODUCT HIGHLIGHTS
1. The AD706 is a dual low drift op amp that offers BiFET
level input bias currents, yet has the low I
drift of a bipolar
B
amplifier. It may be used in circuits using dual op amps such
as the LT1024.
2. The AD706 provides both low drift and high dc precision.
3. The AD706 can be used in applications where a chopper
amplifier would normally be required but without the
chopper’s inherent noise.
100
10
– nA
B
1
TYPICAL I
0.1
0.01
–55+125+25+110
TYPICAL JFET AMP
AD706
TEMPERATURE – 8C
Figure 1. Input Bias Current vs. Temperature
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead Plastic Package: θJA = 100°C/Watt
3
The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds ±0.7 volts, external series protection resistors should
be added to limit the input current to less than 25 mA.
AD706AN–40°C to +85°CPlastic DIPN-8
AD706JN0°C to +70°CPlastic DIPN-8
AD706KN0°C to +70°CPlastic DIPN-8
AD706JR0°C to +70°CSOICR-8
AD706JR-REEL0°C to +70°CTape and Reel
AD706AQ–40°C to +85°CCerdipQ-8
AD706BQ–40°C to +85°CCerdipQ-8
AD706AR–40°C to +85°CSOICR-8
AD706AR-REEL – 40°C to +85°CTape and Reel
*N = Plastic DIP; Q = Cerdip, R = Small Outline Package.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
OUTPUT A
1
8
+V
S
–INPUT A
+INPUT A
–V
2
3
4
S
0.074 (1.88)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD706 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. C
–3–
0.118 (3.00)
7
6
5
OUTPUT B
–INPUT B
+INPUT B
Page 4
AD706–Typical Characteristics
(@ +258C, VS = 615 V, unless otherwise noted)
1000
SAMPLE
SIZE: 3000
800
600
400
NUMBER OF UNITS
200
0
–80–4004080
INPUT OFFSET VOLTAGE – mV
Figure 2. Typical Distribution of Input
Offset Voltage
1V
S
–0.5
–1.0
–1.5
11.5
11.0
(REFERRED TO SUPPLY VOLTAGES)
10.5
INPUT COMMON-MODE VOLTAGE LIMIT – Volts
–V
S
05101520
SUPPLY VOLTAGE – 6Volts
Figure 5. Input Common-Mode
Voltage Range vs. Supply Voltage
1000
SAMPLE
SIZE: 5100
800
600
400
NUMBER OF UNITS
200
0
–160–80080160
INPUT BIAS CURRENT – pA
Figure 3. Typical Distribution of
Input Bias Current
35
30
25
20
15
10
5
OUTPUT VOLTAGE – Volts p-p
0
1k10k1M
FREQUENCY – Hz
100k
Figure 6. Large Signal Frequency
Response
1000
SAMPLE SIZE: 2400
800
600
400
NUMBER OF UNITS
200
0
–120–60060120
INPUT OFFSET CURRENT – pA
Figure 4. Typical Distribution of
Input Offset Current
100
SOURCE RESISTANCE
MAY BE EITHER BALANCED
10
1.0
OFFSET VOLTAGE DRIFT – mV/8C
0.1
OR UNBALANCED
FOR INDUSTRIAL
TEMPERATURE
RANGE
1k10k100M
100k1M10M
SOURCE RESISTANCE – V
Figure 7. Offset Voltage Drift vs.
Source Resistance
200
SAMPLE SIZE: 375
–558C TO 11258C
160
120
80
NUMBER OF UNITS
40
0
–0.8
–0.400.40.8
OFFSET VOLTAGE DRIFT – mV/8C
Figure 8. Typical Distribution of
Offset Voltage Drift
4
3
2
1
CHANGE IN OFFSET VOLTAGE – mV
0
0
1234
WARM-UP TIME – Minutes
Figure 9. Change in Input Offset
Voltage vs. Warm-Up Time
60
40
20
0
–20
INPUT BIAS CURRENT – pA
–40
–60
5
–15
–10–505
COMMON-MODE VOLTAGE – Volts
POSITIVE I
NEGATIVE I
B
B
10
15
Figure 10. Input Bias Current vs.
Common-Mode Voltage
–4–
REV. C
Page 5
AD706
g
1000
100
10
VOLTAGE NOISE – nV/!Hz
1
1101000
FREQUENCY – Hz
100
Figure 11. Input Noise Voltage
Spectral Density
1000
900
800
700
QUIESCENT CURRENT – mA
600
0
5101520
SUPPLY VOLTAGE – 6 Volts
+1258C
+258C
–558C
Figure 14. Quiescent Supply Current
vs. Supply Voltage
1000
100
100V10kV
10
CURRENT NOISE – fA/!Hz
1
1101000
20MV
FREQUENCY – Hz
100
V
OUT
Figure 12. Input Noise Current
Spectral Density
+160
+140
+120
+100
+80
CMRR – dB
+60
+40
+20
0
0.1
11010010k
1k
FREQUENCY – Hz
100k
1M
Figure 15. Common-Mode Rejection
Ratio vs. Frequency
0.5mV
0
5
TIME – Seconds
10
Figure 13. 0.1 Hz to 10 Hz Noise
Voltage
180
160
140
120
100
PSRR – dB
80
60
40
20
0.1
11010010k
+ PSRR
FREQUENCY – Hz
– PSRR
100k
1k
1M
Figure 16. Power Supply Rejection
Ratio vs. Frequency
10M
–558C
+258C
+1258C
1M
OPEN-LOOP VOLTAGE GAIN
100k
124 6 8 10100
LOAD RESISTANCE – kV
Figure 17. Open-Loop Gain vs. Load
Resistance vs. Load Resistance
140
120
100
80
60
40
20
0
OPEN-LOOP VOLTAGE GAIN – dB
–20
0.01
0.1 1 101k
FREQUENCY – Hz
100
GAIN
PHASE
100k10M
10k
1M
Figure 18. Open-Loop Gain and
Phase Shift vs. Frequency
0
30
60
rees
90
120
150
180
PHASE SHIFT – De
210
240
+V
S
–0.5
–1.0
–1.5
+1.5
+1.0
(REFERRED TO SUPPLY VOLTAGES)
+0.5
OUTPUT VOLTAGE SWING – Volts
–V
S
05101520
SUPPLY VOLTAGE – 6 Volts
Figure 19. Output Voltage Swing vs.
Supply Voltage
REV. C
–5–
Page 6
AD706
–80
–100
–120
CROSSTALK – dB
–140
–160
10
1001k10k100k
FREQUENCY – Hz
Figure 20a. Crosstalk vs. Frequency
+V
0.1mF
S
2
1/2
AD706
3
4
0.1mF
SINE WAVE
GENERATOR
–V
S
1000
100
0.01
CLOSED-LOOP OUTPUT IMPEDANCE – V
0.001
10
1
0.1
1
AV = –1000
AV = + 1
I
= +1mA
OUT
101001k10k
FREQUENCY – Hz
100k
Figure 21. Magnitude of Closed-Loop Output Impedance
vs. Frequency
R
F
+V
1/2
AD706
S
0.1mF
8
4
2kV
R
L
V
OUT
C
L
V
#1
R
2kV
L
OUT
20V p-p
V
IN
1
20kV
+V
S
2.21kV
8
6
1/2
AD706
5
CROSSTALK = 20 LOG
1mF0.1mF
7
Figure 20b. Crosstalk Test Circuit
SQUARE
WAVE
INPUT
–V
0.1mF
S
Figure 22a. Unity Gain Follower (For Large Signal
#2
Applications, Resistor R
V
OUT
V
#2
OUT
10
–20dB
V
#1
OUT
Through the Input Protection Diodes)
Limits the Current
F
Figure 22b. Unity Gain Follower
Large Signal Pulse Response, R
Ω
, CL = 1,000 pF
10 k
=
F
Small Signal Pulse Response, RF =
Ω
, CL = 100 pF
0
–6–
Figure 22c. Unity Gain Follower
Figure 22d. Unity Gain Follower
Small Signal Pulse Response, R
Ω
, CL = 1000 pF
0
REV. C
=
F
Page 7
10kV
+V
S
+
0.1mF
R
L
2.5kV
0.1µF
S
V
IN
SQUARE
WAVE
INPUT
10kV
–
1/2
AD706
+
8
4
–V
Figure 23a. Unity Gain Inverter Connection
AD706
V
OUT
C
L
Figure 23b. Unity Gain Inverter Large
Signal Pulse Response, C
= 1,000 pF
L
Figure 23c. Unity Gain Inverter Small
Signal Pulse Response, C
Figure 24 shows an in-amp circuit that has the obvious advantage of requiring only one AD706, rather than three op amps,
with subsequent savings in cost and power consumption. The
transfer function of this circuit (without R
V
OUT
= (V
IN#1
− V
IN#2
G
)1+
) is:
R
R3
4
for R1 = R4 and R2 = R3
Input resistance is high, thus permitting the signal source to
have an unbalanced output impedance.
RG (OPTIONAL)
1
) (1+ ) + ( )
IN#2
R3
R4
R3
2R4
R
R4
49.9kV
1/2
AD706
5
–
A2
7
6
+
4
–V
S
G
OUTPUT
0.1mF
R1
49.9kV
RP*
V
1kV
IN#1
RP*
V
1kV
IN#2
*OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER
THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE.
R2
+V
S
0.1mF
8
2
–
A1
3
+
1/2
AD706
V
= (V
– V
OUT
IN#1
FOR R1 = R4, R2 = R3
Figure 23d. Unity Gain Inverter Small
= 100 pF
L
Signal Pulse Response, CL = 1000 pF
increases with gain, once initial trimming is accomplished—but
CMR is still dependent upon the ratio matching of Resistors R1
through R4. Resistor values for this circuit, using the optional
gain resistor, RG, can be calculated using:
R1= R4 = 49.9kΩ
R2 = R3 =
RG=
49.9kΩ
0.9G −1
99.8kΩ
0.06 G
where G = Desired Circuit Gain
Table I provides practical 1% resistance values. (Note that
without resistor R
, R2 and R3 = 49.9 kΩ/G–1.)
G
Table I. Operating Gains of Amplifiers A1 and A2 and
Practical 1% Resistor Values for the Circuit of Figure 24
Furthermore, the circuit gain may be fine trimmed using an
optional trim resistor, RG. Like the three op-amp circuit, CMR
REV. C
For a much more comprehensive discussion of in-amp applications, refer to the Instrumentation Amplifier Applications Guide—
available free from Analog Devices, Inc.
–7–
Page 8
AD706
C2
C1
+
3
1/2
AD706
–
2
R5
2MV
1
4
0.1mF
–V
S
C5
0.01mF
OPTIONAL BALANCE
RESISTOR NETWORKS*
R1
1MV
INPUT
*WITHOUT THE NETWORK,
PINS 1 & 2, AND 6 & 7 OF THE
AD706 ARE TIED TOGETHER.
CAPACITORS C1 & C2
ARE SOUTHERN ELECTRONICS
MPCC, POLYCARB 65%, 50 VOLT
1MV
R2
Figure 25. A 1 Hz, 4-Pole Active Filter
A 1 Hz, 4-Pole, Active Filter
Figure 25 shows the AD706 in an active filter application. An
important characteristic of the AD706 is that both the input bias
current, input offset current and their drift remain low over
most of the op amp’s rated temperature range. Therefore, for
most applications, there is no need to use the normal balancing
resistor. Adding the balancing resistor enhances performance at
high temperatures, as shown by Figure 26.
+V
S
R3
1MVR41MV
C3
5
C4
AD706
6
R6
2MV
0.1mF
8
+
1/2
7
OUTPUT
–
C6
0.01mF
180
120
WITHOUT OPTIONAL
BALANCE RESISTOR, R3
60
0
WITH OPTIONAL BALANCE
RESISTOR, R3
–60
–120
OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) – mV
–180
–400+40
TEMPERATURE – 8C
+80+120
Figure 26. VOS vs. Temperature Performance
of the 1 Hz Filter
0.1 dB Chebychev0.6480.6190.9482.180.3040.1980.7330.0385
0.2 dB Chebychev0.6030.6460.9412.440.3410.2040.8230.0347
0.5 dB Chebychev0.5400.7050.9322.940.4160.2091.000.0290
1.0 dB Chebychev0.4920.7850.9253.560.5080.2061.230.0242
NOTE
Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz
Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8
1
PIN 1
0.405 (10.29)
MAX
0.100
(2.54)
BSC
0.055 (1.4)
MAX
5
4
0.070 (1.78)
0.030 (0.76)
Cerdip
(Q-8)
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
PLANE
15°
0°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
0.210 (5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
Plastic Mini-DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
PIN 1
0.100
(2.54)
BSC
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
14
0.130
(3.30)
MIN
SEATING
PLANE
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.2440 (6.20)
0.2284 (5.80)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
SOIC
(R-8)
0.1968 (5.00)
0.1890 (4.80)
85
0.0500
(1.27)
BSC
PIN 1
0.1574 (4.00)
0.1497 (3.80)
41
0.102 (2.59)
0.094 (2.39)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
x 45°
–8–
REV. C
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