Page 1
Low Power, Low Cost
*
FEATURES
Low quiescent current: 250 µA max
Laser trimmed to high accuracy:
2.5 V ± 5 mV max (AN, AR grades)
Trimmed temperature coefficient:
20 ppm/°C Max (AN, AR grades)
Low noise: 8 µV p-p from 0.1 Hz to 10 Hz
Hz
250 nV/√
Temperature output pin (N, R packages)
Available in three package styles:
8-Lead PDIP, 8-lead SOIC, and 3-pin TO-92
GENERAL DESCRIPTION
The AD6801 is a band gap voltage reference that provides a
fixed 2.5 V output from inputs between 4.5 V and 36 V. The
architecture of the AD680 enables the reference to be operated
at a very low quiescent current while still realizing excellent dc
characteristics and noise performance. Trimming of the high
stability thin-film resistors is performed for initial accuracy and
temperature coefficient, resulting in low errors over temperature.
The precision dc characteristics of the AD680 make it ideal for
use as a reference for DACs that require an external precision
reference. The device is also ideal for ADCs and, in general, can
offer better performance than the standard on-chip references.
Based upon its low quiescent current, which rivals that of many
incomplete 2-terminal references, the AD680 is recommended
for low power applications, such as hand-held battery equipment.
A temperature output pin is provided on the 8-lead package
versions of the AD680. The temperature output pin provides an
output voltage that varies linearly with temperature and allows
the AD680 to be configured as a temperature transducer while
providing a stable 2.5 V output.
The AD680 is available in five grades. The AD680AN is specified for operation from −40°C to +85°C, while the AD680JN is
specified for 0°C to 70°C operation. Both the AD680AN and
AD680JN are available in an 8-lead PDIP packages. The
AD680AR is specified for operation from −40°C to +85°C,
while the AD680JR is specified for 0°C to 70°C operation.
Both are available in an 8-lead SOIC package. The AD680JT is
specified for 0°C to 70°C operation and is available in a 3-pin
TO-92 package.
wideband
2.5 V Reference
AD680
CONNECTION DIAGRAMS
TP*
1
+V
2
IN
AD680
3
TEMP
GND
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
Figure 1. 8-Lead PDIP and SOIC Pin Configuration
TOP VIEW
(Not to Scale)
4
NC = NO CONNECT
AD680
BOTTOM VIEW
(Not to Scale)
32
+VINV
OUT
Figure 2. Connection Diagram
PRODUCT HIGHLIGHTS
1. The AD680 band gap reference operates on a very low quiescent current which rivals that of many 2-terminal references.
This makes the complete, higher accuracy AD680 ideal for
use in power sensitive applications.
2. Laser trimming of both initial accuracy and temperature coefficients results in low errors over temperature without the use
of external components. The AD680AN and AD680AR have
a maximum variation of 6.25 mV between −40°C and +85°C.
3. The AD680 noise is low, typically 8 µV p-p from 0.1 Hz to
10 Hz. Spectral density is also low, typically 250 nV/√
4. The temperature output pin on the 8-lead package versions
enables the AD680 to be configured as a temperature
transducer.
5. PDIP packaging provides machine insertability, while SOIC
packaging provides surface-mount capability. TO-92 packaging offers a cost-effective alternative to 2-terminal references,
offering a complete solution in the same package in which
2-terminal references are usually found.
1
Protected by U.S. Patent Nos. 4,902,959; 4,250,445; and 4,857,862.
1
GND
TP*
8
7
TP*
6
V
OUT
5
NC
00813-003
00813-004
Hz
.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
Page 2
AD680
TABLE OF CONTENTS
Specifications..................................................................................... 3
Load Regulation ............................................................................8
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Connection Diagram............................... 5
Theory of Operation ........................................................................ 6
Applying the AD680 .................................................................... 6
Noise Performance .......................................................................6
Turn -on Time ................................................................................ 7
Dynamic Performance................................................................. 7
REVISION HISTORY
12/04— Rev. F to Rev. G
Updated Format .................................................................Universal
Changes to Ordering Guide ..........................................................11
5/04—Rev. E to Rev. F
Changes to ORDERING GUIDE ....................................................3
Temperature Performance............................................................8
Temperature Output Pin ..............................................................9
Differential Temperature Transducer.........................................9
Low Power, Low Voltage Reference for Data Converters ........9
4.5 V Reference from a 5 V Supply.......................................... 10
Voltage Regulator for Portable Equipment ............................. 10
Outline Dimensions .......................................................................11
Ordering Guide .......................................................................... 12
5/03—Rev. D to Rev. E
Changes to ORDERING GUIDE ....................................................3
Added ESD Caution...........................................................................3
Changes to Figure 20..........................................................................7
Updated OUTLINE DIMENSIONS ................................................8
7/01—Rev. C to Rev. D
Changes to SPECIFICATIONS.........................................................2
Changes to ORDERING GUIDE .....................................................3
Table I added .......................................................................................6
Rev. G | Page 2 of 12
Page 3
AD680
SPECIFICATIONS
TA = 25°C, VIN = 5 V, unless otherwise noted.
Table 1.
AD680AN/AD680AR AD680JN/AD680JR AD680JT
Parameter Typ Max Min Typ Max Min Typ Max Unit
OUTPUT VOLTAGE
Output Voltage, V
Initial Accuracy, V
O
OERR
−0.20 +0.20 −0.40 +0.40 −0.40 +0.40 %
OUTPUT VOLTAGE DRIFT
1
0°C to 70°C 10 10 25 10 30 ppm/°C
−40°C to +85°C 20 25 25 ppm/°C
LINE REGULATION
4.5 V ≤ +VIN ≤ 15 V 40 40 40 µV/V
(@ T
to T
MIN
) 40 40 40 µV/V
MAX
15 V ≤ +VIN ≤ 36 V 40 40 40 µV/V
(@ T
to T
MIN
) 40 40 40 µV/V
MAX
LOAD REGULATION
0 < I
< 10 mA 80 100 80 100 80 100 µV/mA
OUT
(@ T
to T
MIN
) 80 100 80 100 80 100 µV/mA
MAX
QUIESCENT CURRENT 195
(@ T
to T
MIN
) 280 280 280 µA
MAX
POWER DISSIPATION 1
OUTPUT NOISE
0.1 Hz to 10 Hz 8 10 8 10 8 10 µV p-p
Spectral Density, 100 Hz 250 250 250
CAPACITIVE LOAD 50 50 50 nF
LONG-TERM STABILITY 25 25 25 ppm/1000 hr
SHORT-CIRCUIT CURRENT TO GROUND 25 50 25 50 25 50 mA
TEMPERATURE PIN
Voltage Output @ 25°C 540 596 660 540 596 660 mV
Temperature Sensitivity 2 2 mV/°C
Output Current −5 +5 −5 +5 µA
Output Resistance 12 12 kΩ
TEMPERATURE RANGE
Specified Performance −40 +85 0 70 0 70 °C
Operating Performance
2
1
Maximum output voltage drift is guaranteed for all packages.
2
The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
Specifications in boldface are tested on all production units at final electrical test. Results from these tests are used to calculate outgoing quality levels. All minimum
and maximum specifications are guaranteed.
2.495 2.500 2.505 2.490 2.500 2.510 2.490 2.500 2.510 V
−5 +5 −10 +10 −10 +10 mV
250
1.25
195
1
250
1.25
195
1
250
1.25
µA
mW
nV/√
Hz
−40 +85 −40 +85 −40 +85 °C
Rev. G | Page 3 of 12
Page 4
AD680
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VIN to Ground 36 V
Power Dissipation (25°C) 500 mW
Storage Temperature −65°C to +125°C
Lead Temperature (Soldering, 10 s) 300°C
Package Thermal Resistance θJA (All Packages) 120°C/W
Output Protection: Output safe for indefinite
short to ground and momentary short to V
.
IN
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. G | Page 4 of 12
Page 5
AD680
*
PIN CONFIGURATION AND CONNECTION DIAGRAM
TP*
1
+V
2
IN
AD680
3
TEMP
GND
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
TOP VIEW
(Not to Scale)
4
NC = NO CONNECT
Figure 3. 8-Lead PDIP and SOIC Pin Configuration
AD680
BOTTOM VIEW
(Not to Scale)
32
+VINV
OUT
Figure 4. Connection Diagram
1
GND
TP*
8
7
TP*
6
V
OUT
5
NC
00813-003
00813-004
Rev. G | Page 5 of 12
Page 6
AD680
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage operation. A typical precision band gap consists
of a reference core and buffer amplifier. Based on a new, patented band gap reference design (Figure 5), the AD680 merges
the amplifier and the core band gap function to produce a
compact, complete precision reference.
Central to the device is a high gain amplifier with an intentionally
large proportional to absolute temperature (PTAT) input offset.
This offset is controlled by the area ratio of the amplifier input
pair, Q1 and Q2, and is developed across Resistor R1. Transistor
Q12’s base emitter voltage has a complementary to absolute
temperature (CTAT) characteristic. Resistor R2 and the parallel
combination of R3 and R4 “multiply” the PTAT voltage across R1.
Trimming Resistors R3 and R4 to the proper ratio produces a
temperature invariant 2.5 V at the output. The result is an
accurate, stable output voltage accomplished with a minimum
number of components.
+V
IN
Q9
Q10
R5
Q8
Q11
Q3
Q2
Q4
Q1
×
1
×
8
Q5
R1
C1
R2
Q12
V
OUT
R3
Reference outputs are frequently required to handle fast
transients caused by input switching networks, commonly
found in ADCs and measurement instrumentation equipment.
Many of the dynamic problems associated with this situation
can be minimized with a few simple techniques. Using a series
resistor between the reference output and the load tends to
“decouple” the reference output from the transient source, or a
relatively large capacitor connected from the reference output to
ground can serve as a charge storage element to absorb and
deliver charge as required by the dynamic load. A 50 nF capacitor is recommended for the AD680 in this case; this is large
enough to store the required charge, but small enough not to
disrupt the stability of the reference.
The 8-lead PDIP and SOIC packaged versions of the AD680
also provide a temperature output pin. The voltage on this pin is
nominally 596 mV at 25°C. This pin provides an output linearly
proportional to temperature with a characteristic of 2 mV/°C.
NOISE PERFORMANCE
The noise generated by the AD680 is typically less than 8 µV pp
over the 0.1 Hz to 10 Hz band. Figure 6 shows the 0.1 Hz to 10 Hz
noise of a typical AD680. The noise measurement is made with a
band-pass filter made of a 1-pole high-pass filter, with a corner
frequency at 0.1 Hz, and a 2-pole low-pass filter, with a corner
frequency at 12.6 Hz, to create a filter with a 9.922 Hz bandwidth.
100
90
1s
TEMP
R6
R7
GND
Q6
Figure 5. Schem atic Diag ram
Q7
R4
00813-005
APPLYING THE AD680
The AD680 is simple to use in virtually all precision reference
applications. When power is applied to +V
is tied to ground, V
provides a 2.5 V output. The AD680
OUT
typically requires less than 250 µA of current when operating
from a supply of 4.5 V to 36 V.
To operate the AD680, the +V
pin must be bypassed to the
IN
GND pin with a 0.1 µF capacitor tied as close to the AD680 as
possible. Although the ground current for the AD680 is small,
typically 195 µA, a direct connection should be made between
the AD680 GND pin and the system ground plane.
and the GND pin
IN
Noise in a 300 kHz bandwidth is approximately 800 µV p-p.
Figure 7 shows the broadband noise of a typical AD680.
Rev. G | Page 6 of 12
5µV
10
0%
00813-006
Figure 6. 0.1 Hz to 10 Hz Noise
Page 7
AD680
V
In some applications, a varying load may be both resistive and
capacitive in nature, or the load may be connected to the
AD680 by a long capacitive cable.
+V
IN
V
0.1µF
AD680
OUT
V
OUT
249Ω
V
OUT
V
L
0V
00813-009
Figure 9. Transient Load Test Circuit
500µV
100
90
10
0%
Figure 7. Broadband Noise at 300 kHz
50µs500µV
00813-007
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. The turn-on settling time of the AD680 is about 20 µs
to within 0.025% of its final value, as shown in Figure 8.
10µs5V 1mV
100
V
IN
90
OUT
10
0%
00813-008
Figure 8. Turn-On Settling Time
The AD680 thermal settling characteristic benefits from its
compact design. Once initial turn-on is achieved, the output
linearly approaches its final value; the output is typically within
0.01% of its final value after 25 ms.
100
V
90
L
V
OUT
10
0%
5µs50mV2V
00813-010
Figure 10. Large-Scale Transient Response
100
V
90
IN
V
OUT
10
0%
5µs5mV2V
DYNAMIC PERFORMANCE
The output stage of the amplifier is designed to provide the
Figure 11. Fine-Scale Settling for Transient Load
00813-011
AD680 with static and dynamic load regulation superior to
less complete references. Figure 9 to Figure 11 display the characteristics of the AD680 output amplifier driving a 0 mA to
10 mA load. Longer settling times result if the reference is
forced to sink any transient current.
Rev. G | Page 7 of 12
Page 8
AD680
+V
IN
V
0.1µF
AD680
OUT
C
1000pF
L
Figure 12. Capacitive Load Transient Response Test Circuit
Figure 13 displays the output amplifier characteristics driving a
1000 pF, 0 mA to 10 mA load.
100
V
90
L
V
OUT
249Ω
V
OUT
V
L
0V
00813-012
5µs5mV2V
TEMPERATURE PERFORMANCE
The AD680 is designed for reference applications where temperature performance is important. Extensive temperature
testing and characterization ensures the device’s performance
is maintained over the specified temperature range.
Some confusion exists in the area of defining and specifying
reference voltage error over temperature. Historically, references
have been characterized using a maximum deviation per degree
centigrade, i.e., ppm/°C. However, because of nonlinearities in
temperature characteristics that originated in standard Zener
references (such as “S” type characteristics), most manufacturers now use a maximum limit error band approach to
specify devices.
This technique involves measuring the output at three or more
different temperatures to specify an output voltage error band.
V
OUT
10
0%
Figure 13. Output Response with Capacitive Load
LOAD REGULATION
Figure 14 depicts the load regulation characteristics of the
AD680.
100
V
90
L
V
OUT
10
0%
Figure 14. Typical Load Regulation Characteristics
100µs1mV1V
00813-013
00813-014
2.501
2.500
2.499
2.498
–50 6002040
–10–30 80 100
TEMPERATURE (°C)
SLOPE = TC
V
=
(T
– T
MAX
2.501 – 2.498
=
(85°C – (–40°C))
= 9.6ppm/°C
– V
MAX
)× 2.5V× 10
MIN
MIN
×
2.5V× 10
–6
–6
Figure 15. Typical AD680AN/AD680AR Temperature Drift
Figure 15 shows a typical output voltage drift for the AD680AN/
AD680AR and illustrates the test methodology. The box in
Figure 15 is bounded on the left and right sides by the operating temperature extremes, and on the top and bottom by the
maximum and minimum output voltages measured over the
operating temperature range.
The maximum height of the box for the appropriate temperature
range and device grade is shown in Table 3. Duplication of these
results requires a combination of high accuracy and stable temperature control in a test system. Evaluation of the AD680 will
produce a curve similar to that in Figure 15, but output readings
could vary depending upon the test equipment used.
Table 3. Maximum Output Change in mV
Maximum Output Change (mV)
Device Grade 0°C to 70°C −40°C to +85°C
AD680JN/AD680JR 4.375 —
AD680JT 5.250 —
AD680AN — 6.250
00813-015
Rev. G | Page 8 of 12
Page 9
AD680
A
G
TEMPERATURE OUTPUT PIN
The 8-lead packaged versions of the AD680 provide a temperature output pin on Pin 3 of each device. The output of Pin 3
(TEMP) is a voltage that varies linearly with temperature. V
TEMP
at 25°C is 596 mV, and the temperature coefficient is 2 mV/°C.
Figure 16 shows the output of this pin over temperature.
The temperature pin has an output resistance of 12 kΩ and is
capable of sinking or sourcing currents of up to 5 µA without
disturbing the reference output. This enables the TEMP pin to
be buffered by any of a number of inexpensive operational
amplifiers that have bias currents below this value.
760
720
680
640
600
560
520
TEMP PIN VOLTAGE (mV)
480
440
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 16. TEMP Pin Transfer Characteristics
00813-016
DIFFERENTIAL TEMPERATURE TRANSDUCER
A differential temperature transducer that can be used to
measure temperature changes in the AD680’s environment is
seen in Figure 17. This circuit operates from a 5 V supply. The
temperature dependent voltage from the TEMP pin of the
AD680 is amplified by a factor of 5 to provide wider full-scale
range and more current sourcing capability. An exact gain of 5
can be achieved by adjusting the trim potentiometer until the
output varies by 10 mV/°C. To minimize resistance changes
with temperature, resistors with low temperature coefficients,
such as metal film resistors, should be used.
5V
0.1µF
2
V
IN
TEMP
AD680
GND
4
R
100Ω
3
BP
3
2
R
B
1.69kΩ
1%
+
OP90
–
5V
7
4
R
F
6.98kΩ
1%
∆
V
OUT
∆
T
= 10mV/°C
6
LOW POWER, LOW VOLTAGE REFERENCE FOR DATA CONVERTERS
The AD680 has a number of features that make it ideally suited
for use with ADCs and DACs. The low supply voltage required
makes it possible to use the AD680 with today’s converters that
run on 5 V supplies without having to add a higher supply
voltage for the reference. The low quiescent current (195 µA),
combined with the completeness and accuracy of the AD680,
make it ideal for low power applications, such as hand-held,
battery-operated meters.
One such ADC , for which the AD680 is well-suited, is the AD7701.
Figure 18 shows the AD680 used as the reference for this converter.
The AD7701 is a 16-bit ADC with on-chip digital filtering intended
for the measurement of wide dynamic range, low frequency signals,
such as those representing chemical, physical, or biological processes. It contains a charge balancing (Σ–Δ) ADC, a calibration
microcontroller with on-chip static RAM, a clock oscillator, and a
serial communications port.
This entire circuit runs on ±5 V supplies. The power dissipation
of the AD7701 is typically 25 mW and, when combined with
the power dissipation of the AD680 (1 mW), the entire circuit
consumes just 26 mW of power.
+5V
NALO
SUPPLY
RANGE
SELECT
CALIBRATE
ANALOG
ANALOG
ANALOG
SUPPLY
0.1µF
INPUT
GND
–5V
Figure 18. Low Power, Low Voltage Supply Reference
10µF0.1µF
V
IN
V
OUT
AD680
GND
0.1µF
0.1µF10µF
for the AD7701 16-Bit ADC
AV
DD
V
REF
BP/UP
CAL
A
IN
AGND
AV
SS
AD7701
CLKOUT
DV
SLEEP
MODE
DRDY
SCLK
SDATA
CLKIN
SC1
SC2
DGND
DV
DD
CS
SS
0.1µF
DATA READY
READ (TRANSMIT)
SERIAL CLOCK
SERIAL DATA
0.1µF
00813-018
00813-017
Figure 17. Differential Temperature Transducer
Rev. G | Page 9 of 12
Page 10
AD680
R
4.5 V REFERENCE FROM A 5 V SUPPLY
The AD680 can be used to provide a low power, 4.5 V reference,
as shown in Figure 19. In addition to the AD680, the circuit
uses a low power op amp and a transistor in a feedback configuration that provides a regulated 4.5 V output for a power
supply voltage as low as 4.7 V. The high quality tantalum 10 µF
capacitor (C1) in parallel with the ceramic 0.1 µF capacitor (C2)
and the 3.9 Ω resistor (R5) ensure a low output impedance up to
around 50 MHz (see Figure 19).
R3
1kΩCC3.3µF
V
IN
0.1µF
V
AD680
GND
OUT
2.5kΩ
1%
+IN
–IN
R2
3
2
2kΩ
1%
OP90
R1
V+
7
OUT
6
CF
0.1µF
R4
3.57kΩ
4
V–
Figure 19. 4.5 V Reference Running from a Single 5 V Supply
4.7V TO 15V
2N2907A
+
C1
10µF
R5
3.9Ω
C2
0.1µF
00813-019
VOLTAGE REGULATOR FOR PORTABLE EQUIPMENT
The AD680 is ideal for providing a stable, low cost, and low
power reference voltage in portable equipment power supplies.
Figure 20 shows how the AD680 can be used in a voltage
regulator that not only has low output noise (as compared to a
switch mode design) and low power, but it also has a very fast
recovery after current surges. Some caution should be taken in
the selection of the output capacitors. Too high an ESR (effective
series resistance) could endanger the stability of the circuit. A solid
tantalum capacitor, 16 V or higher, and an aluminum electrolytic capacitor, 10 V or higher, are recommended for C1 and C2,
respectively. Also, the path from the ground side of C1 and C2
to the ground side of R1 should be kept as short as possible.
CHARGE
INPUT
0.1µF
6
R2
402kΩ 1%
R3
510kΩ
IRF9530
C1
+
68µF
TANT
+
C2
1000µF
ELECT
00813-020
6V
LEAD-ACID
+
BATTERY
2
V
IN
V
OUT
AD680
TEMP
GND
4
6
3
–
237
OP777
+
R1
402kΩ 1%
4
Figure 20. Voltage Regulator for Portable Equipment
Rev. G | Page 10 of 12
Page 11
AD680
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
Figure 21. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions show in millimeters and (inches)
0.210 (5.33)
0.170 (4.32)
0.205 (5.21)
0.175 (4.45)
0.135 (3.43)
MIN
0.050 (1.27)
MAX
0.500 (12.70) MIN
SEATING
PLANE
× 45°
0.019 (0.482)
0.016 (0.407)
8
1
PIN 1
0.100 (2.54)
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual In-Line Package [PDIP]
0.055 (1.40)
SQ
0.045 (1.15)
0.105 (2.66)
0.095 (2.42)
0.115 (2.92)
0.080 (2.03)
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
4
BSC
0.005 (0.13)
MIN
COMPLIANT TO JEDEC STANDARDS MS-001-BA
0.015
(0.38)
MIN
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
GAUGE
PLANE
MAX
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
MAX
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.165 (4.19)
0.125 (3.18)
3
2
1
0.115 (2.92)
0.080 (2.03)
BOTTOM VIEW
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS TO-226AA
Figure 23. 3-Pin Plastic Header-Style Package [TO-92]
(T-3)
Dimensions shown in inches and (millimeters)
Rev. G | Page 11 of 12
Page 12
AD680
ORDERING GUIDE
Initial
Accuracy
(mV) (%)
Model
Output
Voltage
VO (V)
AD680AR 2.5 5 0.20 20 SOIC R-8 −40 to +85
AD680AR-REEL 2.5 5 0.20 20 SOIC R-8 2,500 −40 to +85
AD680AR-REEL7 2.5 5 0.20 20 SOIC R-8 750 −40 to +85
AD680ARZ
AD680ARZ-REEL7
1
2.5 5 0.20 20 SOIC R-8 −40 to +85
1
2.5 5 0.20 20 SOIC R-8 750 −40 to +85
AD680JR 2.5 10 0.40 25 SOIC R-8 0 to 70
AD680JR-REEL 2.5 10 0.40 25 SOIC R-8 2,500 0 to 70
AD680JRZ
AD680JRZ-REEL7
1
2.5 10 0.40 25 SOIC R-8 0 to 70
1
2.5 10 0.40 25 SOIC R-8 750 0 to 70
AD680AN 2.5 5 0.20 20 PDIP N-8 −40 to +85
AD680JN 2.5 10 0.40 25 PDIP N-8 0 to 70
AD680JT 2.5 10 0.40 30 TO-92 T-3 0 to 70
1
Z = Pb-free part.
Temperature
Coefficient
(ppm/°C)
Package
Description Package Option
Parts
per
Reel
Temperature
Range (°C)
© 2004 Analog Devices, Inc. All rights reserved. Trademarks
and
registered trademarks are the property of their respective owners.
C00813–0–12/04(G)
Rev. G | Page 12 of 12
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