Datasheet AD6312 Datasheet (AnaChip)

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1/4- to 1/11 Duty VFD Controller/Driver

Features



4-pin serial interface

˙

Key scanning (6×4 matrices)

˙

Programming display modes (11-segments & 11-

˙

digits to 16-segments & 6-digits) Programming dimming step

˙

High-voltage output (V

˙

4 channels LED ports.

˙

4-pin General-purpose input port

˙

Built-in oscillator

˙

No external resistor necessary for driver outputs

˙

Pin Assignments



-35V max).

DD

5

Grid

6

Grid

7

/ Grid

16

Seg

8

/ Grid

15

Seg

9

/ Grid

14

Seg

10

/ Grid

13

Seg

AD6312

General Description



The AD6312 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4- to 1/11 duty factor (include key scan). It consists of 5 segment output lines, 6 segment/key scan output lines, 6 grid output lines, 5 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the AD6312 through a four-line serial interface.

11

/ Grid

12

EE

V

Seg

9

Seg11Seg10Seg

Use all power pins.

Grid

V

LED

V

OSC

33

34

4

35

3

2

36

1

37

DD

SS

38

39

4

40

3

2

41

1

42

43

44

3

2

1

4

4Sw3Sw2Sw1

Sw

5

OUT

D

6

IN

D

9

8

7

SS

V

CLK

STB

10

1

Key

22

21

20

19

18

17

16

15

14

13

12

11

2

Key

Seg

8

Seg

7

Seg6 / KS

Seg5 / KS

Seg4 / KS

Seg3 / KS

Seg2 / KS

Seg1 / KS

DD

V

4

Key

3

6

5

4

3

2

1

23

24

25

26

27

28

29

30

31

32

This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

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Rev. A4 Dec 29, 2003

1/4- to 1/11 Duty VFD Controller/Driver

Pin Descriptions

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Symbol Name No. Description

DIN Data input 6

D

Data output 5

OUT

STB Strobe 9

CLK Clock input 8

OSC Oscillator pin 44

Seg7 to Seg11 High-voltage output (Segment) 21 to 25 Segment output pins

Seg1/KS1 to

Seg

/KS6

6

Grid1 to Grid6 High-voltage output (Grid) 32 to 37 Grid output pins

Seg12/Grid11 to

Seg

/Grid7

16

LED1 to LED4 LED output 39to 42 CMOS output

High-voltage output 15 to 20

High-voltage output (Segment/grid)

26,

28 to 31

Input serial data at rising edge of shift clock, starting from the low order bit. Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin. Initializes serial interface at the rising or falling edge of the AD6312. It then waits for reception of a command. Data input after STB falling is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored.

Reads serial data at the rising edge, and outputs data at the falling edge.

Connect resistor in between this pin and Vss to set up the oscillation frequency.

Multi-function pins, Segment output pins (Dual function as key scan source)

These pins are selectable for segment or grid driving.

AD6312

KEY1 to KEY4 Key data input 10 to 13

VDD Logic power 14, 38 Logic power supply

VSS Logic ground 7, 43 Connect this pin to system GND.

VEE Pull-down level 27 Driver power supply

SW1 to SW

4

Switch input 1 to 4

Data input to these pins is latched at the end of the display cycle.

These pins constitute a 4-bit general-purpose input port.

Ordering Information



AD6312 X X X

Package Lead

Blank: Normal

L: LQFP-44L

F: Lead Free

Packing

Blank : TrayQ: QFP-44L

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

AD6312

Block Diagram



Dimming

circuit

16

16-bit

5

output latch

11

6

Segment/

5

Segment

5

Data selector

OUT

D

CLK

STB

V

D

DD

Command

decoder

IN

Serial

I/F

R

OSC

Display memory

×

16 bits

11 Words

Timing generator

key scan

Segment/grid

KEY

Key data memory

×

6)

1

4

(4

5

to

Vss

(0V)

611

EE

V

(-30V)

Grid driver

KEy

SW

to

SW

4

1

4

4-bit

4

latch

4-bit latch

1

LED

11-bit shift register

DD

4

V

(+5V)

Key data memory (4x6)

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key scan

driver

Seg1/KS1

Seg6/KS6

Seg7

Seg11

12

/Grid

Seg

Seg16/Grid

1

Grid

6

Grid

11

7

1/4- to 1/11 Duty VFD Controller/Driver

AD6312

Absolute Maximum Ratings



(TA=25oC,VSS=0V )

Parameter Symbol Rating Unit

Logic Supply Voltage VDD -0.5 to +7.0 V Driver Supply Voltage VEE V

+0.5 to VDD -40 V

DD

Logic Input Voltage VI1 -0.5 to VDD +0.5 V VFD Driver Output Voltage VO2 V

-0.5 to VDD +0.5 V

EE

LED Driver Output Current IO1 +15 mA

VFD Driver Output Current IO2

Operating Ambient Temperature T Storage Temperature T

OPT

STG

-25 to +85

-50 to +125

-40 (grid)

-15 (segment)

mA

o

C

o

C

Operating Conditions



(TA=0 to +70 oC,VSS=0V)

Parameter Symbol Conditions Min. Typ. Max. Unit

Logic Supply Voltage VDD 4.5 5 5.5 V High-Level Input Voltage VIH 0.7·VDD VDD V Low-Level Input Voltage VIL 0 0.3·VDD V Driver Supply Voltage VEE 0 VDD-35 V

DC Characteristics



Parameter Symbol Conditions Min. Typ. Max. Unit

High-Level Output Voltage V Low-Level Output Voltage V Low-Level Output Voltage V High-Level Output Current I

High-Level Output Current I

Driver Leakage Current I Output Pull-Down Resistor RL Driver output 50 100 150 High-Level Input Voltage VIH 0.7VDD V

Low-Level Input Voltage VIL 0.3VDD V

AC Characteristics



Parameter Symbol Conditions Min. Typ. Max. Unit

Oscillation Frequency f Maximum Clock Frequency f

Clock Pulse Width PW Strobe Pulse Width PW Data Setup Time t Data Hold Time t Clock-Strobe Time t

Wait Time t

Note : Refer to page 8.

(TA=0 to 70 oC, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V)

LED1-LED4, I

OH1

LED1-LED4, I

OL1

D

OL2

VO=VDD-2V, Seg1 to Seg11 -3 mA

OH21

OH22

VO=VDD-35V, driver off -10

OLEAK

, I

OUT

OL2

O=VDD

-2V, Grid

V Seg12/Grid11 to Seg16/Grid7

(Ta=0 to +70 oC,VDD=4.5 to 5.5 V, VEE=-30V)

OSC

max.

SETUP

HOLD

CLK-STB

WAIT

R=51 kΩ

Duty=50% 1 MHZ

500 ns

CLK

1 µs

STB

100 ns

CLK↑→STB↑ CLK↑→CLK↓(Note)

=-1mA 0.9VDD V

OH1

=12mA 1 V

OL1

=2mA 0.4 V

to Grid

1

6

-15 mA

350 500 650 KHZ

1 µs 1 µs

μ

kΩ

A

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

AD6312

Function Descriptions



1.0 Commands

Commands set the display mode and status of the VFD driver. The first 1 byte input to the AD6312 through

pin after the STB pin has fallen is regarded as a command. If STB is set high while a commands/data

the D

IN

are transmitted, serial communication is initialized, and the commands/data being transmitted are invalid (however, the commands/data previously transmitted remain valid).

1.1 Display mode setting commands

These commands initialize the AD6312 and select the number of segments and the number of grids (4 grids & 16 segments to 11 grids & 11 segments to). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command “ON” must be executed. If the same mode is selected, however, nothing happens.

MSB

00-- -b2b1b0

LSB

Irrelevant

Display mode settings 000: 4 digits, 16 segments 001: 5 digits, 16 segments 010: 6 digits, 16 segments 011: 7 digits, 15 segments 100: 8 digits, 14 segments 101: 9 digits, 13 segments 110: 10 digits, 12 segments 111: 11 digits, 11 segments

On power application, the 11-digit, 11-segment mode is selected.

1.2 Data setting commands

These commands set data write and data read modes. On power application, the normal operation and address increment modes are set.

MSB LSB

0 1 - - b3 b2 b1 b0

Irrelevant

Data write and read mode settings. 00: Write data to display memory. 01: Write data to LED port. 10: Read key data. 11: Read SW data.

Address increment mode settings (display memory). 0: Incremenets address after data has been written. 1: Fixes address.

Test mode settings 0: Normal operation 1: Test mode

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

AD6312

1.3 Address setting commands

These commands set an address of the display memory. If address 16H or higher is set, data is ignored, until a valid address is set. On power application, the address is set to 00H.

MSB LSB

1 1 - b3 b2 b1 b0

b4

Address (00H-15H)

1.4 Display control commands

MSB LSB

10- b3b2b1b0

-

Irrelevant

Dimming quantity settings 000: Sets pulse width to 1/16. 001: Sets pulse width to 2/16. 010: Sets pulse width to 4/16. 011: Sets pulse width to 10/16. 100: Sets pulse width to 11/16. 101: Sets pulse width to 12/16. 110: Sets pulse width to 13/16. 111: Sets pulse width to 14/16.

Tums on/off display. 0: Display off (key scan continues) 1: Display on

On power application, the 1/16-pulse width is set, the display is turned off and key scanning is stopped.

2.0 Display RAM Address and Display Mode

The display RAM stores the data transmitted from an external device to the AD6312 through the serial interface, and is assigned addresses as follows, in 8 bits unit:

Seg

Seg4 Seg8 Seg12 Seg

1

00 H 02 H 04 H 06 H 08 H 0 AH 0 CH 0 EH 10 H 12 H 14 H

00 H

L

02 H 04 H 06 H 08 H

0 AH 0 CH 0 EH

10 H

12 H

14 H

U

01 H

L

03 H

L

05 H

L

07 H

L

09 H

L

0 BH

L

0 DH

U

0 FH

11 H 13 H 15 H

L

01 HU DIG 03 HU DIG 05 HU DIG 07 HU DIG 09 HU DIG 0 BHU DIG 0 DHU DIG 0 FHU DIG 11 HU DIG 13 HU DIG 15 HU DIG

16

1

2

3

4

5

6

7

8

9

10

11

b0 b3 b4 b7

XX H

Lower 4 bits Higher 4 bits

XXHU

L

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1/4- to 1/11 Duty VFD Controller/Driver

AD6312

3.0 LED Port

Data is written to the LED port with the write command, starting from the least port’s least significant bit. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 5 through 8 are ignored. On power application, all LEDs are unlit.

MSB LSB

- - - - b3 b2 b1 b0

Don't care

LED1

LED2

LED3

LED4

4.0 Key Matrix and Key-Input data Storage RAM

The key matrix is made up of a 6×4 matrix, as shown below.

1

KEY

2

KEY

3

KEY

4

KEY

1

2

3

4

5

6

/KS

1

Seg

2

Seg

3

Seg

4

Seg

5

Seg

/KS

6

Seg

The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit.

...

KEY1

Seg1/KS

Seg3/KS

Seg5/KS

KEY4 KEY1

1

3

5

...

Seg2/KS

Seg4/KS

Seg6/KS

b4--------b7b0--------b3

KEY4

2

4

Reading sequence

6

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

5.0 SW Data

SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0.

MSB LSB

0 0 0 0 b3 b2 b1 b0

SW1

SW2

SW3

SW4

Timing Diagram



(1) Serial Communication Format

Reception (command/write data)

STB

If data continues

AD6312

D

IN

b7b6b2b1b0

87321CLK

Transmission (read data)

STB

b7b6b5b4b3b2b1b0

87654321

WAIT

t

(Note)

b0 b1 b2 b3 b4 b5

Data is read.A data read command is set.

654321

CLK

D

OUT

IN

Because the D

pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to

OUT

this pin (1kΩ to 10 kΩ).

Note : When data is read, a wait time t falling of the first clock that has read the data.

of 1 μs is necessary since the rising of the eighth clock that has set the command, until the

WAIT

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

(2) Key Scanning and Display Timing

On cycle of key scanning consists of one frame, and data in a 6×4 matrix is stored in RAM.

DISP

T

≅

500μs

Key scan data

AD6312

SEG Output

Grid1

Grid2

Grid3

Gridn

DIG1 DIG2 DIG3

1/16

DISP

T

Switching characteristic waveforms

OSC

50%

STB

fosc

1 frame = T

DISP

×

(n+1)

DIGn

123456

PW

DIG1

STB

90%

10%

PW

t

CLK

HOLD

t

THZ

t

PZL

t

CLK-STB

t

PLZ

t

TZH

CLK

D

IN

D

OUT

Sn/Gn

PW

t

SETUP

CLK

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

Applications

Updating display memory by incrementing address

STB

CLK

AD6312

IN

Command 4Data nCommand 3Command 2Command 1 Data 1D

Command 1: sets display mode Command 2: sets data(write data to display memory) Command 3: sets address Data 1 to n: transfers display data (22bytes max.) Command 4: controls display

Updating specific display memory

STB

CLK

IN

DataCommand 2Command 2 DataCommand 1D

Command 1: sets data Command 2: sets address Data: display data

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

Package Information



(1) Package Type: QFP-44L

Dimension in millimeter (mm.)

±

0.5

13.2

±

0.5

10.0

33 23

AD6312

2.7(MAX.)

34

44

111

22

12

1.6 TYP.

10.0

±

0.5

13.2

±

0.5

0.15 TYP.

0.88 TYP.0.8 TYP.0.3 TYP.

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

(2) Package Type: LQFP-44L

( Top View )

AD6312

PIN 1 INDENT

E

E1

D1

D

A

A2

A1

y

DETAIL A

be

12o(4X)

C

DETAIL A

L

L1

R0.08 MIN.

θ

0.25 GAGE PLANE

Symbol

Dimensions In Millimeters Dimensions In Inches

Min. Nom. Max. Min. Nom. Max.

A - - 1.60 - - 0.063 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 1.35 1.40 1.45 0.053 0.055 0.057

b 0.30 0.37 0.45 0.012 0.015 0.018

C 0.09 - 0.20 0.004 - 0.008

E 11.50 12.00 12.50 0.453 0.472 0.492 E1 9.50 10.00 10.50 0.374 0.394 0.413

D 11.80 12.00 12.20 0.465 0.472 0.480 D1 9.90 10.00 10.10 0.390 0.394 0.398

e - 0.80 - - 0.031 -

L 0.45 0.60 0.75 0.018 0.024 0.030

L1 - 1.00 - - 0.039 -

θ 0˚ 3.5˚ 7˚ 0˚ 3.5˚ 7˚

y 0.00 - 0.08 0.000 - 0.003

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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1/4- to 1/11 Duty VFD Controller/Driver

Marking Information



Top view

AD6312

AC

Part Number

AD6312 X

XX

XXX

XX

QFP44/LQFP44

Logo

Blank: Normal F: Lead Free Package

ID code: internal Nth week: 01~52 Year:

"01" = 2001 "02" = 2002

Anachip Corp. www.anachip.com.tw Rev. A4 Dec 29, 2003

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