Datasheet AD53041KRP Datasheet (Analog Devices)

High Speed Active Load

a

FEATURES ⴞ50 mA Voltage Programmable Current Range Three Selectable Gain Ranges

1.7 ns Propagation Delay
Inhibit Mode Function
High Speed Differential Inputs for Maximum Flexibility
Ultrasmall 20-Lead PSOP Package with Built-In Heatsink

APPLICATIONS
Automatic Test Equipment
Semiconductor Test Systems
Board Test Systems

PRODUCT DESCRIPTION

The AD53041 is a complete, high speed, current switching load
designed for use in linear, digital or mixed signal test systems.
Combining a high speed monolithic process with a unique sur­face mount package, this product attains superb electrical per­formance while preserving optimum packaging densities in an
ultrasmall 20-lead, PSOP package with a built-in heatsink.

Featuring current programmability of up to ±50 mA, the

AD53041 is designed to force the device under test to source
or sink the programmed I
currents are determined by applying a corresponding voltage
(5 V = 50 mA, 16 mA, 5 mA) to the I
The voltage-to-current conversion is performed within the
AD53041, thus allowing the current levels to be set by a stan­dard voltage out digital-to-analog converter.

The AD53041 transition from I
put voltage of the device under test slews above or below the
programmed threshold or commutation voltage. The commuta­tion voltage is programmable from –2 V to +7 V, covering the
large spectrum of logic devices while able to support the large
current specifications (48 mA) typically associated with line
drivers. To test I/O devices, the active load can be switched into
a high impedance state (Inhibit Mode), electrically removing the
active load from the path through the Inhibit Mode feature. The
active load leakage current in Inhibit is typically 100 nA.

The Inhibit input circuitry is implemented using high speed
differential inputs with a common-mode voltage range of
–2 V to +3 V and a maximum differential voltage of 3 V. This
allows for direct interface to precision differential ECL timing or
the simplicity of switching active load from a single ended TTL
or CMOS logic source. With switching speeds from I
into Inhibit of less than 2.0 ns, the AD53041 can be electrically
removed from the signal path “on the fly.”

OH

and I

currents. IOH and I

OL

and I

OHPGM

to IOL occurs when the out-

OH

OLPGM

or I

OH

OL

pins.

OL

with Inhibit Mode

AD53041

FUNCTIONAL BLOCK DIAGRAM

GAINA

GAINB

I

OLPGM

INH

INH

I

OHPGM

AD53041

V

COMIN

OUT_SENSE

GAINA GAINB FULL-SCALE CURRENT

0
0
1
1

The AD53041 is available in a 20-lead, PSOP package with a
built-in-heatsink and is specified to operate over the ambient

commercial temperature range from –25°C to +85°C.

INH

INH

I

OHPGM

V

COMIN

I

OLPGM

GAINA

GAINB

NOT SHOWN: THE AGND PINS ARE THE HIGH QUALITY GROUND
REFERENCE FOR THE VOLTAGE-TO-CURRENT CONVERTERS.
THE GND PINS PROVIDE RETURN PATHS FOR INTERNAL CURRENTS.

IS THE POSITIVE SUPPLY, VEE IS THE NEGATIVE SUPPLY.

V

CC

ALL GROUND PINS SHOULD BE CONNECTED TO THE SYSTEM
ANALOG GROUND PLANE.

AD53041

OUT_SENSE

GND

Figure 1. Typical Application Circuit

VOLTAGE-TO-CURRENT

VOLTAGE-TO-CURRENT

0
1
0
1

AGND

I

OLOUT

V

COMOUT

0.1␮F

I

OHOUT

I

OLRTN

I

OHRTN

CONVERTER

CONVERTER

V

COM

BUFFER

50mA
16mA

5mA

NOT VALID

0.1␮F 0.1␮F

1Ω

I

OLOUT

I

OLRTN

I

OHRTN

I

OHOUT

V

COMOUT

HSMS-2818
OR EQUIV.

V

CC

V

EE

TO DUT

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

AD53041–SPECIFICATIONS

–5.2 V ⴞ 3% unless otherwise specified. V

is bypassed to ground with a series RC consisting of a 1 ⍀ resistor and a 0.1 ␮F capacitor,

COMOUT

(All specifications apply at TJ = +85ⴗC ⴞ 5ⴗC. +VS = +10.5 V ⴞ 3%, –VS =

and is also connected directly to OUT_SENSE. All temperature coefficients are characterized over TJ = 75ⴗC–95ⴗC.)

Parameter Min Typ Max Units Test Conditions

INPUT CHARACTERISTICS

INH, INH

Input Voltage –2 ECL 0 V
Bias Current –1 1 mA INH, INH = –2 V, 0 V

GAINA, GAINB

Input Voltage 0 TTL/CMOS 5 V
Bias Current 0 2 mA GAINA, GAINB = 5 V

V

I

I

COM

, I

OHPGM

I

, 0 to + Full Scale, Any Gain Range –0.1 5.2 V V(I

OH

I

, 0 to – Full Scale, Any Gain Range –0.1 5.2 V V(I

OL

, I

OHPGM

BUFFER

Voltage Range

OLPGM

Bias Current –300 300 µA V(I

OLPGM

OHOUT

) = –2 V, 7 V

OLOUT

OHPGM

) = –2 V, 7 V

) = +5 V, V(I

OLPGM

Voltage Range –2 7 V ±50 mA Output Current
Offset ±5mVV
Offset Drift 0.1 mV/°CV
Nonlinearity ±5mVV
Input Bias Current –50 50 µAV
Output Resistance <1 Ω V

= 0 V

COM

= 0 V

COM

= –2 V to 7 V

COM

= –2 V to 7 V

COM

= 0 V, I

COM

= ±50 mA

OUT

OUTPUT CHARACTERISTICS

Full-Scale Current Range See Functional Block Diagram

Range 0 50 mA
Range 1 16 mA
Range 2 5 mA

Offset Error V(I

Range 0 –1 1 mA V(I

OHPGM

OHOUT

) = V(I

) = ±2 V, V(I

OLPGM

) = 100 mV,

OLOUT

Range 1 –0.3 0.3 mA
Range 2 –0.3 0.3 mA

Offset Drift V(I

Range 0 1 µA/°CV(I

OHPGM

OHOUT

) = V(I
) = V(I

OLPGM

OLOUT

) = 100 mV,

) = 0 V

Range 1 1 µA/°C
Range 2 1 µA/°C

Gain Error

Range 0 <1 % FSR
Range 1 <5 % FSR
Range 2 <8 % FSR

Gain Drift

Range 0 1 µA/°C
Range 1 0.5 µA/°C
Range 2 0.3 µA/°C

Gain Ratio Drift

Range 1 to Range 0 0.01 %/°C

Range 2 to Range 0 0.01 %/°C
Nonlinearity ±0.05 % FSR Range 0
Common-Mode Error ±0.05 %FSR Range 0
PSRR ±0.1 %FSR/V Range 0, V(I

OHPGM

) = V(I

OLPGM

= 100 mV, Either Supply Over Operating
Range

) = 0 V

) = ±2 V

)

OUTPUT VOLTAGE RANGE

, I

I

OHOUT

I

OLOUT

, I

OLRTN

OHRTN

–2.5 7.5 V IOH = 50 mA
–2.5 7.5 V IOL = 50 mA

–2–

REV. A

AD53041

Parameter Min Typ Max Units Test Conditions

LEAKAGE CURRENTS Range 0, Bridge Diode Leakage Not Included

Inhibit-Mode Leakage –1 1 µA V(I

I

OH

I

Inhibit-Mode Leakage –1 1 µA V(I

OL

I

Off-State Leakage –3 3 µAV(I

OH

= –0.2 V

Off-State Leakage –3 3 µAV(I

I

OL

= –0.2 V

DYNAMIC PERFORMANCE

Propagation Delays

to Inhibit 1.4 ns Range 0, I

±I

MAX

Part-to-Part Skew 1 ns

Inhibit to ±I

MAX

1.9 ns Range 0, I

Part-to-Part Skew 1 ns

Propagation Delay Drift 10 ps/°C ±I

Capacitance 3 pF I

OHOUT

POWER SUPPLIES

to +VS Range 15.2 15.7 16.2 V

–V

S

Positive Supply Range 10.2 10.5 10.8 V
Negative Supply Range –5.4 –5.2 –5.0 V
Positive Supply Current 160 mA Range 0, V(I

V(I

10 60 mA Range 0, V(I

V(I

Negative Supply Current 160 mA Range 0, V(I

V(I

10 60 mA Range 0, V(I

V(I

Power Dissipation 2.1 2.3 W I

OH

V(I

NOTES
Typical values are not tested or guaranteed.
Specifications subject to change without notice.

Table I. Active Load Truth Table

(Including External Diode Bridge per Figure 1; Scale Factors per Functional Block Diagram)

) = –2.5 V to 7.5 V, Inhibited

OHOUT

) = –2.5 V to 7.5 V, Inhibited

OLOUT

) = –2.5 V to 7.5 V, V(I

OHOUT

) = –2.5 V to 7.5 V, V(I

OLOUT

, R

MAX

, R

MAX

to Inhibit, Inhibit to ±I

MAX

or I

OLOUT

OHPGM

) = 5.0 V, Active

OLPGM

OHPGM

) = 200 mV, Active

OLPGM

OHPGM

) = 5.0 V, Active

OLPGM

OHPGM

) = 200 mV, Active

OLPGM

= 50 Ω

LOAD

= 50 Ω

LOAD

MAX

Without Diodes

) =

) =

) =

) =

= 50 mA, IOL = –50 mA, Active,

OHOUT

) = 7 V, V(I

OLOUT

) = –2 V

OHPGM

OLPGM

)

)

OUTPUT STATES (IFS Is Full-Scale Current Set by GAINA, GAINB)

V(DUT) INH INH I

< V
> V

COM

COM

0 1 [V(I
0 1 [V(I

OH

) ÷ 5 V] × IFS [V(I

OHPGM

) ÷ 5 V] × IFS [V(I

OHPGM

I

OL

) ÷ 5 V] × IFS I

OLPGM

) ÷ 5 V] × IFS I

OLPGM

I(VDUT)

OL

OH

X10 0 0 0

V

Vact–
Vact+

ECL+

ECL–

DUT

V

DUT

t

pdAH

t

pdAL

t

pdIH

t

pdIL

PROPAGATION DELAY LOAD AND TEST CONDITIONS

PARAMETER

t

pdAH

t

pdIL

t

pdAH

t

pdIH

DESCRIPTION

IOL Inh → Act

Act → Inh

I

OL

Inh → Act

I

OH

Act → Inh

I

OH

I

OL

50mA
50mA
50mA
50mA

I

OH

50mA
50mA
50mA
50mA

V

DUT

0V
0V
5V
5V

MEASURE POINT

0.50V

2.00V

4.50V

3.00V

Figure 2. Inhibit Propagation Delay Measurement

REV. A

–3–

AD53041

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

1

Power Supply Voltage

+V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12 V

S

–V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V

S

to –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V

+V

S

GND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.4 V

Inputs

INH, INH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –3 V

INH to INH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3 V

GAINA, GAINB . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –3 V

GAINA to GAINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 V

V
I

OHPGM

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8 V, –3 V

COMIN

, I

. . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –1 V

OLPGM

Outputs

I

OHOUT

I

OLOUT

V

COMOUT

, I

OHRTN

, I

OLRTN

Short Circuit Duration . . . . . . . . . Not Protected

. . . . . . . . . . . . . . . . . . . . . . . . +9 V, –2.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . +8 V, –3.5 V

2

Environmental

Operating Temperature (Junction) . . . . . . . . . . . . . .+175°C

Storage Temperature . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 sec)

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause per ma­nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Absolute maximum limits apply
individually, not in combination. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability.

2

Short circuit to ground or to either supply will result in the destruction of the
device.

3

To ensure lead coplanarity (±0.002 inches) and solderability, handling with bare
hands should be avoided and the device should be stored in environments at 24 °C
± 5°C (75°F ± 10°F) with relative humidity not to exceed 65%.

3

. . . . . . . . . . +260°C

PIN CONFIGURATION

DIMPLE ON BOTTOM
OF PACKAGE

OHPGM

20

GAINB

19

GAINA

18

DGND

17

V

CC

16

INH

15

INH

14

V

EE

13

DGND
AGND

12
11

OHPGM

.

1

AGND

2

I

OLPGM

3

I

OLOUT

4

I

OLRTN

V

COMIN

V

COMOUT

I

OHRTN

I

OHOUT

DGND
DGND I

NOTES:
AGND IS THE HIGH-QUALITY GROUND REFERENCE
FOR I

DGND IS THE SUPPLY GROUND.

OLPGM

AD53041

5

TOP VIEW

(Not to Scale)

6
7

8
9

10

AND I

PACKAGE THERMAL CHARACTERISTICS

Air Flow, FM ␪JC, ⴗC/W ␪JA, ⴗC/W

0450
50 4 49
400 4 34

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

20-Lead Thermally Enhanced

Power Small Outline Package (PSOP)

(RP-20)

C3004a–0–11/98

20

1

0.0500
(1.27)

0.5118 (13.00)

0.4961 (12.60)

0.3340 (8.61)

0.3287 (8.35)

BSC

HEAT

SINK

0.0201 (0.51)

0.0130 (0.33)

ORDERING GUIDE

Shipment Method,
Quantity

Package per Shipping Package

Model Description Container Option

AD53041KRP 20-Lead Power SOIC Tube, 38 Pieces RP-20

0.2992 (7.60)

0.2914 (7.40)

PIN 1

0.0118 (0.30)

0.0040 (0.10)
STANDOFF

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD53041 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

11

0.1890 (4.80)

0.1791 (4.55)

10

0.1043 (2.65)

0.0926 (2.35)

SEATING
PLANE

0.4193 (10.65)

0.3937 (10.00)

8°
0°

0.0500 (1.27)

0.0057 (0.40)

0.0295 (0.75)

0.0098 (0.25)

x 45°

PRINTED IN U.S.A.

–4–

REV. A