WLP 3.0 and 4.0
Security feature prevents unauthorized recording
2 stereo headphone amplifiers
Internal 32-bit arithmetic for greater accuracy
Impedance and presence detection on all jacks
Full analog mixer with DAC inputs
3 independent microphone bias pins
Digital and analog PCBeep
3 general-purpose digital I/O (GPIO) pins
3.3 V analog supply voltage
1.7 V to 1.9 V or 3.3 V digital supply voltages
3.3 V HD-Audio link signaling voltage
Advanced power management modes
48-lead LFCSP_VQ package
192 kHz DACs/ADCs
2 independent stereo DAC/ADC pairs
Simultaneous record of 2 stereo channels
Simultaneous playback of 2 stereo channels
Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz,
sample rates
16-, 20-, and 24-bit resolution
Selectable stereo mixer on outputs
STEREO DIGITAL MICROPHONE INTERFACE
Two 192 kHz digital microphone channels
Supports 1 or 2 microphones per pin
Selectable bit clock rates of 1.5 MHz, 2.0 MHz, and 3.0 MHz
Mono and stereo array support 8 kHz, 11.025 kHz, 16 kHz,
Second S/PDIF can support external HDMI interface
Supports 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and
192 kHz sample rates
16-, 20-, and 24-bit data; PCM and AC3 formats
Digital PCM gain control
AUXILIARY PINS
Stereo CD/auxiliary I/O port with ground sense
Stereo auxiliary/dock I/O port
Mono out pin for internal speakers or telephony
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
The AD1984B audio codec and SoundMAX® software provide
superior high definition audio quality that exceeds Vista Premium performance. The AD1984B has two 192 kHz DAC pairs,
two 192 kHz ADC pairs, dual S/PDIF outputs, a 2-channel digital microphone interface, and digital and analog PCBeep. These
features make the AD1984B the right choice for desktop and
notebook PCs where performance is key. For more information
on SoundMAX codecs and software see the Analog Devices,
Inc., website at www.analog.com/soundMAX.
The AD1984B has two S/PDIF outputs that can connect to both
S/PDIF jacks and external HDMI
The AD1984B is available in a 48-lead, RoHS compliant frame
chip scale package in both reels and trays. See Ordering Guide
on Page 18.
TM
encoder devices.
ADDITIONAL INFORMATION
This data sheet provides a general overview of the AD1984B
SoundMAX codec’s architecture and functionality. Detailed
widget information is available in the AD1984B Programmers
Reference Manual. Please contact your local ADI sales representative for more information.
JACK CONFIGURATION
The guidelines shown in Table 1 through Table 3 should be
used when selecting ports for particular functions.
Table 3. Typical Notebook Configuration with Dock
Interface
PortFunction
Port AHeadphone
Port BMicrophone
Port C Internal Microphone
Port D Dock Line-Out/Headphone
Port E Dock Line-In/Microphone
Port F Internal Stereo Speakers
S/PDIF-1Optical/RCA S/PDIF Output
S/PDIF-2 HDMI Encoder Audio Source
Table 1. Typical Desktop Configuration
PortFunction
Port AFront Panel Headphone
Port BFront Panel Microphone
Port CRear Panel Line-In/Microphone
Port DRear Panel Line-Out/Headphone
S/PDIF-1Optical/RCA S/PDIF Output
S/PDIF-2HDMI Encoder Audio Source
Table 2. Typical Notebook Configuration
PortFunction
Port AHeadphone
Port BMicrophone
Port CInternal Microphone
Port FInternal Stereo Speakers
S/PDIF-1Optical/RCA S/PDIF Output
S/PDIF-2HDMI Encoder Audio Source
Rev. 0 | Page 3 of 20 | February 2008
Page 4
AD1984B
http://www.BDTIC.com/ADI
AD1984B SPECIFICATIONS
TEST CONDITIONS
ParameterTest Condition
Tem pe ra tu re
Digital Supply
Analog Supply
MIC_BIAS_IN (via Low-Pass Filter)
Sample Rate f
S
Input Signal (Frequency Sine Wave)
Amplitude for THD + N
Analog Output Pass Band
DAC10 kΩ Output Load: Line-Out Tests
ADC0 dB Gain
PERFORMANCE
ParameterMinTypMaxUnit
Line-Out Drive (10 kΩ loads—DAC to Pin)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to f
Signal-to-Noise Ratio
Headphone Drive (32 Ω loads—DAC to Pin)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to f
Signal-to-Noise Ratio
Microphone/Line-In (Pin to ADC, Mic Boost = 0 dB)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to f
Signal-to-Noise Ratio
25°C
3.3 V
3.3 V
5.0 V
48 kHz
1008 Hz
–3.0 dB Full Scale
20 Hz to 20 kHz
32 Ω Output Load: Headphone Tests
A-Weighted)
S
A-Weighted)
S
A-Weighted)
S
–86
96
96
–80
96
96
–81
90
90
dB
dB
dB
dB
dB
dB
dB
dB
dB
GENERAL SPECIFICATIONS
ParameterMinTypMaxUnit
DIGITAL DECIMATION AND INTERPOLATION FILTERS
Pass Band – fS (kHz) = 8 ~ 19200.4 f
Pass-Band Ripple– f
Stop Band – f
Stop-Band Rejection – f
Group Delay – f
(kHz) = 8 ~ 192±0.005dB
S
(kHz) = 8 ~ 1920.6 f
S
S
(kHz) = 8 ~ 192–100dB
S
(kHz) = 8 ~ 192201/f
Group Delay Variation over Pass Band0μs
ANALOG-TO-DIGITAL CONVERTERS
Resolution24Bits
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)±10%
Interchannel Gain Mismatch (Difference of Gain Errors)±0.2±0.5dB
ADC Offset Error
ADC Crosstalk
Resolution 24Bits
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
Interchannel Gain Mismatch (Difference of Gain Errors)±0.5dB
Total Audible Out-of-Band Energy (Measured from 0.6 × fS to 20 kHz)
DAC Crosstalk (Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT)
DAC VOLUMES
Step Size 1.5dB
Output Gain/Attenuation Range–58.50dB
Mute Attenuation of 0 dB Fundamental
1
ADC VOLUMES
StepSize 1.5dB
PGA Gain/Attenuation Range–58.5+22.5dB
Mute Attenuation of 0 dB Fundamental
1
ANALOG MIXER
Signal-to-Noise Ratio Input to Output—Ports B, C, E, or F to Port D Output 95dB
Step Size: All Mixer Inputs–1.5dB
Input Gain/Attenuation Range: All Mixer Inputs–34.5+12.0dB
Input Impedance
PCBeep
Ports B, C, E (Mic Boost = 0 dB)
Port F
Input Capacitance
1
1
1
1
–85dB
–95dB
±10%
–80dB
–80dB
V rms
2.83
1
1
1
1
10kΩ
190Ω
15pF
1000pF
V p-p
V rms
2.83
1
1
1
1
32Ω
15pF
0.5Ω
1000pF
V p-p
V rms
2.83
V p-p
V rms
0.894
V p-p
V rms
0.283
V p-p
V rms
0.089
23
150
45
V p-p
kΩ
kΩ
kΩ
57.5pF
Rev. 0 | Page 5 of 20 | February 2008
Page 6
AD1984B
http://www.BDTIC.com/ADI
ParameterMinTypMaxUnit
MICROPHONE BIAS
MIC_BIAS-B, MIC_BIAS-C
MIC_BIAS_IN (Pin 33) = 5 V or 3.3 VV
V
MIC_BIAS_IN (Pin 33) = 5 VV
V
MIC_BIAS_IN (Pin 33) = 3.3 VV
Setting = High-ZHigh-Z
REF
V
Setting = 0 V0 V dc
REF
Setting = 50%1.65V dc
REF
Setting = 80%3.7V dc
REF
Setting = 100%3.9V dc
REF
Setting = 80%2.86V dc
REF
V
Setting = 100%3.0V dc
REF
MIC_BIAS-E (When Enabled as BIAS)V
Output Drive CurrentV
Setting = High-ZHigh-Z
REF
Setting = 0 V0 V dc
V
REF
V
Setting = 50%1.65 V dc
REF
Setting = 80%2.86 V dc
V
REF
V
Setting = 100%3.0 V dc
REF
Setting = 50%, 80%, or 100%1.6mA
REF
GPIO 0
Input Signal High (VIH)DV
Input Signal Low (V
Output Signal High (V
Output Signal Low (V
Input Leakage Current (Signal High) (I
Input Leakage Current (Signal Low) (I
)0DV
IL
) I
OH
)I
OL
IH
)–50μA
IL
= –500 μADV
OUT
= +1500 μA0DV
OUT
)150nA
× 0.60DV
IO
× 0.72DV
IO
IO
× 0.24V
IO
IO
× 0.10V
IO
V
V
GPIO 1 and 2
Input Signal High (VIH)AV
Input Signal Low (V
Output Signal High (V
Output Signal Low (V
Input Leakage Current (Signal High) (I
Input Leakage Current (Signal Low) (I
)0AV
IL
)I
OH
)I
OL
IH
)–50μA
IL
= –500 μAAV
OUT
= +1500 μA0AV
OUT
)150nA
× 0.60AV
DD
× 0.72AV
DD
DD
× 0.24 V
DD
DD
× 0.10 V
DD
V
V
DM Clock
Output Signal High (VOH)I
Output Signal Low (V
)I
OL
= –500 μAAV
OUT
= +1500 μA0AV
OUT
× 0.72AV
DD
DD
× 0.10 V
DD
V
DM 1/2 and DM_2
Input Signal High (V
Input Signal Low (V
)AV
IH
)0AV
IL
Input Leakage Current (Signal High) (I
Input Leakage Current (Signal Low) (I
)–150nA
IH
)–50nA
IL
× 0.60AV
DD
DD
× 0.24 V
DD
V
S/PDIF-Out-1 and S/PDIF-Out-2
Input Signal High (V
Input Signal Low (V
Output Signal High (V
Output Signal Low (V
)DV
IH
)0DV
IL
) I
OH
)I
OL
Input Leakage Current (Signal High) (I
Input Leakage Current (Signal Low) (I
= –500 μADV
OUT
= +1500 μA0DV
OUT
)150nA
IH
)–50μA
IL
× 0.60DV
IO
× 0.72DV
IO
IO
× 0.24V
IO
IO
× 0.10V
IO
V
V
Rev. 0 | Page 6 of 20 | February 2008
Page 7
AD1984B
http://www.BDTIC.com/ADI
ParameterMinTypMaxUnit
POWER SUPPLY
Analog (AV
Power Supply Range
Power Dissipation
Supply Current
Digital (DVDD) 3.3 V ±10%
Power Supply Range
Power Dissipation
Supply Current
Digital (DV
Power Supply Range
Power Dissipation
Supply Current
Digital I/O (DV
Power Supply Range
Power Dissipation
Supply Current
Power Supply Rejection (Reference to f
1
Guaranteed but not tested.
HD–AUDIO LINK SPECIFICATION
High definition audio signals comply with the High Definition
Audio Specification. Please refer to these specifications at
www.intel.com/standards/hdaudio.
) 3.3 V ±5%
DD
) 1.7 through 1.9 V ±10%
DD
) 3.3 V ±10%
IO
3.13 3.30
3.46V
75.9
23
2.973.30
3.63V
141.9
43
1.6151.70
1.995V
61
36
2.973.30
3.63V
3.3
1
100 mV p-p Signal @ 1 kHz)1 80dB
S
mW
mA
mW
mA
mW
mA
mW
mA
POWER-DOWN STATES
ParameterID
Function node in D0, All Nodes Active364323mA
Function Node in D315.75171mA
Codec in RESET
Individual block power savings
DAC Pair Powered Down Saves (Each)
ADC Pair Powered Down Saves (Each)
Mixer Power Control (and Associated Amps) Saves
DM_CLK Powered Down Saves
MIC_BIAS Powered Down Saves
1
Test conditions: 30 pF load, 2.0 MHz frequency, 3.3 V A
2
Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the high-Z state. The
0 V and high-Z states remain unaffected by the MIC_BIAS power state.
1
2
VDD.
Typ (1.7 V )ID
VDD
Typ (3.3 V)IA
VDD
TypUnit
VDD
333mA
4.5
4.5
0
0
0
6
6
0
0
0
5
3
2
1
0.1
mA
mA
mA
mA
mA
Rev. 0 | Page 7 of 20 | February 2008
Page 8
AD1984B
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid
performance degradation or loss of functionality.
http://www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed below may cause permanent
damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above
those indicated in the operational section of this specification is
not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
ParameterRating
Digital (DV
Digital (DV
Digital I/O (DV
Analog (AV
)–0.30 V to +3.65 V
DD
)–0.30 V to +2.10 V
CORE
)–0.30 V to +3.65 V
IO
)–0.30 V to +3.65 V
DD
Input Current (except supply pins) ±10.0 mA
Analog Input Voltage (Signal Pins) –0.30 V to AVDD +0.3 V
Digital Input Voltage (Signal Pins)–0.30 V to DV
+0.3 V
IO
Ambient Temperature (Operating) 0°C to +70°C
Storage Temperature–65°C to +150°C
ESD CAUTION
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating:
T
= T
AMB
T
CASE
PD = power dissipation in W
= thermal resistance (case-to-ambient)
θ
CA
θ
= thermal resistance (junction-to-ambient)
JA
θ
= thermal resistance (junction-to-case)
JC
All measurements per EIA-JESD51 with 2S2P test board per
EIA-JESD51-7.
Packageθ
LFCSP_VQ471532°C/W
– (PD × θCA)
CASE
= case temperature in °C
JA
θ
JC
θ
CA
Unit
Rev. 0 | Page 8 of 20 | February 2008
Page 9
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
11
12
242313 1415 16 1718 19 20 21 22
34
33
36
35
25
26
27
28
29
30
31
32
44 4347484546373839404142
AD1984BJCP
TOP VIEW
(Not To Scale)
DV
CORE
DM_1/2
DV
IO
DM_2
SDATA_OUT
BIT_CLK
DV
SS
SDATA_IN
DV
DD
SYNC
RESET
PCBEEP
PORT-D_R
PORT-D_L
P
O
R
T
-
C
_
R
P
O
R
T
-
C
_
L
P
O
R
T
-
B
_
R
P
O
R
T
-
E
_
L
P
O
R
T
-
F
_
R
P
O
R
T
-
F
_
L
P
O
R
T
-
B
_
L
P
O
R
T
-
E
_
R
C
D
_
G
N
D
(
P
O
R
T
-
F
)
S
E
N
S
E
_
A
/
S
R
C
_
B
SENSE_B/SRC_A
P
O
R
T
-
A
_
L
P
O
R
T
-
A
_
R
E
A
P
D
/
G
P
I
O
_
0
R
E
S
E
R
V
E
D
(
N
C
)
A
V
D
D
D
M
_
C
L
K
R
E
S
E
R
V
E
D
(
N
C
)
R
E
S
E
R
V
E
D
(
N
C
)
A
V
S
S
S
P
D
I
F
_
O
U
T
-
1
R
E
S
E
R
V
E
D
(
N
C
)
MIC_BIAS_IN
MIC_BIAS-B
MIC_BIAS-C
GPIO_2
MIC_BIAS-E/GPIO_1
MONO_OUT
AV
DD
AV
SS
VREF_FLT
R
E
S
E
R
V
E
D
(
N
C
)
R
E
S
E
R
V
E
D
(
N
C
)
R
E
S
E
R
V
E
D
(
N
C
)
http://www.BDTIC.com/ADI
AD1984B
Figure 2. AD1984B 48-Lead Package and Pinout
Rev. 0 | Page 9 of 20 | February 2008
Page 10
AD1984B
http://www.BDTIC.com/ADI
Table 4. Pin Function Descriptions
MnemonicPin No.I/ODescription
DIGITAL INTERFACE
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
RESET
DIGITAL I/O and EAPD
DM_1/2
DM_2
DM_CLK
GPIO_2
MIC_BIAS-E/GPIO_1
EAPD/GPIO_0
S/PDIF_OUT-2
S/PDIF_OUT-1
JACK SENSE
SENSE_A/SRC_B
SENSE_B/SRC_A
ANALOG I/O
PCBEEP
Port-E_L
Port-E_R
Port-F_L
Port-F_R
CD_GND
Port-B_L
Port-B_R
Port-C_L
Port-C_R
MONO_OUT
Port-D_L
Port-D_R
Port-A_L
Port-A_R
The symbols used in this table are defined as: I = input, O = output, LI = line level input, LO = line level output, HP = outpu
head
pho
ne load, MIC = input supports microphones with MIC bias and boost amplifier.
5
6
8
10
11
2
4
46
30
31
47
45
48
13
34
12
14
15
16
17
19
21
22
23
24
32
35
36
39
41
I
I
I/O
I
I
I
I
O
I/O
I/O
I/O
O
O
I/O
I/O
LI
LI, MIC, LO
LI, MIC, LO
LI, LO
LI, LO
I
LI, MIC
LI, MIC
LI, MIC
LI, MIC
LO
HP, LO
HP, LO
HP, LO
HP, LO
Link Serial Data Output. AD1984B input stream. Clocked on both edges of the
BIT_CLK.
Link Bit Clock. 24.000 MHz serial data clock.
Link Serial Data Input. AD1984B output stream clocked only on one edge of BIT_CLK.
Link Frame Sync.
Link Reset. AD1984B master hardware reset.
Digital microphone 1 and 2 Inputs (for Biphase Microphones), or Digital Microphone
1 Input (for Single-phase Microphones).
Digital microphone 2 Input (for Single-phase Microphones).
Clock to drive external digital microphones.
General Purpose Input/Output Pins. Digital signals used to control or sense external
circuitry.
Microphone Bias for Port E/General-Purpose Input/Output. Capable of High-Z, 1.65 V,
and 2.86 V. Pin 31 shares functionality between MIC_BIAS_E (default) and GPIO_1.
These functions are mutually exclusive and the MIC_BIAS function takes priority over
the GPIO function.
EAPD/General-Purpose Input/Output pin. Pin 47 shares functionality between
GPIO_0 and EAPD. These functions are mutually exclusive and the EAPD function
takes priority over the GPIO function. By default, the pin is in a High-Z state. External
resistors should be used to ensure the proper circuit state when this pin is in High-Z.
Supports S/PDIF Output. Typically used as an audio interface to an external HDMI
encoder.
Supports S/PDIF Output.
Jack Sense A-D Input/Sense B drive.
Jack Sense E-F Input/Sense A drive.
Monaural Input from System for Analog PCBeep.
Auxiliary Input/Output Left Channel.
Auxiliary Input/Output Right Channel.
Auxiliary Input/Output Left Channel.
Auxiliary Input/Output Right Channel.
CD-Audio-Analog-Ground-Reference. Must be connected to AGND via a 0.1 μF
capacitor if not in use as CD_GND. MUST always be ac-coupled.
Front Panel Stereo MIC/Line-In.
Front Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.
Rear Panel Headphone/Line-Out.
Rear Panel Headphone/Line-Out.
Front Panel Headphone/Line-Out.
Front Panel Headphone/Line-Out.
t capable of driving
Rev. 0 | Page 10 of 20 | February 2008
Page 11
AD1984B
http://www.BDTIC.com/ADI
Table 4. Pin Function Descriptions (Continued)
MnemonicPin No.I/ODescription
FILTER/MIC_BIAS
V
_FILT
REF
MIC_BIAS-B
MIC_BIAS-C
MIC_BIAS_IN
5.0 V or 3.3 V
POWER AND GROUND
DV
1.7 V to 1.9 V or
CORE
FILTER
DV
3.3 V3ILink Digital I/O Voltage Reference. 3.3 V ± 10%
IO
DV
SS
DV
1.7 V to 1.9 V or 3.3 V 9IDigital Supply Voltage 3.3 V ± 10%. This is regulated down to DV
DD
3.3 V25, 38ICAUTION: DO NOT APPLY 5 V TO THESE PINS! Analog Supply Voltage 3.3 V ONLY.
AV
DD
AV
SS
The symbols used in this table are defined as: I = input, O = output, LI = line level input, LO = line level output, HP = output capable of driving
headphone load, MIC = input supports microphones with MIC bias and boost amplifier.
27
28
29
O
O
O
Voltage Reference Filter.
Switchable Microphone Bias. For use with Port B (Pins 21, 22).
Switchable Microphone Bias. For use with Port C (Pins 23, 24).
Both MIC bias pins are capable of High-Z, 0 V, 1.65 V, 3.7 V, and 3.9 V (with 5.0 V on
Pin 33), High-Z, 0 V, 1.65 V, 2.86 V, and 3.0 V (with 3.3 V on Pin 33).
33
I
Source Power for Microphone Bias Boost Circuitry.
Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1984B
is capable of providing 3.9 V as a mic bias to all of the mic bias pins (except on Pin 31).
If 5 V is not available, connect this pin to 3.3 V (AV
) via a low-pass filter.
DD
1I/OCAUTION: DO NOT APPLY 3.3 V TO THIS PIN! Filter connection for internal core
voltage regulator.
If Pin 9 is connected to 3.3 V DV
1.0 μF and 0.1μF connected in parallel between Pin 1 and DV
, this pin must be connected to filter caps: 10 μF,
DD
(Pin 7). Direct, filtered
SS
1.7 V to 1.9 V DVDD may be applied to Pin 1 to lower the digital power requirements.
Pin 9 MUST be connected to pin 1 in this case.
7IDigital Supply Return (Ground).
on Pin 1 to
CORE
supply the internal digital core internal to the AD1984B. Direct, filtered 1.7 V to 1.9 V
DVDD may be applied to Pin 1 to lower the digital power requirements. Pin 9 MUST be
connected to Pin 1 in this case.
Note: AV
supplies should be well regulated and filtered as supply noise degrades
DD
audio performance.
26, 42IAnalog Supply Return (Ground). AVSS should be connected to DVSS using a
conductive trace under, or close to, the AD1984B.
Rev. 0 | Page 11 of 20 | February 2008
Page 12
AD1984B
DM_CLK
t
1
t
2
t
3
DM_1/2
t
0
DATA VALID
t
4
DM_CLK
t
1
t
2
t
3
DM_2
t
0
DATA VALID
t
4
http://www.BDTIC.com/ADI
DIGITAL MICROPHONE INTERFACE TIMING SPECIFICATIONS
The digital microphone interface can support one or two digital
microphones using two or three codec pins. Both uniplex (one
microphone per data pin) and multiplex (two microphones
sharing the same data pin) are supported. The timing for these
configurations is shown in Table 5 and Figure 3, Figure 4 and
Figure 5. The interface can generate a microphone clock at 1.5
MHz, 2.0 MHz, or 3.0 MHz to suit quality and power
requirements.
Table 5. Microphone Timing Parameters
ParameterDescriptionMinTypMaxUnit
Timing Requirements
t
0
t
0
t
0
t
1
t
2
t
3
t
4
DM_CLK (1.5 MHz) Period
Duty Cycle
DM_CLK (2.0 MHz) Period
Duty Cycle
DM_CLK (3.0 MHz) Period
Duty Cycle
667
50/50
500
50/50
333
50/50
ns
%
ns
%
ns
%
DM_CLK Rise Time5ns
DM_CLK Fall Time5ns
Data Setup to DM_CLK Edge10ns
Data Hold from DM_CLK Edge5ns
Figure 3. Uniplex Microphone Timing
Figure 4. DM_2 Uniplex Microphone Timing
Rev. 0 | Page 12 of 20 | February 2008
Page 13
HD AUDIO WIDGETS
DM_CLK
t
1
t
2
t
3
DM_1/2
t
0
LEFT DATA VALID
RIGHT DATA VALIDLEFT DATA VALID
t
4
t
3
t
4
http://www.BDTIC.com/ADI
AD1984B
Figure 5. Multiplex Microphone Timing
Table 6. HD Audio Widgets
1
Node ID NameType IDTypeDescription
0x00ROOTxRootDevice identification
0x01FUNCTIONxFunctionDesignates this device as an audio codec
0x02S/PDIF-1 DAC0Audio OutputS/PDIF digital stream output interface
0x03DAC_00Audio OutputStereo headphone channel digital/audio converter
0x04DAC_10Audio OutputStereo front channel digital/audio converter
0x06S/PDIF-2 DAC0Audio OutputS/PDIF digital stream output interface (typically for HDMI)
0x07Port A Mixer2Audio MixerMixes the of DAC_(0, 1) and analog mixer output to drive Port A
0x08ADC_01Audio InputStereo record Channel 0 audio/digital converters
0x09ADC_11Audio InputStereo record Channel 1 audio/digital converters
0x0APort D Mixer2Audio MixerMixes the DAC_1 and analog mixer output to drive Port D
0x0BPort F Mixer2Audio MixerMixes the DAC_(0, 1) and analog mixer output to drive Port F
0x0CADC Selector 03Audio SelectorSelects and amplifies/attenuates the input to ADC_0
0x0DADC Selector 13Audio SelectorSelects and amplifies/attenuates the input to ADC_1
0x0EMono Out Selector3Audio SelectorSelects the mono out DAC_(0, 1)
0x0FPort F Out Selector3Audio SelectorSelects the Port F DAC_(0, 1)
0x10Digital Beep7Beep GeneratorInternal digital PCBeep signal
0x11Port A (Headphone)4Pin ComplexHeadphone jack pins
0x12Port D (Line Out)4Pin ComplexLine out jack pins
0x13Mono Out4Pin ComplexMonaural output pin (internal speakers or telephony system)
0x14Port B (Mic In)4Pin ComplexMicrophone in jack pins
0x15Port C (Line In)4Pin ComplexLine in jack pins
0x16Port F (Aux In/Out)4Pin ComplexAuxiliary I/O pins
0x17Dig Mic Pin4Pin ComplexDigital microphone input pin
0x18S/PDIF Out-24Pin ComplexS/PDIF Out Pin recommended for HDMI
0x19Mixer Power Down5Power WidgetPowers down the analog mixer and associated amps
0x1AAnalog PCBeep4Pin ComplexExternal analog PCBeep signal input
0x1BS/PDIF Out-14Pin ComplexS/PDIF output pin
0x1CPort E (Dock I/O)4Pin ComplexAnalog dock I/O pins
0x1DV
Power DownFVendor DefinedPowers down the V
REF
circuitry
REF
0x1EMono Out Mixer2Audio MixerMixes the DAC_(0, 1) and analog mixer output to drive mono out
0x1FStereo Mix-Down2Audio MixerMixes the stereo L/R channels to drive mono output
0x20Analog Mixer2Audio MixerMixes individually gainable analog inputs
0x21Mixer Output Atten3Audio SelectorAttenuates the analog mixer output to drive the port mixers
0x22Port A Out Selector3Audio SelectorSelects the Port A DAC_(0, 1)
0x23Port E Out Selector3Audio SelectorSelects the Port E DAC_(0, 1)
0x24Port E Mixer2Audio MixerMixes the DAC_(0, 1) and analog mixer output to drive Port E
0x25Port E Mic Boost3Audio Selector0 dB, 10 dB, 20 dB, or 30 dB gain boost for Port E
1
All node IDs (NIDs) are sequential in the codec. Any NIDs missing for this table are vendor defined.
R = the MS bit of any node ID indicates a 2-tuple NID pair delineating a continuous range of nodes. If the MS bit is set (=1), that list entry forms a range of entries from the
previous NID to the current NID. For additional information, see chapter 7.1.2, “Node Addressing” in the High Definition Audio Specification.
1
NIDRNIDRNIDRNIDRNIDRNIDRNIDRNIDRNID
Rev. 0 | Page 16 of 20 | February 2008
Page 17
AD1984B
http://www.BDTIC.com/ADI
DEFAULT CONFIGURATION BYTES
Table 11. Default Configuration Bytes
Bits31:3029:2827:2423:20
Location
Connectivity
0x11Port A (Headphone)0x0321 40F0JackExternalLeftHP Out
0x12Port D (Line Out)0x2121 4010JackSeparateRearHP Out
0x13Mono Out0x9017 01F0FixedInternalN/ASpeaker
0x14Port B (Mic In)0x03A1 90F0JackExternalLeftMic In
0x15Port C (Line In)0xB7A7 0121FixedOtherSpecial 1Mic In
0x16Port F (Aux In/Out)0x9933 012EFixedInternalSpecial 3CD
0x17Dig Mic Pin0x97A6 01F0NoneOtherSpecial 1Mic In
0x18S/PDIF Out-20x9855 01F0FixedInternalSpecial 2Digital Out
0x1AAnalog PCBeep0x90F3 01F0FixedInternalN/AOther
0x1BS/PDIF Out-10x0145 10F0JackExternalRearS/PDIF Out
0x1CPort E (Dock I/O)0x21A1 9020JackSeparateRearMic In