The ACT–S512K8 is a high
speed, 4 Megabit CMOS
Monolithic SRAM designed for
full temperature range military,
space, or high reliability mass
memory and fast cache
applications.
The MCM is input and output
TTL compatible. Writing is
executed when the write
enable (WE
(CE
) inputs are low and output
enable (OE) is high.Readingis
accomplished when WE
and CE
Access time grades of 17ns,
20ns, 25ns, 35ns, 45ns and
55ns maximum are standard.
The +5 Volt power supply
version is standard and +3.3
Volt lower power model is a
future optional product.
) and chip enable
is high
and OE are both low.
The products are designed
Pin Description
0-7Data I/O
I/O
0–18Address Inputs
A
for operation over the
temperature range of -55°C to
+125°C and under the full
military environment. A DESC
WE
CE
OE
CCPower Supply
V
SSGround
V
NCNot Connected
Write Enable
Chip Enable
Output Enable
Standard Military Drawing
(SMD) number is released.
The ACT-S512K8 is
manufactured in Aeroflex’s
80,000 square foot
MIL-PRF-38534 certified
facility in Plainview, N.Y.
Page 2
Absolute Maximum Ratings
SymbolParameterMINIMUMMAXIMUMUnits
-55 +125°C
-65+150°C
-1.1W
-0.5V
+ 0.5V
CC
-0.5+7.0V
-+150°C
T
V
T
STG
P
V
CC
T
C
Case Operating Temp.
Storage Temperature
D
G
Maximum Package Power Dissipation
Maximum Signal Voltage to Ground
Power Supply Voltage
J
Junction Temperature
Recommended Operating Conditions
SymbolParameterMinimumMaximumUnits
V
CC
V
IH
V
IL
T
A
Power Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil)
+4.5+5.5V
+2.2V
+ 0.3V
CC
-0.5+0.8V
-55+125°C
Truth Table
ModeCEOEWEData I/OPower
StandbyHXXHigh ZStandby (deselect/power down)
ReadLLHData OUTActive
Output DisableLHHHigh ZActive (deselected)
WriteLXLData INActive
Capacitance
(V
= 0V, f = 1MHz, Tc = 25°C, unless otherwise noted, Guaranteed but not tested)
f=5MHz CMOS Compatible
CE = Vcc, OE= VIH, Vcc=5.5V,
I
SB
f=5MHz CMOS Compatible
V
IOL = 8 mA, Vcc = 4.5V
OL
V
IOH = -4 mA, Vcc = 4.5V
OH
CC
OUT
= 0toV
CC
ALL SPEEDS
Min Max
-10+10µA
-10+10µA
-170mA
-20mA
-0.4V
2.4-V
Units
Aeroflex Circuit TechnologySCD1664 REV C 5/10/00 Plainview NY (516) 694-6700
2
Page 3
Read Cycle
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Address Change
Output Enable to Output Valid
Chip Select to Output in Low Z (1)
Output Enable to Output in Low Z (1)
Chip Deselect to Output in High Z (1)
Output Disable to Output in High Z (1)
Note 1. Guaranteed by design, but not tested
Write Cycle
Parameter
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write (1)
Write to Output in High Z (1)
Data Hold from Write Time
Note 1. Guaranteed by design, but not tested
AC Characteristics
(VCC = 5.0V, VSS= 0V, Tc= -55°C to +125°C)
Sym
t
t
t
t
t
Sym
t
t
t
t
t
–017
Min Max
17-20-25-35-45-55-
t
RC
-17-20-25-35-45-55
t
AA
-17-20-25-35-45-55
ACS
0-0-0-0-0-0-
t
OH
-9-10-12-252525ns
t
OE
2-2-2-4-4-4-ns
CLZ
0-0-0-0-0-0-
OLZ
-9-10-12-15-20-20
CHZ
-9-10-12-15-20-20
OHZ
–017
Min Max
17-20-25-35-45-55-ns
WC
15-15-20-25-35-50-ns
CW
t
15-15-20-25-35-50-ns
AW
12-12-15-20-25-25-ns
DW
t
14-14-15-25-35-40-ns
WP
t
2-2-2-2-2-2-ns
AS
t
0-0-0-0-5-5-ns
AH
0-0-005-5-ns
OW
-9-9-10-15-20-25ns
WHZ
t
0-0-0-0-0-0-ns
DH
–020
Min Max
–020
Min Max
–025
Min Max
–025
Min Max
Min Max
Min Max
–035
–035
–045
Min Max
–045
Min Max
–055
Min Max
–055
Min Max
Units
ns
ns
ns
ns
ns
ns
ns
Units
Data Retention Electrical Characteristics (Special Order Only)
(Tc = -55°C to +125°C)
ParameterSymTest Conditions
for Data Retention
V
CC
Data Retention Current (1)
Available in Low Power version. Call For Information.
V
DR
I
CCDR1
CE ≥ V
V
CC
CC
= 3V
– 0.2V
ALL SPEEDS
Min Typ Max
2-5.5V
-0.57.0mA
Units
Truth Table
ModeCEOEWEData I/OPower
StandbyHXXHigh ZStandby (deselect/power down)
ReadLLHData OutActive
Output DisableLHHHigh ZActive (deselected)
WriteLXLData InActive
Aeroflex Circuit TechnologySCD1664 REV C 5/10/00 Plainview NY (516) 694-6700
3
Page 4
Timing Diagrams
Read Cycle Timing Diagrams
Read Cycle 1 (CE = OE = VIL, WE = VIH)
tRC
A0-18
tAA
tOH
DI/O
Read Cycle 2 (WE = VIH)
tRC
A0-18
tAA
CE
tACS
tCLZ
OE
DI/O
SEE NOTE
tOLZ
SEE NOTE
High Z
OE
t
Data ValidPrevious Data Valid
tCHZ
SEE NOTE
t
OHZ
SEE NOTE
Data Valid
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = VIL)
tWC
A0-16
tAWtAH
tWHZ
tCW
tDW
Data Valid
tWC
tAW
tCW
tWP
tDW
Data Valid
CE
tAStWP
WE
DI/O
Write Cycle 2 (CE
A0-18
tAS
CE
WE
DI/O
SEE NOTE
Controlled, OE = VIH )
tOW
SEE NOTE
tDH
tAH
tDH
UNDEFINED
DON’T CARE
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
IOL
ParameterTypicalUnits
Z ~ 1.5 V (Bipolar Supply)
To Device Under Test
CL =
50 pF
Current Source
V
Input and Output Timing Reference Level1.5V
IOH
Notes:
Z is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
1) V
O =75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
Z
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit TechnologySCD1664 REV C 5/10/00 Plainview NY (516) 694-6700
Aeroflex Circuit TechnologySCD1664 REV C 5/10/00 Plainview NY (516) 694-6700
7
Page 8
CIRCUIT TECHNOLOGY
Ordering Information
Model NumberDESC Part NumberSpeedPackage
ACT–S512K8N–017F3Q5962–9561310HUC17ns36 Lead Flat
ACT–S512K8N–020F3Q5962–9561309HUC20ns36 Lead Flat
ACT–S512K8N–025F3Q5962–9561308HUC25ns36 Lead Flat
ACT–S512K8N–035F3Q5962–9561307HUC35ns36 Lead Flat
ACT–S512K8N–045F3Q5962–9561306HUC45ns36 Lead Flat
ACT–S512K8N–055F3Q5962–9561305HUC55ns36 Lead Flat
ACT–S512K8N–017P4Q5962–9561310HYC17ns32 Pin DIP
ACT–S512K8N–020P4Q5962–9561309HYC20ns32 Pin DIP
ACT–S512K8N–025P4Q5962–9561308HYC25ns32 Pin DIP
ACT–S512K8N–035P4Q5962–9561307HYC35ns32 Pin DIP
ACT–S512K8N–045P4Q5962–9561306HYC45ns32 Pin DIP
ACT–S512K8N–055P4Q5962–9561305HYC55ns32 Pin DIP
ACT–S512K8N–017F4Q5962–9561310HZC17ns36 Lead CSOJ
ACT–S512K8N–020F4Q5962–9561309HZC20ns36 Lead CSOJ
ACT–S512K8N–025F4Q5962–9561308HZC25ns36 Lead CSOJ
ACT–S512K8N–035F4Q5962–9561307HZC35ns36 Lead CSOJ
ACT–S512K8N–045F4Q5962–9561306HZC45ns36 Lead CSOJ
ACT–S512K8N–055F4Q5962–9561305HZC55ns36 Lead CSOJ
* Pending
Model Number Breakdown
ACT– S 512K 8 N– 020 F4 Q
Aeroflex Circuit
Technology
Memory Type
S = SRAM
Memory Depth
Memory Width, Bits
Pinout Options
N = None
Memory Speed, ns
Specification subject to change without notice
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
Aeroflex Circuit TechnologySCD1664 REV C 5/10/00 Plainview NY (516) 694-6700
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
M = Military Temp, -55°C to +125°C, Screening
Q = MIL-PRF-38534 Compliant/SMD if applicable
Surface Mount Packages Thru-Hole Packages
F3 = 36 Pin FPP4 = 32 Pin DIP
F4 = 36 Pin CSOJ
*Screened to the individual test methods of MIL-STD-883
Telephone: (516) 694-6700
FAX: (516) 694-6715
Toll Free Inquiries: 1-(800) 843-1553
8
Screening
*
Package Type & Size
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