Datasheet ACT15530PS, ACT15530PI, ACT15530PC, ACT15530PB, ACT15530NS Datasheet (ACT)

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eroflex Circuit T
– Data Bus Modules For The Future © SCD15330 REV B 7/28/99
ACT15530
CMOS Manchester Encoder / Decoder
Features
• MIL-STD-1553 Compatible
• 1.25 Megabit/sec Maximum Data Rate
CIRCUIT TECHNOLOGY
www.aeroflex.com
• Sync Identification and Lock-in
• Manchester II Encode / Decode
• Separate Encoder and Decoder Sections
• Low Operating Power
• Military Temperature Range -55°C to +125°C
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data
Decoder Reset
Sync
1 2 3 4 5 6 7 8
9 10 11
SS
V
12
24
VDD
23
Encoder Clock
22
Send Clock In
21
Send Data
20
Sync Select
19
Encoder Enable
18
Serial Data In
17
Bipolar One Out
16
Output Inhibit Bipolar Zero Out
15
÷ ÷ 6 Out
14
Master Reset
13
Figure 1: Pin Assignments
• Monolithic – Single Chip – Construction
(24-Pin DIP/Flat Package – See Figure 18 for LCC Pkg)
• Available in Commercial and Industrial Temperature Ranges
• Several Package and Quality Options (Consult Factory for Details)
• Direct Replacement for the Obsolete Harris HD15530-9/-2/8 and GEC Plessey Marconi MA15530 / MAS15530 parts
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General Description
The ACT15530 is a high performance CMOS integrated circuit used to implement MIL-STD-1553 and similar Manchester II encoded, time division multiplexed, serial data protocols. The device is divided into two independent sections, encoder and decoder, with a common master reset. The function of the encoder section is to produce the sync pulse and parity bit, and encode the data bits. The decoder section recognizes the sync pulse, decodes the data bits and checks for parity.
The ACT15530 is fully guaranteed to support the 1 MHz data rate of MIL-STD-1553 over the full temperature and supply voltage ranges. The device interfaces with CMOS, TTL or N-Channel support circuitry and operates from a standard 5 volt supply. The circuit can also be used in many party line digital data communications applications where high reliability command and control signals are required. Using Aeroflex transceivers products (4400 Series) the Bit Error Rates (BER) and Word Error Rates (WER) of MIL-STD-1553 can be achieved (Refer to MIL-STD-1553 Multiplex Applications Handbook "MIL-HDBK-1553").
echnology
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Aeroflex Circuit Technology SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
Vss
12
Master Reset
13
Send Clock In
22
÷÷ 6 Out
14
Encoder
23
Clock
÷÷ 66
Bit
Counter
÷÷ 22
21 2 18 19 20
Output Inhibit
Character
Former
V
DD
17
Bipolar One Out
15
Bipolar Zero Out
24 16
Note: All Pin designations are for 24-Pin DIP & Flatpak
Figure 2: Encoder Block Diagram
Unipolar Data In
Bipolar One In
Bipolar Zero In
Decoder Clock
8 7
6
5
Transition
Finder
Synchronizer
Send
Data
Encoder
Shift
Clock
Send
Data In
Character
Bit Rate
Clock
Encoder
Enable
Identifier
Sync
Select
Parity Check
3
Take Data
10
Command / Data
4
Serial Data Out
1
Valid Word
Sync
Master Reset
Note: All Pin designations are for 24-Pin DIP & Flatpak
13
Decoder Reset
11
Bit Counter
9
Decoder Shift Clock
Figure 3: Decoder Block Diagram
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Pin Designations
Pin Input Output Enc Dec Function Comment
10
11
12
1 2
3
4 5
6
7
8
9
Valid word A 'high' signals the receipt of a valid word Encoder Shift Clock Shifts data into the encoder on a 'low' to 'high'
transition
Take Data 'high' during data reception after the sync pulse is
identified
Serial Data Out NRZ output of received data Decoder clock Clock for the transition finder and synchronizer which
generates the clock for the rest of the decoder
Bipolar Zero In Should be 'high' when the bus is in a negative state.
Must be tied 'high' when the unipolar input is used
Bipolar One In Should be 'high' when the bus is in a positive state.
Must be tied 'low' when the unipolar input is used
Unipolar Data In Input for unipolar data to the transition finder. Must be
tied 'low' when not used
Decoder Shift Clock Provides the DECODER CLOCK divided by 12,
synchronized by the recovered serial data
Command/Data Sync This output indicates the type of synchronizing
character received as follows: If a data synchronizing character was received, this pin is low while the data is decoded. If a command synchronizing character was received, this pin is high during data decoding
Decoder Reset A 'high' during a DECODER SHIFT CLOCK rising
edge resets the bit counter
VSS Ground 13 14 15
16
17
18
19
20
21
22 23 24
Master Reset A 'high" clears the counters in both sections
÷ ÷ 6 Out
Bipolar Zero Out Provides an active 'low' output to the zero or negative
Output Inhibit A 'low' inhibits the BIPOLAR ZERO OUT and
Bipolar One Out Provides an active 'low' output to the one or positive
Serial Data In Receives serial data at the rate of the ENCODER
Encoder Enable A 'high' starts the encode cycle provided that the
Sync Select A 'high' selects the command sync and a 'low' selects
Send Data Provides an active 'high' to enable the external serial
Send Clock In Clock input at 2 times the data rate
Encoder Clock Input to the divide by 6 circuit
VDD Positive Supply
Provides the ENCODER CLOCK divided by 6
sense of a bipolar line driver
BIPOLAR ONE OUT states
sense of a bipolar line driver
SHIFT CLOCK
previous cycle is complete
the data sync
data source
by forcing them to inactive, 'high',
Figure 4: Pin Designations (24-Pin Dip/FlatPack)
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DC Characteristics and Ratings
Absolute Maximum Ratings
Parameter Min Max Units
VDD 3 7 V Input Voltage Vss - 0.3 V
DD + 0.3V V
Operating Temperature -55 +125 °C Storage Temperature -65 +150 °C
Figure 5: Absolute Maximum Ratings
DC Characteristics
Sym Parameter Min Typ Max Units
V V
V
IHC
Logic "1" Input Voltage 70%VDD - - V
IH
Logic "0" Input Voltage - - 30%VDD V
IL
Logic "1" Input Voltage (Clock) VDD - 0.5V - - V
Conditions
Test
V
I V V
I
DDSB
I
DDOP
C
C
OUT
VDD = 5V ±10%, over full operating temperature range.
Logic "0" Input Voltage (Clock) - - VSS + 0.5V V
ILC
Input Leakage Current -1.0 +1.0 µA 0V < VIN < VDD
IL
Logic "1" Output Voltage 2.4 - - V IOH = -3 mA
OH
Logic "0" Output Voltage - - 0.4 V IOL = 1.8 mA
OL
Standby Supply Current - 0.5 2.0 mA Output Open
Operating Supply Current - 8.0 10.0 mA VDD = 5.5V,
Input Capacitance - 5.0 7.0 pF
IN
Output Capacitance - 8.0 10.0 pF
Figure 6: DC Characteristics
V
IN = VDD =
5.5V
f = 1MHz
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AC Characteristics
Sym Parameter
Limits
Min Max Units
fEC
ESC
f
ECR
t
ECF
t
f
t
t t t t t t t t t
1. V
ED MR E1 E2 E3 E4 E5 E6 E7 E8 E9
Encoder clock frequency Send clock frequency Encoder clock rise time Encoder clock fall time Data rate Master reset pulse width Shift clock delay Serial data setup time Serial data hold time Enable setup time Enable pulse width Sync setup time Sync pulse width Send data delay Bipolar output delay
DD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
0 15 MHz 0 2.5 MHz
- 8 ns
- 8 ns
0 1.25 MHz
150 - ns
- 125 ns 75 - ns 75 - ns 90 - ns
100 - ns
55 - ns
150 - ns
0 50 ns
- 130 ns
Figure 7: Encoder Electrical Characteristics
Sym Parameter
Limits
Min Typ Max Units
fDC
DCR
t
DCF
t
f t
DRS
t
t
t t t t t t t t t
D10
t
D11
t
1. V
3. t
DD DR
MR
D1 D2 D3 D4 D5 D6 D7 D8 D9
Decoder clock frequency Decoder clock rise time Decoder clock fall time Data rate Decoder reset pulse width Decoder reset setup time Master reset pulse width Bipolar data pulse width Sync transition span One-Zero overlap Short data transition span Long data transition span Sync delay (on) Take data delay (on) Serial data out delay Sync delay (off) Take data delay (off) Valid word delay
DD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
DC = Decoder clock period = 1/fDC
0 - 15 MHz
- - 8 MHz
- - 8 ns
0 - 1.25 MHz
150 - - ns
75 - - ns
150 - - ns
tDC + 10 - - ns
- 18tDC - ns
- - tDC - 10 ns
- 6tDC - ns
- 12tDC - ns
-20 - 110 ns 0 - 110 ns
- - 80 ns 0 - 110 ns 0 - 110 ns 0 - 110 ns
Figure 8: Decoder Electrical Characteristics
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Encoder Operation
The Encoder requires a single clock with a frequency of twice the desired data rate applied at the SEND CLOCK input. An auxiliary divide by six counter is provided on chip which can be utilised to produce the SEND CLOCK by dividing the DECODER CLOCK.
The Encoder's cycle begins when ENCODER ENABLE is high during a failing
edge of ENCODER SHIFT CLOCK
. This
cycle lasts for one word length or twenty ENCODER SHIFT CLOCK periods. At the next low-to-high transition of the ENCODER SHIFT CLOCK, a high at SYNC SELECT input actuates a command sync or a low will
produce a data sync for that word
. When the
Encoder is ready to accept data, the SEND DATA output will go high and remain high for
sixteen ENCODER SHIFT CLOCK periods
③.
During these sixteen periods the data should be clocked into the SERIAL DATA input with every low-high transition of the ENCODER
SHIFT CLOCK
③ - ④. After the sync and the
Manchester II coded data are chip transmitted through the BIPOLAR ONE
and BIPOLAR ZERO outputs, the Encoder adds on an additional bit which is the parity for that word
. At any time a low in OUTPUT INHIBIT
input will force both bipolar outputs to a high state but will not affect the Encoder in any other way. To abort the Encoder transmission a positive pulse must be applied at MASTER RESET. Anytime after or during this pulse, a low to high transition on SEND CLOCK clears the internal counters and initializes the Encoder for a new word.
Timing
Send Clock
Encoder
Shift Clock
Encoder
Enable
Sync Select
Send Data
Serial Data In
Bipolar
One Out
Bipolar
Zero Out
0 1 2 3 4 5 6 7 15 16 17 18
Don’t Care
Don’t CareValid
11
2nd
1st
Half Half
Sync Sync
15 14 13 12 10 2 1 03
15 14 13 12 11 2 1 0 P3
15 14 13 12 11 2 1 0 P3
19
1 2 4
Figure 9: Encoder Operation
3
6
5
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Decoder Operation
The Decoder requires a single clock with a frequency of 12 times the desired data rate applied at the DECODER CLOCK input. The Manchester II coded data can be presented to the Decoder in one of two ways. The BIPOLAR ONE and BIPOLAR ZERO inputs will accept data from a comparator sensed transformer coupled bus as specified in MIL-STD-1553. The UNIPOLAR DATA input can only accept non-inverted Manchester II coded data (e.g.from BIPOLAR ZERO OUT
The Decoder is free running and continuously monitors its data input lines for a valid sync character and two valid Manchester data bits to start an output cycle.. When a valid sync is
recognized
, the type of sync is indicated on
COMMAND/DATA character was a command sync, this output will
go high
and remain high for sixteen
DECODER SHIFT CLOCK periods otherwise it will remain low. The TAKE DATA
of an Encoder).
SYNC output. if the sync
③,
output will go high and remain high
② - ③
while the Decoder is transmitting the decoded data through SERIAL DATA OUT. The decoded data available at SERIAL DATA OUT is in a NRZ format. The DECODER SHIFT CLOCK is provided so that the decoded bits can get shifted into an external register on every low-to-high
transition of this clock
② - ③.
After all sixteen decoded bits have been transmitted A high on VALID WORD output
the data is checked for odd parity.
indicates a
successful reception of a word without any Manchester or parity errors. At this time the Decoder is looking for a new sync character to start another output sequence.
At any time in the above sequence, a high input on DECODER RESET during a low-to-high transition of DECODER SHIFT CLOCK will abort transmission and initialize the Decoder to start looking for a new sync character.
Timing
Decoder
Shift Clock
Bipolar
One In
Bipolar
Zero In
Take Data
Command/Data
Sync
Serial Data Out
Valid Word
1 20 3 4 5 6 7 8 16 17 18 19
Half Half
Sync
Sync
Undefined
(From Previous
Reception)
15 14 13 12 11 10 2 1 0 P2nd1st
15 14 13 12 11 10 2 1 0 P
15 14 13 12 4 2 1 03
1 2 3 4
Figure 10: Decoder Operation
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Send Clock
Encoder Shift Clock
tE1
tE2
Serial Data In
Send Clock
Encoder Shift Clock
Encoder Enable
Sync Select
Encoder Shift Clock
Send Clock
Send Clock
tE1
tE3
tE4
tE5
tE9
tE8
ValidValid
tE6
Valid
tE7
Bipolar One Out
Bipolar Zero Out
or
Figure 11: Encoder Timing Diagram
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1/ Bipolar One In Command Sync
/ Bipolar Zero In
1
/ Bipolar One In
1
Data Sync
/ Bipolar Zero In
1
/ Bipolar One In
1
/ Bipolar Zero In
1
ONE BIT PER. ZERO BIT PER. ONE BIT PER.
tD1
tD2
tD3
tD2
tD1
tD3
tD3
tD2
tD3
tD1
tD3
tD2
tD3
tD3
tD3
tD3
tD3
/ Unipolar In
2
Command Sync
/ Unipolar In
2
Data Sync
/ Unipolar In
2
Notes: 1. Unipolar In = 0
tD4
tD1
tD2
tD2
tD4
ONE
2. Bipolar One In = 0 Bipolar Zero In = 1
Figure 12: Decoder Timing Diagram
tD5
tD5
ZERO
tD5
tD5
tD1
tD4
tD2
tD2
tD4
tD4
ONE ONE
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Decoder Shift Clock
tD7
tD6
Command/Data
Decoder Shift Clock
Serial Data Out
Decoder Shift Clock
Command/Data
Sync
Take Data
Sync
Take Data
tD8
Data Bit
tD9
tD10
tD11
Valid Word
Decoder Shift Clock
tDRS
Decoder Reset
tDR
Figure 13: Decoder Timing Details
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Command Sync
Data Sync
Bit
Period
Logical One Data
Logical Zero Data
Figure 14: Character Formats
1 20 3 4 5 6 7 8 9 10
Command Word (From Controller to Terminal)
5 5 5 11
Bit
Period
Bit
Period
11 12 13 14 15 16 17 18 19
Sync
Sync
Sync
Terminal
Address
Subaddress
Mode
Data Word (Sent Either Direction)
16
Status Word (From Terminal to Controller)
5 9 1 11
Terminal
Address
Figure 15: Word Formats
Data Word
Count
PR/T
1
PData Word
PTFCode for Failure ModesME
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D
Pin 1
Notch
e
Alernative Pin Shapes
W
M
E
Seating Plane
A
A
1
H
0-15°
b
c
e
1
0-15°
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock
Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data
Sync
Decoder Reset
1 2 3 4 5 6 7 8
9 10 11
SS
V
12
24
VDD
23
Encoder Clock
22
Send Clock In
21
Send Data
20
Sync Select
19
Encoder Enable
18
Serial Data In
17
Bipolar One Out
16
Output Inhibit
15
Bipolar Zero Out
÷ ÷ 6 Out
14
Master Reset
13
Ref. Min. Nom. Max.
A - - 5.60 (0.220)
A
0.38 (0.015) - 1.53 (0.060)
1
b 0.35 (0.014) - 0.59 (0.023) c 0.20 (0.008) - 0.36 (0.014)
D - - 30.79 (1.212)
e - 2.54 (0.100) Typ -
e
1
H 4.71 (0.185) - 5.38 (0.212)
M
E
W - - 1.53 (0.060) Dimensions in mm (inches)
- 15.24 (0.600) Typ -
- - 15.90 (0.626)
Figure 16: 24-Lead Ceramic DIL (Solder Seal) - Package Style C
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M
b
D
Z
e
L
A
c
Pin 1 Index
VDD
Encoder Clock
Send Clock In
Send Data
Sync Select
Encoder Enable
Serial Data In
Bipolar One Out
Output Inhibit
Bipolar Zero Out
÷ ÷ 6 Out
Master Reset
M
E
24 23 22 21 20 19 18 17 16 15 14 13
Bottom
View
1
Valid Word
2
Encoder Shift Clock
3
Take Data
4
Serial Data Out
5
Decoder Clock
6
Bipolar Zero In
7
Bipolar One In
8
Unipolar Data In
9
Decoder Shift Clock
10
Command/Data
11
Decoder Reset
12
SS
V
A
1
Ref. Min. Nom. Max.
A
A
1
b 0.38 (0.015) - 0.48 (0.019) c 0.10 (0.004) - 0.18 (0.007) D 14.86 (0.585) - 15.62 (0615) e - 1.275 (0.050) ­L 6.73 (0..265) - 7.75 (0.305)
M 9.91 (0.390) - 10.41 (0.410)
M
E
Z 0.13 (0.005) - 1.14 (0.045)
Dimensions in mm (inches)
- - 2.67 (0.105)
0.25 (0.010) - 1.02 (0.040)
7.6 (0.30) - -
Sync
Figure 17: 24-Lead Ceramic Flatpack (Solder Seal) - Package Style CF
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OUTPUT INHIBIT
OUT
BIPOLAR ZERO
6 OUT
MASTER RESET
GROUND
DECODER RESET
DATA SYNC
COMMAND /
DECODER CLK
SEND CLK IN
ENCODER CLK
VALID WORD
Vcc
ENCODER SHIFT CLK
SERIAL DAA OUT
TAKE DATA NC NC
BIPOLAR ZERO IN
BIPOLAR ONE IN
UNIPOLAR DATA IN
DECODER SHIFT CLOCK
5 6 7 8
9 10 11
BOTTOM VIEW
TOP VIEW
2627281234
÷
÷
25
SEND DATA
24
NC
23
NCNC SYNC SELECT
22 21
ENCODER ENABLE SERIAL DATA IN
20
BIPOLAR ONE OUT
19
18171615141312
.006 .022
.022 .028
.045 .055
.003 .015
.015 MIN
.442 .458
.075 .095
.074
.074 .088
.442 .458
.050
BSC
.090 MAX
Figure 18: 28-Leadless Ceramic Chip Carrier - Package Style L
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CIRCUIT TECHNOLOGY
Ordering Information
Model Number Part Number
ACT15530XX See Below or Contact Factory
Part Number Breakdown
ACT15530 X X
Package Type
C Ceramic DIL (Figure 16) CF Flatpack (Figure 17) L LCC (Figure 18) N Naked Die * P Plastic DIP *
Rel Level
B Class B Operating Temperature (Figure 5) -55°C to +125°C C Commercial (0°C to+70°C) I Industrial (-40°C to +85°C) S Space *
* Contact Factory for Details
Aeroflex Circuit Technology 35 South Service Road Plainview New York 11803
Specifications subject to change without notice.
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Toll Free Inquiries: 1-(800)THE-1553
Telephone: (516) 694-6700 FAX: (516) 694-6715
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