Page 1
A62S8316 Series
Preliminary 256K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (February, 2001, Version 0.0) AMIC Technology, Inc.
Document Title
256K X 16 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue February 12, 2001 Preliminary
Page 2
A62S8316 Series
Preliminary 256K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (February, 2001, Version 0.0) 1 AMIC Technology, Inc.
Features
n Operating voltage: 2.7V to 3.6V
n Access times: 70 ns (max.)
n Current:
A62S8316-S series: Operating: 50mA (max.)
Standby: 10µA (max.)
A62S8316-SI series: Operating: 50mA (max.)
Standby: 15µA (max.)
n Extended operating temperature range : -25°C to 85°C
for -SI series
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL-compatible
n Common I/O using three-state output
n Data retention voltage: 2V (min.)
n Available in 44-pin TSOP and 48-ball Mini BGA (6X8)
packages.
General Description
The A62S8316 is a low operating current 4,194,304-bit
static random access memory organized as 262,144
words by 16 bits and operates on low power supply
voltage from 2.7V to 3.6V. It is built using AMIC’s high
performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
The chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2V.
Pin Configuration
n TSOP (Type II)
1A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
GND
I/O4
I/O5
I/O6
I/O7
23
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A5
A6
A7
OE
HB
LB
I/O15
I/O14
I/O13
I/O12
VCC
GND
I/O11
I/O10
I/O9
I/O8
A62S8316V
17
18
19
20
21
22
24
25
26
27
28
29
WE
A17
A16
A15
A14
A13
NC
A8
A9
A10
A11
A12
n Mini BGA (6X8) Top View
1 2 3 4 5 6
A
LB OE
A0 A1 A2 NC
B I/O8
HB
A3 A4
CS
I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSS I/O11 A17 A7 I/O3 VCC
E VCC I/O12 NC A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13
WE
I/O7
H NC A8 A9 A10 A11 NC
A62S8316G
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A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 2 AMIC Technology, Inc.
Block Diagram
DECODER
2048X 2048
MEMORY ARRAY
COLUMN I/O
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
VCC
GND
I/O
7
I/O
0
A17
A16
A0
WE
HB
INPUT
DATA
CIRCUIT
I/O
8
I/O
15
CE
LB
OE
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A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 3 AMIC Technology, Inc.
Pin Description - TSOP
Pin No. Symbol Description
1 - 5, 18 - 27,
42 - 44
A0 - A17 Address Inputs
6
CE
Chip Enable Input
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O0 - I/O15 Data Input/Outputs
17
WE
Write Enable Input
39
LB
Byte Enable Input (I/O0 to I/O7)
40
HB
Byte Enable Input (I/O8 to I/O15)
41
OE
Output Enable Input
11, 33 VCC Power
12, 34 GND Ground
28 NC No Connection
Recommended DC Operating Conditions
(TA = 0°C to + 70°C or -25°C to 85°C)
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 2.7 3.0 3.6 V
GND Ground 0 0 0 V
VIH Input High Voltage 2.4 - VCC + 0.3 V
VIL Input Low Voltage -0.3 - +0.6 V
CL Output Load - - 30 pF
TTL Output Load - - 1 -
Page 5
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 4 AMIC Technology, Inc.
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . -25°C to +85°C
Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics (TA = 0°C to + 70°C or -25°C to 85°C, VCC = 2.7V to 3.6V, GND = 0V)
Symbol Parameter
A62S8316-70S A62S8316-70SI
Unit Conditions
Min. Max. Min. Max.
ILI
Input Leakage Current - 1 - 1
µA
VIN = GND to VCC
ILO
Output Leakage Current - 1 - 1
µA
CE = VIH or LB = VIH or
HB = VIH or OE = VIH or
WE = VIL
VI/O = GND to VCC
ICC Active Power Supply Current - 5 - 5 mA
CE = VIL, II/O = 0mA
ICC1
- 50 - 50
mA
Min. Cycle, Duty = 100%
CE = VIL, II/O = 0mA
ICC2
Dynamic Operating
Current
- 10 - 10 mA
CE = VIL, VIH = VCC,
VIL = 0V, f = 1MHz,
II/O = 0 mA
ISB
- 0.5 - 0.5 mA
CE = VIH
ISB1
Standby Power
Supply Current
- 10 - 15
µA
CE ≥ VCC - 0.2V
VIN ≥ 0V
VOL
Output Low Voltage
- 0.4 - 0.4 V IOL = 2.1mA
VOH Output High Voltage 2.2 - 2.2 - V IOH = -1.0mA
Page 6
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 5 AMIC Technology, Inc.
Truth Table
CE OE WE LB HB
I/O0 to I/O7 Mode I/O8 to I/O15 Mode VCC Current
H X X X X Not selected Not selected ISB1, ISB
L L Read Read ICC1, ICC2, ICC
L L H L H Read High - Z ICC1, ICC2, ICC
H L High - Z Read ICC1, ICC2, ICC
L L Write Write ICC1, ICC2, ICC
L X L L H Write Not Write/Hi - Z ICC1, ICC2, ICC
H L Not Write/Hi - Z Write ICC1, ICC2, ICC
L X High - Z High - Z ICC1, ICC2, ICC
L H H
X L High - Z High - Z ICC1, ICC2, ICC
X X X H H Not selected Not selected ISB1, ISB
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol Parameter Min. Max. Unit Conditions
CIN* Input Capacitance - 6 pF VIN = 0V
CI/O* Input/Output Capacitance - 8 pF VI/O = 0V
* These parameters are sampled and not 100% tested.
Page 7
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 6 AMIC Technology, Inc.
AC Characteristics (TA = 0°C to +70°C or -25°C to 85°C, VCC = 2.7V to 3.6V)
Symbol Parameter
A62S8316-70S/SI
Unit
Min. Max.
Read Cycle
tRC Read Cycle Time 70 - ns
tAA Address Access Time - 70 ns
tACE Chip Enable Access Time - 70 ns
tBE Byte Enable Access Time - 70 ns
tOE Output Enable to Output Valid - 35 ns
tCLZ Chip Enable to Output in Low Z 10 - ns
tBLZ Byte Enable to Output in Low Z 5 - ns
tOLZ Output Enable to Output in Low Z 5 - ns
tCHZ Chip Disable to Output in High Z - 25 ns
tBHZ Byte Disable to Output in High Z - 25 ns
tOHZ Output Disable to Output in High Z - 25 ns
tOH Output Hold from Address Change 10 - ns
Write Cycle
tWC Write Cycle Time 70 - ns
tCW Chip Enable to End of Write 60 - ns
tBW Byte Enable to End of Write 60 - ns
tAS Address Setup Time 0 - ns
tAW Address Valid to End of Write 60 - ns
tWP Write Pulse Width 50 - ns
tWR Write Recovery Time 0 - ns
tWHZ Write to Output in High Z - 30 ns
tDW Data to Write Time Overlap 30 - ns
tDH Data Hold from Write Time 0 - ns
tOW Output Active from End of Write 5 - ns
Note: tCHZ, tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
Page 8
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 7 AMIC Technology, Inc.
Timing Waveforms
Read Cycle 1
(1, 2, 4)
tRC
tOH
tAA
tOH
Address
DOUT
Read Cycle 2
(1, 2, 3)
tRC
tAA
Address
tACE
tCHZ
5
CE
HB, LB
tBHZ
5
OE
tCLZ
5
tBE
tBLZ
5
tOE
tOLZ
5
tOHZ
5
DOUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE = VIL, HB = VIL and, or LB = VIL.
3. Address valid prior to or coincident with CE and (HB and, or LB ) transition low.
4. OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
Page 9
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 8 AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 1
(Write Enable Controlled)
tWC
tAW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
tWR
3
tCW
tBW
tAS
1
tWP
2
tDW
tDH
tOW
tWHZ
4
Page 10
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 9 AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
tWC
tAW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
tWR
3
tCW
2
tBW
tAS
1
tWP
tDW
tDH
tOW
tWHZ
4
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A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 10 AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 3
(Byte Enable Controlled)
tWC
tAW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
tWR
3
tCW
tBW
2
tAS
1
tWP
tDW
tDH
tOW
tWHZ
4
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP, tBW) of a low CE , WE and (HB and, or LB ).
3. tWR is measured from the earliest of CE or WE or (HB and, or LB ) going high to the end of the Write cycle.
4. OE level is high or low.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
Page 12
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 11 AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels 0V to 3.0V
Input Rise And Fall Time 5 ns
Input and Output Timing Reference Levels 1.5V
Output Load See Figures 1 and 2
30pF
* Including scope and jig. * Including scope and jig.
CL
TTL
5pF
CL
TTL
Figure 1. Output Load Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C or -25°C to 85°C)
Symbol Parameter Min. Max. Unit Conditions
VDR VCC for Data Retention 2.0 3.6 V
CE ≥ VCC - 0.2V
ICCDR
Data Retention Current
S-Version - 5*
µA
SI-Version - 10**
VCC = 2.0V,
CE ≥ VCC - 0.2V
VIN ≥ 0V
tCDR Chip Disable to Data Retention Time 0 - ns
See Retention Waveform
tR Operation Recovery Time TRC - ns
* A62S8316-70S ICCDR: max. 1µA at TA = 0°C to + 40°C
** A62S8316-70SI ICCDR: max. 1µA at TA = 0°C to + 40°C
Page 13
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 12 AMIC Technology, Inc.
Low VCC Data Retention Waveform
VCC
CE
tCDR
VIH
2.7V
tR
VIH
2.7V
DATA RETENTION MODE
VDR ≥ 2V
CE ≥ VDR - 0.2V
Ordering Information
Part No. Access Time (ns)
Operating Current
Max. (mA)
Standby Current
Max. (µµA)
Package
A62S8316V-70S 50 10 44L TSOP
A62S8316V-70SI 50 15 44L TSOP
A62S8316G-70S 50 10 48B Mini BGA
A62S8316G-70SI
70
50 15 48B Mini BGA
Page 14
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 13 AMIC Technology, Inc.
Package Information
TSOP 44L (Type II) Outline Dimensions unit: inches/mm
1
E
L1
L1
c
44
ZD
D
y
e
D
b
L
L
θ
A1 A2
A
E1
Dimensions in inches Dimensions in mm
Symbol
Min Nom Max Min Nom Max
A - - 0.047 - - 1.20
A1 0.002 - 0.006 0.05 - 0.15
A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.012 - 0.018 0.30 - 0.45
c 0.005 - 0.008 0.12 - 0.21
D 0.720 0.725 0.730 18.28 18.41 18.54
ZD 0.032 REF 0.805 REF
E 0.455 0.463 0.471 11.56 11.76 11.96
E1 0.395 0.400 0.405 10.03 10.16 10.29
L 0.019 0.023 0.027 0.49 0.59 0.69
L1 0.031 REF 0.80 REF
e 0.031 BSC 0.80 BSC
y - - 0.004 - - 0.10
θ
0° - 5° 0° - 5°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E1 does not include resin fins.
3. Dimension ZD includes end flash.
Page 15
A62S8316 Series
PRELIMINARY (February, 2001, Version 0.0) 14 AMIC Technology, Inc.
Package Information
Mini BGA 6X8 (48 BALLS) Outline Dimensions unit : millimeter(mm)
Symbol
Min
Typ
Max
A - 0.75 B 5.90 6.00 6.10
B1 - 3.75 -
C 7.90 8.00 8.10
C1 - 5.25 -
D 0.30 0.35 0.40
E 1.00 1.10 1.20
E1 - 0.36 E2 - 0.22 -
123456
A
B
C
D
E
F
G
H
Bottom View
Pin A1 Index
Diameter D
Solder Ball
A
B1
A
C1
Top View
Pin A1 Index
B
C
0.10
E1
E
E2
D
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