Datasheet A62S7316V-70SI, A62S7316V-70S, A62S7316V, A62S7316V-55S, A62S7316G-70SI Datasheet (AMICC)

A62S7316 Series

Preliminary 128K X 16 BIT LOW VOLTAGE CMOS SRAM

Document Title
128K X 16 BIT LOW VOLTAGE CMOS SRAM

Revision History

Rev. No. History Issue Date Remark

0.0 Initial issue November 24, 1999 Preliminary

0.1 Modify VCCmax from 3.3V to 3.6V December 20, 2000

0.2 Add 55ns grade spec. for VCC = 3.0V to 3.6V March 23, 2001

PRELIMINARY (March, 2001, Version 0.2) AMIC Technology, Inc.

A62S7316 Series

HB

A62S7316G

Preliminary 128K X 16 BIT LOW VOLTAGE CMOS SRAM

Features

n Operating voltage: 2.7V to 3.6V
n Access times: 55ns (max.): for VCC = 3.0V to 3.6V

70ns (max.): for VCC = 2.7V to 3.6V
n Current:
A62S7316-S series: Operating: 50mA (max.)
Standby: 10µA (max.)
A62S7316-SI series: Operating: 50mA (max.)
Standby: 15µA (max.)

General Description

The A62S7316 is a low operating current 2,097,152-bit
static random access memory organized as 131,072
words by 16 bits and operates on low power supply
voltage from 2.7V to 3.6V. It is built using AMIC’s high
performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.

n Extended operating temperature range : -25°C to 85°C

for -SI series

n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL-compatible
n Common I/O using three-state output
n Data retention voltage: 2V (min.)
n Available in 44-pin TSOP and 48-ball Mini BGA (6X8)

packages.

The chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2V.

Pin Configuration

n TSOP (Type II)

CE
I/O0
I/O1
I/O2
I/O3

VCC

GND

I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12

1A4

A3

2

A2

3
4

A1
A0

5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44

A5

43

A6

42

A7

41

OE

40

HB

39

LB

38

I/O15

37

A62S7316V

I/O14

36

I/O13

35

I/O12

34

GND

33

VCC

32

I/O11

31

I/O10

30

I/O9
I/O8

29
28

NC

27

A8

26

A9

25

A10

24

A11

23

NC

n Mini BGA (6X8) Top View

1 2 3 4 5 6

A

LB OE

B I/O8

A0 A1 A2 NC
A3 A4

CS

I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSS I/O11 NC A7 I/O3 VCC
E VCC I/O12 NC A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13

WE

I/O7
H NC A8 A9 A10 A11 NC

PRELIMINARY (March, 2001, Version 0.2) 1 AMIC Technology, Inc.

A62S7316 Series

Block Diagram

A0

A15

A16

I/O

I/O

VCC

GND

DECODER

0

INPUT

DATA

CIRCUIT

7

1024 X 2048

MEMORY ARRAY

COLUMN I/O

INPUT

DATA

CIRCUIT

I/O

I/O

8

15

CE

LB
HB
OE

WE

CONTROL

CIRCUIT

PRELIMINARY (March, 2001, Version 0.2) 2 AMIC Technology, Inc.

A62S7316 Series

Pin Description - TSOP

Pin No. Symbol Description

1 - 5, 18 - 22,

24 - 27,42 - 44

6

7 - 10, 13 - 16,

29 - 32, 35 - 38

17

39

40

41

11, 33 VCC Power

12, 34 GND Ground

23, 28 NC No Connection

A0 - A16 Address Inputs

CE

I/O0 - I/O15 Data Input/Outputs

WE

LB

HB

OE

Chip Enable Input

Write Enable Input

Byte Enable Input (I/O0 to I/O7)

Byte Enable Input (I/O8 to I/O15)

Output Enable Input

Recommended DC Operating Conditions

(TA = 0°C to + 70°C or -25°C to 85°C)

Symbol Parameter Min. Typ. Max. Unit

VCC Supply Voltage 2.7 3.0 3.6 V

GND Ground 0 0 0 V

VIH Input High Voltage 2.4 - VCC + 0.3 V

VIL Input Low Voltage -0.3 - +0.6 V

CL Output Load - - 30 pF

TTL Output Load - - 1 -

PRELIMINARY (March, 2001, Version 0.2) 3 AMIC Technology, Inc.

A62S7316 Series

Absolute Maximum Ratings*

VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V

IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V

Operating Temperature, Topr . . . . . . . . -25°C to +85°C

Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C

Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W

Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec

*Comments

Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.

DC Electrical Characteristics (TA = 0°C to + 70°C or -25°C to 85°C, VCC = 2.7V to 3.6V, GND = 0V)

Symbol Parameter

Min. Max. Min. Max.

ILI

ILO

ICC Active Power Supply Current - 5 - 5 mA

ICC1

ICC2

Input Leakage Current - 1 - 1

Output Leakage Current - 1 - 1

Dynamic Operating
Current

A62S7316-55S/70S A62S7316-55SI/70SI

- 50 - 50

- 10 - 10 mA

Unit Conditions

VIN = GND to VCC

µA

CE = VIH or LB = VIH or

µA

HB = VIH or OE = VIH or
WE = VIH

VI/O = GND to VCC

CE = VIL, II/O = 0mA

Min. Cycle, Duty = 100%

mA

CE = VIL, II/O = 0mA

CE = VIL, VIH = VCC,
VIL = 0V, f = 1MHz,
II/O = 0 mA

ISB

Standby Power

ISB1

VOL

VOH Output High Voltage 2.2 - 2.2 - V IOH = -1.0mA

PRELIMINARY (March, 2001, Version 0.2) 4 AMIC Technology, Inc.

Supply Current

Output Low Voltage

- 0.5 - 0.5 mA

- 10 - 15

- 0.4 - 0.4 V IOL = 2.1mA

CE = VIH

CE ≥ VCC - 0.2V

µA

VIN ≥ 0V

A62S7316 Series

CE OE WE LB HB

Truth Table

I/O0 to I/O7 Mode I/O8 to I/O15 Mode VCC Current

H X X X X Not selected Not selected ISB1, ISB

L L Read Read ICC1, ICC2, ICC

L L H L H Read High - Z ICC1, ICC2, ICC

H L High - Z Read ICC1, ICC2, ICC

L L Write Write ICC1, ICC2, ICC

L X L L H Write Not Write/Hi - Z ICC1, ICC2, ICC

H L Not Write/Hi - Z Write ICC1, ICC2, ICC

L X High - Z High - Z ICC1, ICC2, ICC

L H H

X L High - Z High - Z ICC1, ICC2, ICC

X X X H H Not selected Not selected ISB1, ISB

Note: X = H or L

Capacitance (TA = 25°C, f = 1.0MHz)

Symbol Parameter Min. Max. Unit Conditions

CIN* Input Capacitance - 6 pF VIN = 0V

CI/O* Input/Output Capacitance - 8 pF VI/O = 0V

* These parameters are sampled and not 100% tested.

PRELIMINARY (March, 2001, Version 0.2) 5 AMIC Technology, Inc.

A62S7316 Series

AC Characteristics (TA = 0°C to +70°C or -25°C to 85°C, VCC = 2.7V to 3.6V)

A62S7316-55S/SI

Symbol Parameter

Min. Max. Min. Max.

Read Cycle

tRC Read Cycle Time 55 - 70 - ns
tAA Address Access Time - 55 - 70 ns

tACE Chip Enable Access Time - 55 - 70 ns

tBE Byte Enable Access Time - 55 - 70 ns

tOE Output Enable to Output Valid - 30 - 35 ns
tCLZ Chip Enable to Output in Low Z 10 - 10 - ns
tBLZ Byte Enable to Output in Low Z 5 - 5 - ns

tOLZ Output Enable to Output in Low Z 5 - 5 - ns
tCHZ Chip Disable to Output in High Z - 20 - 25 ns
tBHZ Byte Disable to Output in High Z - 20 - 25 ns
tOHZ Output Disable to Output in High Z - 20 - 25 ns

tOH Output Hold from Address Change 5 - 10 - ns

(VCC = 3.0V to 3.6V)

A62S7316-70S/SI

(VCC = 2.7V to 3.6V)

Unit

Write Cycle

tWC Write Cycle Time 55 - 70 - ns

tCW Chip Enable to End of Write 50 - 60 - ns

tBW Byte Enable to End of Write 50 - 60 - ns

tAS Address Setup Time 0 - 0 - ns

tAW Address Valid to End of Write 50 - 60 - ns

tWP Write Pulse Width 40 - 50 - ns

tWR Write Recovery Time 0 - 0 - ns

tWHZ Write to Output in High Z - 25 - 30 ns

tDW Data to Write Time Overlap 25 - 30 - ns

tDH Data Hold from Write Time 0 - 0 - ns
tOW Output Active from End of Write 5 - 5 - ns

Note: tCHZ, tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.

PRELIMINARY (March, 2001, Version 0.2) 6 AMIC Technology, Inc.

A62S7316 Series

Timing Waveforms

Read Cycle 1

Address

DOUT

(1, 2, 4)

tRC

tAA

tOH

tOH

Read Cycle 2

Address

CE

HB, LB

OE

DOUT

(1, 2, 3)

tRC

tAA

tCLZ

tACE

5

tBE

5

tBLZ

tOE

5

tOLZ

tOHZ

tBHZ

5

tCHZ

5

5

Notes: 1. WE is high for Read Cycle.

2. Device is continuously enabled CE = VIL, HB = VIL and, or LB = VIL.

3. Address valid prior to or coincident with CE and (HB and, or LB ) transition low.

4. OE = VIL.

5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.

PRELIMINARY (March, 2001, Version 0.2) 7 AMIC Technology, Inc.

A62S7316 Series

Timing Waveforms (continued)

Write Cycle 1
(Write Enable Controlled)

tWC

Address

3

tAW

tCW

CE

tBW

HB, LB

tWR

WE

DATA IN

DATA OUT

1

tAS

4

tWHZ

tWP

2

tDW

tDH

tOW

PRELIMINARY (March, 2001, Version 0.2) 8 AMIC Technology, Inc.

A62S7316 Series

Timing Waveforms (continued)

Write Cycle 2
(Chip Enable Controlled)

tWC

Address

HB, LB

WE

DATA IN

DATA OUT

CE

tAW

tWP

tCW

2

tBW

tDW

1

tAS

4

tWHZ

tWR

3

tDH

tOW

PRELIMINARY (March, 2001, Version 0.2) 9 AMIC Technology, Inc.

A62S7316 Series

Timing Waveforms (continued)

Write Cycle 3
(Byte Enable Controlled)

tWC

Address

tAW

tCW

CE

3

tWR

HB, LB

WE

tWP

tBW

2

1

tAS

tDH

tOW

DATA IN

DATA OUT

tWHZ

tDW

4

Notes: 1. tAS is measured from the address valid to the beginning of Write.

2. A Write occurs during the overlap (tWP, tBW) of a low CE , WE and (HB and, or LB).

3. tWR is measured from the earliest of CE or WE or (HB and, or LB) going high to the end of the Write cycle.

4. OE level is high or low.

5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.

PRELIMINARY (March, 2001, Version 0.2) 10 AMIC Technology, Inc.

A62S7316 Series

AC Test Conditions

Input Pulse Levels 0V to 3.0V

Input Rise And Fall Time 5 ns

Input and Output Timing Reference Levels 1.5V

Output Load See Figures 1 and 2

TTL

CL

30pF

* Including scope and jig. * Including scope and jig.

CL

TTL

5pF

Figure 1. Output Load Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW

Data Retention Characteristics (TA = 0°C to 70°C or -25°C to 85°C)

Symbol Parameter Min. Max. Unit Conditions

VDR VCC for Data Retention 2.0 3.6 V

ICCDR

Data Retention Current

S-Version - 5*

SI-Version - 10**

tCDR Chip Disable to Data Retention Time 0 - ns

CE ≥ VCC - 0.2V

VCC = 2.0V,

µA

CE ≥ VCC - 0.2V

VIN ≥ 0V

See Retention Waveform

tR Operation Recovery Time TRC - ns

* A62S7316-55S/70S ICCDR: max. 1µA at TA = 0°C to + 40°C
** A62S7316-55SI/70SI ICCDR: max. 1µA at TA = 0°C to + 40°C

PRELIMINARY (March, 2001, Version 0.2) 11 AMIC Technology, Inc.

A62S7316 Series

Low VCC Data Retention Waveform

DATA RETENTION MODE

VCC

CE

2.7V

tCDR

VIH

VDR ≥ 2V

CE ≥ VDR - 0.2V

2.7V
tR

VIH

Ordering Information

Part No. Access Time (ns)

Operating Current

Max. (mA)

A62S7316V-55S 50 10 44L TSOP

A62S7316V-55SI 50 15 44L TSOP

55

A62S7316G-55S 50 10 48B Mini BGA

A62S7316G-55SI

50 15 48B Mini BGA

A62S7316V-70S 50 10 44L TSOP

A62S7316V-70SI 50 15 44L TSOP

70

A62S7316G-70S 50 10 48B Mini BGA

Standby Current

Max. (µµA)

Package

A62S7316G-70SI

50 15 48B Mini BGA

PRELIMINARY (March, 2001, Version 0.2) 12 AMIC Technology, Inc.

A62S7316 Series

Package Information

TSOP 44L (Type II) Outline Dimensions unit: inches/mm

44

E

E1

θ

L

1

D

A

L1

c

L1

ZD

b

e

y

D

A1 A2

L

Symbol

A - - 0.047 - - 1.20
A1 0.002 - 0.006 0.05 - 0.15
A2 0.037 0.039 0.041 0.95 1.00 1.05

b 0.012 - 0.018 0.30 - 0.45

c 0.005 - 0.008 0.12 - 0.21

D 0.720 0.725 0.730 18.28 18.41 18.54
ZD 0.032 REF 0.805 REF

E 0.455 0.463 0.471 11.56 11.76 11.96
E1 0.395 0.400 0.405 10.03 10.16 10.29

L 0.019 0.023 0.027 0.49 0.59 0.69

L1 0.031 REF 0.80 REF

e

y - - 0.004 - - 0.10

θ

Notes:

1. The maximum value of dimension D includes end flash.

2. Dimension E1 does not include resin fins.

3. Dimension ZD includes end flash.

Dimensions in inches Dimensions in mm

Min Nom Max Min Nom Max

0.031 BSC 0.80 BSC

0° - 5° 0° - 5°

PRELIMINARY (March, 2001, Version 0.2) 13 AMIC Technology, Inc.

A62S7316 Series

Symbol

Min

Typ

Max

Package Information

Mini BGA 6X8 (48 BALLS) Outline Dimensions unit : millimeter(mm)

C1

Bottom View

Pin A1 Index

123456

A
B
C
D

E

A

A

B1

D

0.10

E1

F
G
H

Diameter D

Solder Ball

Pin A1 Index

Top View

C

B

E2

E

A - 0.75 ­B 5.90 6.00 6.10

B1 - 3.75 -

C 7.90 8.00 8.10

C1 - 5.25 -

D 0.30 0.35 0.40

E 1.00 1.10 1.20
E1 - 0.36 ­E2 - 0.22 -

PRELIMINARY (March, 2001, Version 0.2) 14 AMIC Technology, Inc.