Datasheet A625308AV-70SU, A625308AV-70SI, A625308AV, A625308AM-70SU, A625308AM Datasheet (AMICC)

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Page 1
A625308A Series
Preliminary 32K X 8 BIT CMOS SRAM
Document Title 32K X 8 BIT CMOS SRAM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue February 2, 2001 Preliminary
0.1 Add ultra temp grade and 28-pin DIP package type November 7, 2001
0.2 Add SI grade July 17, 2002
PRELIMINARY (July, 2002, Version 0.2) AMIC Technology, Inc.
Page 2
A625308A Series
Preliminary 32K X 8 BIT CMOS SRAM
Features
n Power Supply Range: 4.5V to 5.5V n Access times: 70 ns
A625308A-S series: Operating: 35mA (max.) Standby: 10µA (max.) A625308A-SI/SU series: Operating: 35mA (max.) Standby: 15µA (max.)
General Description
The A625308A is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a voltage from 4.5V to
5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
Pin Configurations
n DIP / SOP n TSOP
n Extended operating temperature range: 0°C to 70°C
for -S series, -25°C to 85°C for -SI series, -40°C to 85°C for -SU series.
n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 28-pin, DIP/SOP and TSOP
Minimum standby power is drawn by this device when
CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V.
A14 A12
I/O0 I/O1 I/O
GND
A7 A6 A5 A4 A3 A2
A1 A0
2
1 2
3 4
A625308A(M)
5 6
7 8 9 10 11 12 13 14 15
~
VCC
28
WE
27
A13
26
A8
25
A9
24
A11
23
OE
22
A10
21
CE
20
I/O7
19
I/O6
18
I/O5
17
I/O4
16
3
I/O
A11
A13
WE
VCC
A14 A12
1
OE
2 3
A9
4
A8
5 6 7 8 9 10
A7
11
A6
12
A5
13
A4
14
A3
~
A625308AV
~
~
28
A10 CE
27 26
I/O7
25
I/O6 I/O5
24 23
I/O4
22
I/O3
21
VSS 20 19 18 17 16 15
2
I/O
1
I/O
0
I/O
A0
A1
A2
PRELIMINARY (July, 2002, Version 0.2) 1 AMIC Technology, Inc.
Page 3
A625308A Series
Block Diagram
A0
A12
A13
A14
I/O0
I/O7
CE OE
WE
Pin Descriptions – DIP / SOP
CONTROL
CIRCUIT
ROW
DECODER
INPUT DATA
CIRCUIT
VCC GND
512 X 512
MEMORY ARRAY
COLUMN I/O
Pin Description-TSOP
Pin No. Symbol Description
1-10, 21, 23-26 A0 - A14 Address Input
11-13, 15-19 I/O0 - I/O7 Data Input/Output
20 22 27
CE OE
WE
Chip Enable Output Enable Write Enable
28 VCC Power Supply 14 GND Ground
Pin No. Symbol Description
2-5, 8-17, 28 A0 - A14 Address Input 18-20, 22-26 I/O0 - I/O7 Data Input/Output
27
1 6
CE OE
WE
Chip Enable Output Enable Write Enable
7 VCC Power Supply
21 GND Ground
PRELIMINARY (July, 2002, Version 0.2) 2 AMIC Technology, Inc.
Page 4
A625308A Series
Recommended DC Operating Conditions
(TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 4.5 5.0 5.5 V
GND Ground 0 0 0 V
VIH Input High Voltage 2.2 - VCC + 0.5 V
VIL Input Low Voltage -0.5 0 +0.8 V
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . 0°C to +70°C or -40°C to +85°C
Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec
DC Electrical Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%, GND = 0V)
*Comments
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Symbol Parameter
Min. Max.
ILI
ILO
ICC Active Power Supply Current - 5 mA
ICC1 Dynamic Operating Current - 35 mA
ICC2
Input Leakage Current - 1
Output Leakage Current - 1
Dynamic Operating Current
A625308A-70S/SI/SU
-
Unit Conditions
µA
µA
5
mA
VIN = GND to VCC
CE = VIH
VI/O = GND to VCC
CE = VIL, II/O = 0mA
Min. Cycle, Duty = 100%
CE = VIL, II/O = 0mA
CE = VIL, VIH = VCC VIL = 0V, f = 1 MHz II/O = 0 mA
PRELIMINARY (July, 2002, Version 0.2) 3 AMIC Technology, Inc.
Page 5
A625308A Series
CE OE WE
DC Electrical Characteristics (continued)
Symbol Parameter
Min. Max. Min. Max.
ISB
ISB1
VOL Output Low Voltage - 0.4 - 0.4 V IOL = 2.1 mA
VOH Output High Voltage 2.4 - 2.4 - V IOH = -1.0 mA
Supply Current Standby Power
A625308A-70S A625308A-70SI/SU
- 0.5 - 0.5 mA
- 10 - 15
Unit Conditions
CE = VIH
µA
CE VCC - 0.2V
VIN 0V
Truth Table
Mode
Standby H X X High Z ISB, ISB1
Output Disable L H H High Z ICC, ICC1, ICC2
Read L L H DOUT ICC, ICC1, ICC2
Write L X L DIN ICC, ICC1, ICC2
I/O Operation Supply Current
Note: X: H or L
Capacitance (TA = 25°C, f = 1.0 MHz)
Symbol Parameter Min. Max. Unit Conditions
CIN* Input Capacitance - 6 pF VIN = 0V
CI/O* Input/Output Capacitance - 8 pF VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY (July, 2002, Version 0.2) 4 AMIC Technology, Inc.
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A625308A Series
AC Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%)
Symbol Parameter
Min. Max.
Read Cycle
tRC Read Cycle Time 70 - ns
tAA Address Access Time - 70 ns
tACE Chip Enable Access Time - 70 ns
tOE Output Enable to Output Valid - 35 ns
tCLZ Chip Enable to Output in Low Z 10 - ns
tOLZ Output Enable to Output in Low Z 5 - ns
tCHZ Chip Disable to Output in High Z - 25 ns
tOHZ Output Disable to Output in High Z - 25 ns
tOH Output Hold from Address Change 10 - ns
Write Cycle
A625308A-70S/SI/SU
Unit
tWC Write Cycle Time 70 - ns
tCW Chip Enable to End of Write 60 - ns
tAS Address Set up Time 0 - ns
tAW Address Valid to End of Write 60 - ns
tWP Write Pulse Width 50 - ns
tWR Write Recovery Time 0 - ns
tWHZ Write to Output in High Z - 25 ns
tDW Data to Write Time Overlap 30 - ns
tDH Data Hold from Write Time 0 - ns
tOW Output Active from End of Write 5 - ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels.
PRELIMINARY (July, 2002, Version 0.2) 5 AMIC Technology, Inc.
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A625308A Series
Timing Waveforms
Read Cycle 1
(1)
tRC
Address
tAA
OE
DOUT
Read Cycle 2
Address
DOUT
CE
(1, 2, 4)
tCLZ
tOE
5
OLZ
t
tACE
5
tCHZ
tOH
5
tOHZ
5
tRC
tAA
tOH
tOH
PRELIMINARY (July, 2002, Version 0.2) 6 AMIC Technology, Inc.
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A625308A Series
Timing Waveforms (continued)
Read Cycle 3
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled, CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4. OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
Write Cycle 1 (Write Enable Controlled)
CE
DOUT
(1, 3, 4)
(6)
tCLZ
tACE
5
tCHZ
5
Address
CE
WE
DOUT
DIN
tWC
tAW
5
tCW
(4)
1
tAS
tWHZ
2
tWP
7
tWR
3
tDHtDW
7
tOW
PRELIMINARY (July, 2002, Version 0.2) 7 AMIC Technology, Inc.
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A625308A Series
Timing Waveforms (continued)
Write Cycle 2 (Chip Enable Controlled)
Address
CE
WE
(6)
tWC
tAW tWR
5
tCW
(4)
1
tAS
2
tWP
3
DOUT
DIN
tWHZ
tDW
7
tDH
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE.
3. tWR is measured form the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state.
5. tCW is measured from the later of CE going low to the end of Write.
6. OE level is high or low.
7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested.
PRELIMINARY (July, 2002, Version 0.2) 8 AMIC Technology, Inc.
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A625308A Series
AC Test Conditions
Input Pulse Levels 0V, 3V
Input Rise And Fall Time 5 ns
Input and Output Timing Reference Levels 1.5V
Output Load See Figure 1 and 2
TTL
CL
30pF
* Including scope and jig. * Including scope and jig.
CL
TTL
5pF
Figure 1. Output Load Figure 2. Output Load for tCLZ1, tCLZ2, tOHZ, tOLZ, tCHZ1, tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol Parameter Min. Max. Unit Conditions
VDR VCC for Data Retention 2.0 5.5 V
ICCDR
Data Retention Current
-
3
tCDR Chip Disable to Data Retention Time 0 - ns
tR Operation Recovery Time tRC - ns
CE VCC - 0.2V
VCC = 2.0V,
µA
CE VCC - 0.2V
VIN 0V
See Retention Waveform
PRELIMINARY (July, 2002, Version 0.2) 9 AMIC Technology, Inc.
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A625308A Series
Low VCC Data Retention Waveform
DATA RETENTION MODE
VCC
4.5V
tCDR
VDR ≥ 2.0V
4.5V
tR
CE
VIH
CE ≥ VDR - 0.2V
VIH
Ordering Information
Part No. Access Time (ns)
Operating Current
Max. (mA)
A625308A-70S 35 10 28L DIP
A625308AM-70S 35 10 28L SOP
A625308AV-70S 35 10 28L TSOP (Forward)
A625308A-70SI 35 15 28L DIP
A625308AM-70SI 35 15 28L SOP
70
A625308AV-70SI 35 15 28L TSOP (Forward)
A625308A-70SU 35 15 28L DIP
Standby Current
Max. (µA)
Package
A625308AM-70SU 35 15 28L SOP
A625308AV-70SU
35 15 28L TSOP (Forward)
PRELIMINARY (July, 2002, Version 0.2) 10 AMIC Technology, Inc.
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A625308A Series
Package Information
P-DIP 28L Outline Dimensions unit: inches/mm
D
28
E1
15
1
S
AL
A2
B
B1
14
A1
Base Plane
Seating Plane
e1
α
E
C
eA
Symbol
A - - 0.210 - - 5.33 A1 0.010 - - 0.25 - ­A2 0.150 0.155 0.160 3.81 3.94 4.06
B 0.016 0.018 0.022 0.41 0.46 0.56 B1 0.058 0.060 0.064 1.47 1.52 1.63
C 0.008 0.010 0.014 0.20 0.25 0.36
D - 1.460 1.470 - 37.08 37.34
E 0.590 0.600 0.610 14.99 15.24 15.49 E1 0.540 0.545 0.550 13.72 13.84 13.97
e1 0.090 0.100 0.110 2.29 2.54 2.79
L 0.120 0.130 0.140 3.05 3.30 3.56
α
eA 0.630 0.650 0.670 16.00 16.51 17.02
S - - 0.090 - - 2.29
Dimensions in inches Dimensions in mm
Min Nom Max Min Nom Max
- 15° - 15°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E1 does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY (July, 2002, Version 0.2) 11 AMIC Technology, Inc.
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A625308A Series
Package Information
SOP (W.B.) 28L Outline Dimensions unit: inches/mm
1528
E
H
θ
L
See Detail F
Detail F
c
L1
y
1
S
Seating Plane
B
D
e
y
D
14
A
A1 A2
Symbol
A A1 0.004 A2 0.093 0.098 0.103 2.36 2.49 2.62
B 0.014 0.016 0.020 0.36 0.41 0.51
C 0.008 0.010 0.012 0.20 0.25 0.30
D
E 0.326 0.331 0.336 8.28 8.41 8.53
e 0.044 0.050 0.056 1.12 1.27 1.42
H 0.453 0.465 0.477 11.51 11.81 12.12
L 0.028 0.036 0.044 0.71 0.91 1.12
L1 0.059 0.067 0.075 1.50 1.70 1.91
S
y
θ
Dimensions in inches Dimensions in mm
Min Nom Max Min Nom Max
- -
0.713 0.728
-
- -
- -
0.112
- -
0.047
0.004
-
- -
0.10
-
- -
- -
18.11 18.49
2.85
- -
1.19
0.10
-
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY (July, 2002, Version 0.2) 12 AMIC Technology, Inc.
Page 14
A625308A Series
Dimensions in inches
Dimensions in mm
Package Information
TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm
1
D
Detail "A"
1
E
14
D
y
D
28
15
e
Detail "A"
A2
c
A1
L
S
b
A
θ
Symbol
A - - 0.049 - - 1.25 A1 0.002 - - 0.05 - ­A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.007 0.009 0.011 0.17 0.22 0.27
c 0.005 - 0.008 0.12 - 0.21
E 0.311 0.315 0.319 7.90 8.00 8.10
L 0.012 0.020 0.028 0.30 0.50 0.70
D 0.520 0.528 0.536 13.20 13.40 13.60 D1 0.461 0.465 0.469 11.70 11.80 11.90
e 0.022 BSC 0.55 BSC
S 0.017 TYP 0.425 TYP
y - - 0.004 - - 0.10
θ 0°
Min Nom Max Min Nom Max
-
5° 0°
-
5°
PRELIMINARY (July, 2002, Version 0.2) 13 AMIC Technology, Inc.
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
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