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A615308 Series
Preliminary 32K X 8 BIT HIGH SPEED CMOS SRAM
Document Title
32K X 8 BIT HIGH SPEED CMOS SRAM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue January 17, 2001
PRELIMINARY (January, 2001, Version 0.0) AMIC Technology, Inc.
Page 2
A615308 Series
Preliminary 32K X 8 BIT HIGH SPEED CMOS SRAM
Features
n Single +5V power supply
n Access times: 12 ns (max.)
n Current: Operating: 150mA (max.)
Standby: 12mA (max.)
n Full static operation, no clock or refreshing required
General Description
The A615308 is a high-speed 262,144-bit static random
access memory organized as 32,768 words by 8 bits and
operates on a single 5V power supply. It is built using
high performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Pin Configurations
n SOJ nn TSOP
n All inputs and outputs are directly TTL compatible
n Common I/O using three-state output
n Data retention voltage: 2V (min.)
n Available in 28-pin SOJ and TSOP packages
Minimum standby power is drawn by this device when
CE is at a high level, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 2V.
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
A615308S
6
7
8
9
10
11
12
13
14 15
VCC
28
WE
27
A13
26
A8
25
A9
24
A11
23
OE
22
A10
21
CE
20
I/O7
19
I/O6
18
I/O5
17
I/O4
16
I/O3
A11
A13
WE
VCC
A14
A12
OE
1
2
3
A9
4
A8
5
6
7
8
9
10
A7
11
A6
12
A5
13
A4
14
A3
~
~
A615308V
~
~
28
A10
CE
27
26
I/O7
25
I/O6
I/O5
24
23
I/O4
22
I/O3
21
GND
20
I/O2
19
I/O1
18
I/O0
17
A0
16
A1
15
A2
PRELIMINARY (January, 2001, Version 0.0) 1 AMIC Technology, Inc.
Page 3
A615308 Series
Block Diagram
VCC
GND
A12
A13
A14
I/O0
I/O7
CE
OE
WE
A0
CONTROL
CIRCUIT
ROW
DECODER
INPUT DATA
CIRCUIT
512 X 512
MEMORY ARRAY
COLUMN I/O
Pin Description - SOJ
Pin No. Symbol Description
1 - 10, 21,
23 - 26
A0 - A14 Address Inputs
Pin Description - TSOP
Pin No. Symbol Description
2 - 5, 8 - 17, 28 A0 - A14 Address Inputs
18 - 20, 22 - 26 I/O0 - I/O7 Data Inputs/Outputs
11 - 13, 15 - 19 I/O0 - I/O7 Data Inputs/Outputs
20
22
27
CE
OE
WE
Chip Enable
Output Enable
Write Enable
27
1
6
CE
OE
WE
Chip Enable
Output Enable
Write Enable
7 VCC Power Supply
28 VCC Power Supply
21 GND Ground
14 GND Ground
PRELIMINARY (January, 2001, Version 0.0) 2 AMIC Technology, Inc.
Page 4
A615308 Series
Recommended DC Operating Conditions
(TA = 0°C to + 70°C)
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 4.5 5.0 5.5 V
GND Ground 0 0 0 V
VIH Input High Voltage 2.2 3.5 VCC + 0.5 V
VIL Input Low (1) Voltage -0.5 0 +0.8 V
CL Output Load - - 30 pF
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . . . . 0°C to +70°C
Storage Temperature, Tstg . . . . . . . . . . -55°C to +125°C
Temperature Under Bias, Tbias . . . . . . . . -10°C to +85°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . . 1.0W
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute maximum
rating conditions for extended periods may affect device
reliability.
DC Electrical Characteristics (TA = 0°C to + 70°C, VCC = 5V ± 10%, GND = 0V)
Symbol Parameter
Min. Max.
ILI
ILO
ICC1 (2) Dynamic Operating
ISB - 35 mA
ISB1
VOL Output Low Voltage - 0.4 V IOL = 8 mA
VOH Output High Voltage 2.4 - V IOH = -4 mA
Notes: 1. VIL = -3.0V for pulses less than 20 ns.
2. ICC1 is dependent on output loading, cycle rates, and Read/Write patterns.
Input Leakage - 2
Output Leakage - 2
Current
Standby Power
Supply Current
A615308-12
- 150 mA
-
12
Unit Conditions
µA
µA
mA
VIN = GND to VCC
CE = VIH or OE = VIH
VI/O = GND to VCC
CE = VIL, II/O = 0 mA
Min. Cycle, Duty = 100%
CE = VIH
CE ≥ VCC - 0.2V
VIN ≥ VCC -0.2V or
VIN ≤ 0.2V
PRELIMINARY (January, 2001, Version 0.0) 3 AMIC Technology, Inc.
Page 5
A615308 Series
CE OE WE
Truth Table
Mode
Standby H X X High Z ISB, ISB1
Output Disable L H H High Z ICC1
Read L L H DOUT ICC1
Write L X L DIN ICC1
Note: X = H or L
I/O Operation Supply Current
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol Parameter Min. Max. Unit Conditions
CIN* Input Capacitance - 10 pF VIN = 0V
CI/O* Input/Output Capacitance - 10 pF VI/O = 0V
* These parameters are sampled and not 100% tested.
AC Characteristics (TA = 0°C to +70°C, VCC = 5V ± 10%)
Symbol Parameter
Min. Max.
A615308-12
Unit
Read Cycle
tRC Read Cycle Time 12 - ns
tAA Address Access Time - 12 ns
tACE Chip Enable Access Time - 12 ns
tOE Output Enable to Output Valid - 6 ns
tCLZ Chip Enable to Output in Low Z 3 - ns
tOLZ Output Enable to Output in Low Z 0 - ns
tCHZ Chip Disable Output in High Z 0 6 ns
tOHZ Output Disable to Output in High Z 0 6 ns
tOH Output Hold from Address Change 3 - ns
PRELIMINARY (January, 2001, Version 0.0) 4 AMIC Technology, Inc.
Page 6
A615308 Series
AC Characteristics (continued)
Symbol Parameter
A615308-12
Unit
Min. Max.
Write Cycle
tWC Write Cycle Time 12 - ns
tCW Chip Enable to End of Write 10 - ns
tAS Address Setup Time of Write 0 - ns
tAW Address Valid to End of Write 10 - ns
tWP Write Pulse Width 10 - ns
tWR Write Recovery Time 0 - ns
tWHZ Write to Output in High Z 0 6 ns
tDW Data to Write Time Overlap 6 - ns
tDH Data Hold from Write Time 0 - ns
tOW Output Active from End of Write 3 - ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levles.
Timing Waveforms
Read Cycle 1
(1)
tRC
Address
tAA
OE
DOUT
CE
tCLZ
tOE
5
tOLZ
tACE
5
tOH
5
tOHZ
5
tCHZ
PRELIMINARY (January, 2001, Version 0.0) 5 AMIC Technology, Inc.
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A615308 Series
Timing Waveforms (continued)
Read Cycle 2
Address
DOUT
(1, 2, 4)
tRC
tAA
tOH
tOH
Read Cycle 3
(1, 3, 4,)
CE
tACE
5
tCLZ
DOUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled, CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4. OE = VIL.
5. Transition is measured ±200mV from steady state. This parameter is sampled and not 100% tested.
tCHZ
5
PRELIMINARY (January, 2001, Version 0.0) 6 AMIC Technology, Inc.
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A615308 Series
Timing Waveforms (continued)
Write Cycle 1
(Write Enable Controlled)
Address
(6)
tWC
CE
WE
DIN
DOUT
Write Cycle 2
(Chip Enable Controlled)
Address
CE
tAW
5
tCW
(4)
1
tAS
7
tWHZ
2
tWP
tDW
tWR
3
tDH
7
tOW
tWC
1
tAS
(4)
tAW
tCW
5
tWR
3
2
tWP
WE
DOUT
DIN
tWHZ
tDW
7
tDH
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE .
3. tWR is measured from the earliest of CE or WE going high to the end of the Write cycle
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs
remain in a high impedance state.
5. tCW is measured from the later of CE going low to the end of Write.
6. OE is continuously low. (OE = VIL)
7. Transition is measured ±200mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY (January, 2001, Version 0.0) 7 AMIC Technology, Inc.
Page 9
A615308 Series
AC Test Conditions
Input Pulse Levels 0V to 3.0V
Input Rise and Fall Time 2 ns
Input and Output Timing Reference Levels 1.5V
Output Load See Figures 1 and 2
DATAOUT
30pF
5V
480
Ω
DATAOUT
255
Ω
5pF*
* Including scope and jig.
5V
480
Ω
255
Ω
Figure 1. Output Load Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C)
Symbol Parameter Min. Max. Unit Conditions
VDR VCC for Data Retention 2 5.5 V
ICCDR Data Retention Current
-
1
mA
CE ≥ VCC - 0.2V
VCC = 2.0V
CE ≥ VCC - 0.2V
VIN ≥ VCC - 0.2V or
VIN ≤ 0.2V
tCDR
Chip Disable to Data Retention
Time
0 - ns
See Retention Waveform
tR Operation Recovery Time tRC* - ns
tRC = Read Cycle Time
PRELIMINARY (January, 2001, Version 0.0) 8 AMIC Technology, Inc.
Page 10
A615308 Series
Low VCC Data Retention Waveform
DATA RETENTION MODE
VCC
4.5V
tCDR
VDR ≥ 2.0V
4.5V
tR
CE
VIH
CE ≥ VDR - 0.2V
VIH
Ordering Information
Part No. Access Time (ns)
Operating Current
Max. (mA)
A615308S-12 12 150 12 28L SOJ
A615308V-12 12 150 12 28L TSOP
Standby Current
Max. (mA)
Package
PRELIMINARY (January, 2001, Version 0.0) 9 AMIC Technology, Inc.
Page 11
A615308 Series
Package Information
SOJ 28L Outline Dimensions unit: inches/mm
1528
E
HE
1
S
Seating Plane
D
b
b1
14
A2
A
e
A1
y
D
L
e1
C
Symbol
A - - 0.140 - - 3.56
A1 0.027 - - 0.69 - A2 0.095 0.100 0.105 2.41 2.54 2.67
b1
b 0.018 TYP 0.46 TYP
C 0.010 TYP 0.25 TYP
D - 0.710 0.730 - 18.03 18.54
E 0.295 0.300 0.305 7.49 7.62 7.75
e 0.050 BSC 1.27 BSC
e1
HE
L 0.077 0.087 0.097 1.96 2.21 2.46
S - - 0.045 - - 1.14
y - - 0.004 - - 0.10
Dimensions in inches Dimensions in mm
Min Nom Max Min Nom Max
0.028 TYP 0.71 TYP
0.255 0.265 0.275 6.48 6.73 6.99
0.329 0.337 0.345 8.36 8.56 8.76
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension e1 is for PC Board surface mount pad pitch design
reference only.
4. Dimension S includes end flash.
PRELIMINARY (January, 2001, Version 0.0) 10 AMIC Technology, Inc.
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A615308 Series
Dimensions in inches
Dimensions in mm
Package Information
TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm
D1
1
E
28
A2
c
A1
e
14
D
y
D
15
Detail "A"
Detail "A"
A
θ
L
S
b
Symbol
A - - 0.049 - - 1.25
A1 0.002 - - 0.05 - A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.007 0.009 0.011 0.17 0.22 0.27
c 0.005 - 0.008 0.12 - 0.21
E 0.311 0.315 0.319 7.90 8.00 8.10
L 0.012 0.020 0.028 0.30 0.50 0.70
D 0.520 0.528 0.536 13.20 13.40 13.60
D1 0.461 0.465 0.469 11.70 11.80 11.90
e 0.022 BSC 0.55 BSC
S 0.017 TYP 0.425 TYP
y - - 0.004 - - 0.10
θ 0°
Min Nom Max Min Nom Max
-
5° 0°
-
5°
PRELIMINARY (January, 2001, Version 0.0) 11 AMIC Technology, Inc.
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
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