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A3195LU
Datasheet (Allegro)
10 pgs91.8 Kb0

Datasheet A3195LU, A3195LLT, A3195EU, A3195ELT Datasheet (Allegro)

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Page 1
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
HALL-EFFECT LATCH WITH ACTIVE PULL-DOWN
X
LATCH
CC
V
1
32
3195
PROTECTED, HIGH-TEMPERATURE,
Data Sheet
27609.15*
SUPPLY
Pinning is shown viewed from branded side.
GROUND
Dwg. PH-013
OUTPUT
ABSOLUTE MAXIMUM RATINGS
␣
Supply Voltage, VCC (100 ms) .......... 115 V*
(continuous)................................... 26 V
Reverse Battery Voltage,
V
(100 ms)............................ -100 V
RCC
(continuous)................................. -30 V
Magnetic Flux Density, B........... Unlimited
Reverse Output Voltage, V Continuous Output Current,
I
........................... Internally Limited
OUT
Package Power Dissipation,
P
........................................ See Graph
D
Junction Temperature, T Operating Temperature Range, T
Suffix “E–”.................... -40°C to +85°C
Suffix “L–” .................. -40
Storage Temperature, T
......... -0.5 V
OUT
................. 170°C
J
A
°C to +150°C
................. 170°C
S
Each monolithic device contains an integrated Hall-effect trans­ducer, a temperature-compensated comparator, a voltage regulator, and a buffered high-side driver with an active pull-down. Supply protection is made possible by the integration of overvoltage shutdown circuitry that monitors supply fault conditions. Output protection circuitry includes source and sink current current limiting for short circuits to supply or ground.
The A3195E– is rated for operation over a temperature range of
-40°C to +85°C; the A3195L– is rated for operation over an extended temperature range of -40°C to +150°C. They are supplied in a three­lead SIP (suffix –U) or a surface-mount SOT-89 (suffix –LT).
FEATURES
■ Internal Protection For Automotive (ISO/DIN) Transients
■ Operation From Unregulated Supply
■ Reverse Battery Protection
■ Undervoltage Lockout
■ Supply Noise-Suppression Circuitry
■ Output Short-Circuit Protection
■ Output Zener Clamp
■ Thermal Protection
■ Symmetrical Latching Switch Points
■ Operable with Multipole Ring Magnets
*Fault condition, internal overvoltage shutdown above 28 V.
Always order by complete part number, e.g., A3195LU .
Page 2
3195
3
2
1
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
FUNCTIONAL BLOCK DIAGRAM
V
CC
OVERVOLT.
LOCKOUT
REG.
800
700
600
500
Dwg. FH-013
"U" PACKAGE R
θJA
= 183°C/W
X
LATCH
OUTPUT
CURRENT
15kΩ
LIMIT
GROUND
TRANSFER CHARACTERISTICS
26 V MAX
VOUT(H)
400
300
200
100
0
ALLOWABLE PACKAGE POWER DISSIPATION IN mW
"LT" PACKAGE R
θJA
= 258°C/W
20
60 100 140 180
40 80 120
AMBIENT TEMPERATURE IN °C
160
Dwg. GH-054A
OUTPUT VOLTAGE IN VOLTS
0
-B
B
RP
0+B
FLUX DENSITY
B
OP
OUT(L)
V
Dwg. GH-034-3
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
W Copyright © 1995, 1997, Allegro MicroSystems, Inc.
Page 3
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
ELECTRICAL CHARACTERISTICS over operating voltage and temperature range (unless otherwise specified).
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Supply Voltage V Overvoltage Shutdown* V Output Voltage, High V
(Source Voltage)
CC
CC(OV)
OUT(H)
Operating (but VCC x ICC VS TA limited) 3.8 12 26 V B > B B < B
OP
= -20 mA VCC -2 — VCC -0.3 V
RP, IOUT
28 — 55 V
Output Voltage, Low V
OUT(L)
(Sink Voltage) B > B Output Clamp Voltage V Output Current Limit I
Supply Current I
Reverse Battery Current* I
Output Rise Time t Output Fall Time t Package Thermal Resist. R
OUT(CLMP)
OUTMAX
CC
RCC
r
f
θJA
B > B
B < BRP, VCC > 26 V, I
<100 µA — 0.1 0.2 V
OP, IOUT
= 5 mA — 0.25 0.5 V
OP, IOUT
= 0 15 18 21 V
OUT
B < BRP, VCC = 12 V -26 — -70 mA B > B
B < BRP, VCC = 18 V, I B > B V
V V
, V
OP
OP
= +115 V* — 8.0 17 mA
CC
= -35 V* — -0.1 -5.0 mA
RCC
= -100 V* — -0.1 -10 mA
RCC
< 14 V 8.0 — 25 mA
OUT
= 0 — 6.0 9.0 mA
OUT
, VCC = 18 V, I
= 0 — 8.0 12 mA
OUT
CL = 20 pF, RL = 330 Ω — 0.12 2.0 µs CL = 20 pF, RL = 330 Ω — 0.30 5.0 µs “LT” Package — 258 — °C/W
“U” Package — 183 — °C/W
MAGNETIC CHARACTERISTICS over operating voltage range (unless otherwise specified).
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Operate Point B
Release Point B
Hysteresis B (B
- BRP)T
OP
OP
RP
hys
TA = -40°C 60 125 200 G T
= +25°C 50 110 160 G
A
T
= Maximum 40 100 150 G
A
TA = -40°C -200 -125 -60 G T
= +25°C -160 -110 -50 G
A
T
= Maximum -150 -100 -40 G
A
TA = -40°C 150 250 — G
= +25°C 130 220 — G
A
T
= Maximum 110 200 — G
A
NOTES: Negative current is defined as coming out of (sourcing) the output.
BOP = magnetic operate point (output turns ON); BRP = magnetic release point (output turns OFF). As used here, negative flux densities are defined as less than zero (algebraic convention). Typical values are at TA = +25°C and VCC = 12 V. * Fault condition. Device is shut down and operation is not possible.
Page 4
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
TYPICAL OPERATING CHARACTERISTICS
200
100
V = 3.8 V–26 V
0
CC
-100
SWITCH POINTS IN GAUSS
-200
-50
0255075
AMBIENT TEMPERATURE IN °C
Vcc
OPERATE POINT
RELEASE POINT
100
125-25
150
Vcc - 1
Vcc - 2
V = 16 V
CC
0.4
OUTPUT VOLTAGE IN VOLTS
0.2
OUTPUT LOW, (SINKING CURRENT)
0
-50
-25
B ≥ B
0255075
OP
AMBIENT TEMPERATURE IN °C
Dwg. GH-052-1
TYPICAL OPERATING CHARACTERISTICS
Output Current Limit
I = 5 mA
OUT
I ≤ 100 µA
100
B ≤ B
OUT
125
OUTPUT HIGH, (SOURCING CURRENT)
I = -20 mA
OUT
RP
150
Dwg. GH-040-2
20
0
-20
CURRENT LIMIT IN mA
-40
-60
-50
V = 16 V
CC
OUTPUT LOW, (SINKING CURRENT)
OUTPUT HIGH, (SOURCING CURRENT)
0255075
AMBIENT TEMPERATURE IN °C
100
B ≥ B
OP
B ≤ B
RP
125-25
Dwg. GH-004-1
150
9.0
8.0
7.0
V = 3.8 V
SUPPLY CURRENT IN mA
6.0
5.0
-50
CC
OUTPUT HIGH, B ≥ B OUTPUT LOW,
0 255075100
V = 12 V
B ≤ B
CC
OP
RP
V = 26 V
CC
AMBIENT TEMPERATURE IN °C
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
125-25
Dwg. GH-028-2
150
Page 5
3195
3
2
1
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
3.8 V TO 26 V
WITH TRANSIENTS
V
CC
C
BYPASS
OPERATION
In operation, the output transistor is OFF until the strength of the magnetic field perpendicular to the surface of the chip exceeds the threshold or operate point (BOP). When the field strength exceeds BOP, the output transistor switches ON (a logic low) and is capable of sinking 35 mA of current.
The output transistor switches OFF (a logic high) when magnetic field reversal results in a magnetic flux density below the OFF threshold (BRP). This is illustrated in the transfer characteristics graph. Note that the device latches; that is, a south pole of sufficient strength will turn the device ON. Removal of the south pole will leave the device ON. The presence of a north pole of sufficient strength is required to turn the device OFF.
X
TO µP
C
L
R
L
Dwg. EH-007
TEST CIRCUIT AND
TYPICAL APPLICATION
An external 0.1 µF to 0.47 µF capacitor, with good high-frequency characteristics, should be connected between terminals 1 and 2 to bypass high-voltage noise and reduce EMI susceptibility.
Internal Pull-Down Resistor. An internal pull-down resistor (nominal 15 kΩ) is provided to allow testing of the device without the need for an external load.
20
18
16
14
The switch points increase in sensitivity
with increasing temperature to compensate
12
PULL-DOWN RESISTANCE IN kΩ
for the typical ferrite magnet temperature characteristic. The simplest form of magnet that will operate these devices is a ring magnet. Other methods of operation are possible.
10
-50
-25
0255075
AMBIENT TEMPERATURE IN °C
100
125
150
Dwg. GH-060
Page 6
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
INTERNAL PROTECTIVE FEATURES
ISO
Pulse No. Test Test Conditions (at T
1 Inductive Turn Off (Negative) V
2 Inductive Turn Off (Positive) V 3a Capacitive/Inductive Coupling (Neg) V 3b Capacitive/Inductive Coupling (Pos) V
4 Reverse Battery V
5 Load Dump (ISO) V
(DIN) V
6 Ignition Coil Disconnect V
EXTERNAL PROTECTION REQ’D
= -100 V, RS = 10 Ω, tr = 1 µs, td = 2 ms
S
= 90 V, RS = 10 Ω, tr = 1 µs, td = 50 µs
S
= -150 V, RS = 50 Ω, tr = 50 ns, td = 100 ns
S
= 100 V, RS = 50 Ω, tr = 50 ns, td = 100 ns
S
= -14 V, td = 20 s
S
= 86.5 V, RS = 0.5 Ω, tr = 5 ms, td = 400 ms
S
= 120 V, RS = 0.5 Ω, tr = 100 ns, td = 400 ms
S
= -300 V, RS = 30 Ω, tr = 60 µs, td = 300 µs
S
= +25°C)
A
12 V
7 Field Decay (Negative) V
0.9 V
S
0.1 V
S
0
t
r
t
d
= -80 V, RS = 10 Ω, tr = 5 ms, td = 100 ms
S
V
S
-
Power supply voltage transients, or device output short circuits, may be caused by faulty connectors, crimped wiring harnesses, or service errors. To prevent catastrophic failure, internal protection against overvoltage, reverse voltage, output overloads have been incorporated to meet the automotive 12 volt system protection requirements of ISO DP7637/1 and DIN 40839-1. A series-blocking diode or current-limiting resistor is required in order to survive pulse number six.
Output Overloads. Current through the output source transistor is sensed with a low-value on-chip aluminum resistor. The voltage drop across this resistor is fed back to control the base drive of the output stage. This feedback prevents the output transistor from exceeding its maximum current density rating by limiting the output current to between
-26 mA and -70 mA. Under short-circuit conditions, the device will dissipate an increased amount of power (PD = V
OUT
x I
LIMIT
) and the
output transistor will be thermally stressed. Current through the active pull-down is limited to between 8 mA and 25 mA.
Overvoltage. The device protects itself against high-voltage transients by shutting OFF the output source driver and all supply­referenced active components, reducing the supply current, and minimizing device power dissipation. Overvoltage shutdown can occur anywhere between 28 V and 55 V and device operation above 28 V cannot be recommended. The device will continue to operate, with increased power dissipation, for supply voltages above the internal clamp voltage but below the over­voltage shutdown. Under a sustained overvoltage, the device may be required to dissipate an increased amount of power (PD = VCC x ICC) and the device may be thermally stressed (see above).
Output Voltage. The output is clamped with an on-chip Zener diode to prevent supply overvoltage faults from appearing at the output when the field is less than BRP.
When any fault condition is removed, the device returns to normal operating mode.
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
Page 7
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
CRITERIA FOR DEVICE QUALIFICATION
All Allegro sensors are subjected to stringent qualification requirements prior to being released to production. To become qualified, except for the destructive ESD tests, no failures are permitted.
Test Method and No. of Samples
Qualification Test Test Conditions Lots Test Length Per Lot Comments
Biased Humidity JESD22-A101 3 1200 hrs 116 Device biased for
T
= 85°C, RH = 85% minimum power
A
High-Temperature JESD22-A108 3 1200 hrs 116 Operating Life T
Surge Operating Life JESD22-A108 1 504 hrs 116
Pressure Cooker, JESD22-A102, Method C 3 96 hrs 77 Unbiased
Storage Life MIL-STD-883, Method 1008 1 1200 hrs 77
Temperature Cycle MIL-STD-883, Method 1010 3 1000 cycles 153
= 150°C, TJ = 165°C
A
T
= 175°C, TJ = 190°C
A
T
= 170°C
A
ESD MIL-STD-883, Method 3015 1 Pre/Post 3 per Test to failure Human Body Model Reading test HBM ≥ 12 kV
ESD 1 Pre/Post 3 per Test to failure Machine Model Reading test MM ≥ 600 V
Page 8
3195
A
A
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
SENSOR LOCATIONS
(±0.005" [0.13 mm]
SUFFIX “LT”
ACTIVE AREA DEPTH
ACTIVE AREA DEPTH
0.030"
0.76 mm
NOM
0.015"
0.38 mm
NOM
die placement)
2.21 mm
1 32
SUFFIX “U”
2.26 mm
0.087"
0.089"
0.051"
1.30 mm
Dwg. MH-008-6A
0.073"
1.85 mm
APPLICATIONS INFORMATION
The A3195– latch has been optimized for use in automotive ring magnet sensing applications. Such applications include transmission speed sensors, motor position encoders, and wheel bearing speed sensors. Special care has been taken to optimize the operation of these devices in automotive subsystems that require ISO DP9637 protection but NOT operation. Short-circuit protection is included to prevent damage caused by pinched wiring harnesses. An on-chip pull-down resistor is provided to allow device testing without the connection of the control module.
A typical application consists of a ferrite ring magnet located on a rotating shaft. Typically, this shaft is at­tached to the transmission, the sensor is mounted on a board, with care being taken to keep a tight tolerance on the air gap between the package face and the magnet. The device will provide a change in digital state at the transition of every magnetic pole and, thus, give an indication of the transmission speed. The high magnetic hysteresis allows the device to be immune to vibration of the magnet shaft and relatively good duty cycles can be obtained.
Hall effect applications information is also available in the
Allegro Integrated and Discrete Semiconductors Data
Book
or
Application Note
27701.
BRANDED SURFACE
1 32
Dwg. MH-002-13A
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
Page 9
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
A3195ELT AND A3195LLT
Dimensions in Inches
(for reference only)
0.155
0.167
0.035
0.047
0.059
BSC
0.173
0.181
0.064
0.072
0.090
1
23
0.118
BSC
0.102
0.014
0.019
0.017
0.022
Dimensions in Millimeters
(controlling dimensions)
4.40
4.60
1.62
1.83
0.055
0.063
0.014
0.017
0.084
0.090
Dwg. MA-009-3 in
1.40
1.60
0.35
0.44
3.94
4.25
0.89
1.20
1.50
BSC
NOTE — Exact body and lead configuration at vendor’s option within limits shown.
1
23
3.00
BSC
2.29
2.60
0.36
0.48
0.44
0.56
2.13
2.29
Dwg. MA-009-3 mm
Page 10
3195
PROTECTED, HIGH-TEMP., ACTIVE PULL-DOWN HALL-EFFECT LATCH
Dimensions in Inches Dimensions in Millimeters
(controlling dimensions) (for reference only)
A3195EU AND A3195LU
SEE NOTE
0.181
0.176
0.600
0.560
0.086
MAX
0.183
0.178
1 2 3
0.050
0.100
0.063
0.059
0.016
45°
0.018
0.015
Dwg. MH-003D in
SEE NOTE
4.60
4.47
15.24
14.23
2.18
MAX
4.65
4.52
1 2 3
1.27
2.54
1.60
1.50
45°
0.46
0.38
0.41
Dwg. MH-003D mm
NOTES: 1. Tolerances on package height and width represent allowable mold offsets.
Dimensions given are measured at the widest point (parting line).
2. Exact body and lead configuration at vendor’s option within limits shown.
3. Height does not include mold gate flash.
4. Recommended minimum PWB hole diameter to clear transition area is 0.035” (0.89 mm).
5. Where no tolerance is specified, dimension is nominal.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from
the detail specifications as may be required to permit improvements in the design of its products.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
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