Page 1
A23W8308
Preliminary 262,144 X 8 BIT CMOS MASK ROM
PRELIMINARY (November, 1999, Version 0.0) AMIC Technology, Inc.
Document Title
262,144 X 8 BIT CMOS MASK ROM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue November 11, 1999 Preliminary
Page 2
A23W8308
Preliminary 262,144 X 8 BIT CMOS MASK ROM
PRELIMINARY (November, 1999, Version 0.0) 1 AMIC Technology, Inc.
Features
n 262,144 x 8 bit organization
n Wide power supply range : +2.7V to +5.5V
n Access time: 120 ns (max.)/5V
n 150 ns (max.)/3V
n Current: Operating: 50mA (max.)/5V
15mA (max.)/3V
Standby: 50µA (max.)/5V
25µA (max.)/3V
n Mask Programmed for Chip Enable (power-down)
CE/CE , Output Enable OE/OE /NC
n Three-state outputs for wired-OR expansion
n Full static operation
n All inputs and outputs are directly TTL-compatible
n Available in 32-pin DIP, 32-pin SOP, 32-pin PLCC
packages or in DICE FORM.
General Description
The A23W8308 high-performance Read Only Memory is
configured as 262,144 x 8 bits. It is designed to be
compatible with all microprocessors and similar
applications where high-performance, large-bit storage,
and simple interfacing are important design
considerations. This device is designed for use with
operating voltage from 3V to 5V.
The A23W8308 offers an automatic POWER-DOWN
controlled by the Chip Enable CE/CE input. When
CE/CE goes low/high, the device will automatically
POWER-DOWN and remain in a low power STANDBY
mode as long as CE/ CE remains low/high. A23W8308
also offers OE/OE /NC (Active High or Low or No
Connection), which eliminates bus contention in multiple
bus microprocessor systems.
Pin Configurations
nn P-DIP / SOP nn PLCC
A23W8308
A6
A10
A9
O6
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
O0
O1
O3
O4
O5
A11
A9
A13
VCC
A10
A23W8308
1
2
3
4
5
6
7
8
9
10
11
12
13
14 19
20
21
22
23
24
25
26
27
28
29
30
31
32
A8
O2
GND
O6
O7
CE/CE
A14
A5
A4
A3
A2
A1
A0
O0
O7
A8
A13
A14
A12
A15
A16NCVCCNCA17
O1
O2
GND
O3
O4
O5
1
2
3
4
5
6
7
8
9
10
11
12
13
323130
141615
171819
20
21
22
23
24
25
26
27
28
29
OE/OE/NC
1815
16
17
A1
A0
NC
A17
CE/CE
A11
A7
OE/OE/NC
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A23W8308
PRELIMINARY (November, 1999, Version 0.0) 2 AMIC Technology, Inc.
Block Diagram
COLUMN SELECTOR CIRCUITRY
ROW
DECODER
DRIVER
MEMORY CELL
ARRAY
262,144
COLUMN
DECODER
DRIVER
POWER-DOWN
OR
OUTPUT
ENABLE
CIRCUITRY
A0 - A17
ADDRESS
INPUTS
O6
O5
O4
O3
O2
O1
O0
CE/CE
OE/OE/NC
O7
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A23W8308
PRELIMINARY (November, 1999, Version 0.0) 3 AMIC Technology, Inc.
Pin Descriptions
Pin No.
32L DIP/SOP 32L PLCC
Symbol Description
2 - 12, 23,
25 - 30
2 - 12, 23,
25 - 30
A0 - A17 Address Inputs
22 22
CE/CE
Chip Enable Input (Note 1)
24 24
OE/OE /NC
Output Enable (Note 1)
13 - 15,
17 - 21
13 - 15,
17 - 21
O0 - O7 Data Outputs
32 32 VCC Power Supply
16 16 GND Ground
1, 31 1, 31 NC No Connection (Note 2)
Notes:
1. This pin is user-definable as active high or active low.
2. NC indicates "No Connection."
Recommended DC Operating Conditions
(TA = 0°C to + 70°C)
Symbol Parameter Min. Max. Unit
VCC Supply Voltage 2.7 5.5 V
GND Ground 0 0 V
VIH Input High Voltage 0.7* VCC VCC+0.3 V
VIL Input Low Voltage - 0.5 0.8 V
Page 5
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 4 AMIC Technology, Inc.
Absolute Maximum Ratings*
Ambient Operating Temperature . . . . . . . -10°C to + 80°C
Storage Temperature . . . . . . . . . . . . . . -65°C to + 150°C
Supply Voltage to Ground Potential . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to + 7.0V
Output Voltage . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . 400mW
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics (TA = 0°C to + 70°C, GND = 0V)
Symbol Parameter
5.0V ±± 10% 3.0V ±± 10%
Unit Conditions Note
Min. Max. Min. Max.
VOH
Output High
Voltage
2.4 2.15 V
IOH = -1mA (5V)
IOH = -0.4mA (3V)
VOL
Output Low
Voltage
0.4 0.4 V
IOL = 3.2mA (5V)
IOL = 1.6mA (3V)
VlH
Input High
Voltage
2.2 VCC + 0.3 0.7 * VCC VCC+0.5 V
VlL
Input Low
Voltage
-0.5 0.8 -0.5 0.6 V
lLI
Input Leakage
Current
+10 +5
µA
VCC = max.
VIN = VCC to GND
lLO
Output Leakage
Current
+10 +5
µA
VCC = max.
VOUT = VCC to GND
1
ICC
Operating
Supply Current
50 15 mA tCYC = min. 2
ISB
Standby Supply
Current (TTL)
1.5 0.5 mA
CE = VIH, CE = VIL
ISB1
Standby Supply
Current (CMOS)
50 25
µA
CE = VCC - 0.2V,
CE = 0.2V
Page 6
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 5 AMIC Technology, Inc.
Capacitance
Symbol Parameter Min. Max. Unit Test Conditions Note
CI Input Capacitance 10 pF
TA = 25°C
3
CO Output Capacitance 10 pF
f = 1.0MHz
AC Characteristics (TA = 0°C to +70°C, GND = 0V)
Symbol Parameter
5.0V ±± 10% 3.0V ±± 10%
Unit Note
Min. Max. Min. Max.
tCYC Cycle Time 120 150 ns
tAA Address Access Time 120 150 ns
tACE Chip Enable Access Time 120 150 ns
tAOE Output Enable Access Time 70 90 ns
tOH Output Hold after Address Change 10 10 ns
tLZ Output Low Z Delay 10 10 ns 4, 6
tHZ Output High Z Delay* 30 70 ns 5, 6
* tHZ is specified from either OE /OE or CE /CEgoing disabled, whichever occurs first.
Notes:
1. OE/CE = VIL, OE /CE = VIH (Output is unloaded)
2. VIN = VIH/VIL, but OE/CE = VIH,OE /CE = VIL (Output is unloaded)
3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground.
4. Output LOW impedance delay (tLZ) is measured from CE or OE going active.
5. Output HIGH impedance delay (tHZ) is measured from CE or OE going inactive.
6. This parameter is sampled and not 100% tested.
Page 7
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 6 AMIC Technology, Inc.
Timing Waveforms
Propagation Delay from Address (CE/CE= Active, OE/OE= Active)
tAA
VALID
VALID
tCYC
tOH
ADDRESS
INPUTS
DATA OUT
Propagation Delay from Chip Enable or Output Enable (Address Valid)
tACE
tHZ
VALID
DATA OUT
tAOE
CHIP
ENABLE
OUTPUT
ENABLE
VALID
VALID
tLZ
tLZ
AC Test Conditions
Applied Voltage
5.0V ±± 10% 3.0V ±± 10%
Input Pulse Levels 0.4V to 2.4V 0.4V to 2.4V
Input Rise and Fall Time 10 ns 10 ns
Timing Measurement Reference Level
VIH = 2.2V VIL = 0.8V
VOH = 2.0V VOL = 08V
VIN = 1.5V
VOUT = 1.5V
Output Load 1 TTL gate and CL = 100pF
Page 8
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 7 AMIC Technology, Inc.
Function Table
CE/
CE
OE/OE/NC
O0 - O7 Mode
A A Data Out Read
I X Hi - Z Power-down
A I Hi - Z Output Disable
1. CE/CE and OE/OE /NC are mask programmable as either active low, active high, or no connection.
2. "A" means "Active," "I" means "Inactive," and "X" means "Either."
Ordering Information
Access Time (ns)
Part No.
5.0V 3.0V
Package
A23W8308 120 150 32L DIP
A23W8308M 120 150 32L SOP
A23W8308L 120 150 32L PLCC
A23W8308H 120 150 DICE FORM
Page 9
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 8 AMIC Technology, Inc.
Pad Configurations
Pad Location
Coordinate (um) Coordinate (um)
Pad No. Pad Name
X Y
Pad No. Pad Name
X Y
1 VCC -73.6 894.3 18 O3 138.7 -907.7
2 A16 -259.9 907.2 19 O4 261.7 -907.7
3 A15 -409.9 907.2 20 O5 413.2 -907.7
4 A12 -532.9 907.2 21 O6 536.2 -907.7
5 A7 -682.9 907.2 22 O7 687.7 -907.7
6 A6 -805.9 907.2 23
CE/CE
810.7 -907.2
7 A5 -955.9 907.2 24 A10 960.7 -907.2
8 A4 -1078.9 907.2 25
OE/OE /NC
1083.7 -907.2
9 A3 -1079.3 -907.2 26 A11 1083.3 907.2
10 A2 -956.3 -907.2 27 A9 960.3 907.2
11 A1 -806.3 -907.2 28 A8 810.3 907.2
12 A0 -683.3 -907.2 29 A13 687.3 907.2
13 O0 -529.3 -907.7 30 A14 537.3 907.2
14 O1 -406.3 -907.7 31 A17 414.3 907.2
15 O2 -254.8 -907.7 32 NC 264.3 907.2
16 GND -131.8 -907.7 33 VCC 97.1 905.7
17 GND -8.8 -905.7
9 10 11 12 13 14 15 16 18 19 20 21 22 23 2417 25
8 7 6 5 4 3 2 1 32 31 30 29 28 27 2633
A4
A7
A6
A5
A12
A15
A16
VCC
VCC
NC
A17
A14
A13A8A9
A11
A2
O0
A0
A1
O1
O2
GND
GND
O3
O4
O5
O6
O7
CE/CE
A10
OE/OE/NC
A3
(0,0)
X
Y
Page 10
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 9 AMIC Technology, Inc.
Package Information
P-DIP 32L Outline Dimensions unit: inches/mm
1
32
E
A2
AL
E1
EA
D
C
θ
B1
B
A1
Base Plane
Seating Plane
16
17
e
Dimensions in inches Dimensions in mm
Symbol
Min Nom Max Min Nom Max
A - - 0.210 - - 5.334
A1 0.015 - - 0.381 - A2 0.149 0.154 0.159 3.785 3.912 4.039
B - 0.018 - - 0.457 B1 - 0.050 - - 1.270 -
C - 0.010 - - 0.254 -
D 1.645 1.650 1.655 41.783 41.91 42.037
E 0.537 0.542 0.547 13.64 13.767 13.894
E1 0.590 0.600 0.610 14.986 15.240 15.494
EA 0.630 0.650 0.670 16.002 16.510 17.018
e - 0.100 - - 2.540 -
L 0.120 0.130 0.140 3.048 3.302 3.556
θ 0°
-
15° 0°
-
15°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
Page 11
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 10 AMIC Technology, Inc.
Package Information
SOP (W.B.) 32L Outline Dimensions unit: inches/mm
1
E
HE
L
LE
c
16
See Detail F
Detail F
1732
A1 A2
A
S
D
Seating Plane
D
y
e
b
θ
Dimensions in inches Dimensions in mm
Symbol
Min Nom Max Min Nom Max
A - - 0.118 - - 3.00
A1 0.004 - - 0.10 - A2 0.101 0.106 0.111 2.57 2.69 2.82
b 0.014 0.016 0.020 0.36 0.41 0.51
c 0.006 0.008 0.012 0.15 0.20 0.31
D - 0.805 0.817 - 20.45 20.75
E 0.440 0.445 0.450 11.18 11.30 11.43
e 0.044 0.050 0.056 1.12 1.27 1.42
HE 0.546 0.556 0.566 13.87 14.12 14.38
L 0.023 0.031 0.039 0.58 0.79 0.99
LE 0.047 0.055 0.063 1.19 1.40 1.60
S - - 0.036 - - 0.91
y - - 0.004 - - 0.10
θ
0° - 10° 0° - 10°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
Page 12
A23W8308
PRELIMINARY (November, 1999, Version 0.0) 11 AMIC Technology, Inc.
Package Information
PLCC 32L Outline Dimension unit: inches/mm
A1 A2
A
e
D
y
HD
D
13
GD
b1
b
GE
c
5
14
20
21
29
30
32
1
4
E
HE
L
θ
Dimensions in inches Dimensions in mm
Symbol
Min Nom Max Min Nom Max
A - - 0.134 - - 3.40
A1 0.0185 - - 0.47 - A2 0.105 0.110 0.115 2.67 2.80 2.93
b1 0.026 0.028 0.032 0.66 0.71 0.81
b 0.016 0.018 0.021 0.41 0.46 0.54
C 0.008 0.010 0.014 0.20 0.254 0.35
D 0.547 0.550 0.553 13.89 13.97 14.05
E 0.447 0.450 0.453 11.35 11.43 11.51
e 0.044 0.050 0.056 1.12 1.27 1.42
GD 0.490 0.510 0.530 12.45 12.95 13.46
GE 0.390 0.410 0.430 9.91 10.41 10.92
HD 0.585 0.590 0.595 14.86 14.99 15.11
HE 0.485 0.490 0.495 12.32 12.45 12.57
L 0.075 0.090 0.095 1.91 2.29 2.41
y - - 0.003 - - 0.075
θ 0° - 10° 0° - 10°
Notes:
1. Dimensions D and E do not include resin fins.
2. Dimensions GD & GE are for PC Board surface mount pad pitch
design reference only.
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