Datasheet A1210 Datasheet (ALLEGRO)

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

The Allegro® A1210-A1214 Hall-effect latches are next generation replacements
for the popular Allegro 317x and 318x lines of latching switches. The A121x

Package LH, 3-pin Surface Mount

GND

3

1

2

VCC

VOUT

Package UA, 3-pin SIP

family, produced with BiCMOS technology, consists of devices that feature fast
power-on time and low-noise operation. Device programming is performed after
packaging, to ensure increased switchpoint accuracy by eliminating offsets that
can be induced by package stress. Unique Hall element geometries and low-offset
amplifiers help to minimize noise and to reduce the residual offset voltage nor­mally caused by device overmolding, temperature excursions, and thermal stress.

3

The A1210-A1214 Hall-effect latches include the following on a single silicon
chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt
trigger, and NMOS output transistor. The integrated voltage regulator permits
operation from 3.8 to 24 V. The extensive on-board protection circuitry makes
possible a ±30 V absolute maximum voltage rating for superior protection in
automotive and industrial motor commutation applications, without adding
external components. All devices in the family are identical except for magnetic
switchpoint levels.

The small geometries of the BiCMOS process allow these devices to be pro­vided in ultrasmall packages. The package styles available provide magnetically
optimized solutions for most applications. Package LH is an SOT23W, a miniature
low-profile surface-mount package, while package UA is a three-lead ultramini
SIP for through-hole mounting. Each package is lead (Pb) free, with 100% matte
tin plated leadframes.

2

VCC

GND

VOUT

1

2

3

AB SO LUTE MAX I MUM RAT INGS

Supply Voltage, VCC..........................................30 V

Reverse-Supply Voltage, V
Output Off Voltage, V

OUT

Reverse-Output Voltage, V
Output Current, I

OUTSINK

Magnetic Flux Density, B.........................Unlimited

Operating Temperature
Ambient, T
Ambient, T

, Range E..................–40ºC to 85ºC

A

, Range L................–40ºC to 150ºC

A

Maximum Junction, T
Storage Temperature, T

A1210-DS

........................ –30 V

RCC

.................................. 30 V

..................... –0.5 V

ROUT

............................... 25 mA

........................165ºC

J(max)

.................. –65ºC to 170ºC

S

Features and Benefits

Continuous-time operation

– Fast power-on time

– Low noise

Stable operation over full operating temperature range

Reverse battery protection

Solid-state reliability

Factory-programmed at end-of-line for optimum performance

Robust EMC performance

High ESD rating

Regulator stability without a bypass capacitor

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Product Selection Guide

Part Number Packing* Mounting Ambient, T

A1210ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1210EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1210LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1210LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1211ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1211EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1211LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1211LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1212ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1212EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1212LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1212LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1213ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1213EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1213LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1213LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1214ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1214EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

A1214LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount

A1214LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

*Contact Allegro for additional packing options.

–40ºC to 85ºC

–40ºC to 150ºC

–40ºC to 85ºC

–40ºC to 150ºC

–40ºC to 85ºC

–40ºC to 150ºC

–40ºC to 85ºC

–40ºC to 150ºC

–40ºC to 85ºC

–40ºC to 150ºC

A

BRP (Min) BOP (Max)

–150 150

–180 180

–175 175

–200 200

–300 300

Functional Block Diagram

VCC

Regulator

Terminal List

Name Description

VCC Connects power supply to chip 1 1

VOUT Output from circuit 2 3

GND Ground 3 2

To all subcircuits

Amp

Control

VOUT

OffsetGain

Trim

GND

Number

Package LH Package UA

A1210-DS

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

2

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted

Characteristic Symbol Test Conditions Min. Typ. Max. Units

Electrical Characteristics

Supply Voltage

1

Output Leakage Current I

Output On Voltage V

Power-On Time

Output Rise Time

Output Fall Time

2

3

3

Supply Current

Reverse Battery Current I

Supply Zener Clamp Voltage V

Supply Zener Current

Magnetic Characteristics

4

5

Operate Point B

Release Point B

Hysteresis B

1

Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section.

2

For VCC slew rates greater than 250 V/µs, and TA = 150°C, the Power-On Time can reach its maximum value.

3

CS =oscilloscope probe capacitance.

4

Maximum current limit is equal to the maximum I

5

Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields.
This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated
by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but
opposite polarity).

V

CC

OUTOFF

OUT(SAT)IOUT

t

PO

t

r

t

f

I

CCON

I

CCOFF

RCC

Z

I

Z

OP

RP

HYS

Operating, TJ < 165°C 3.8 – 24 V

V

OUT

Slew rate (dVCC/dt) < 2.5 V/µs, B > BOP + 5 G or
B < BRP – 5 G

VCC = 12 V, R

VCC = 12 V, R

B > B

B < B

V

RCC

ICC = 10.5 mA; TA = 25°C 32 – – V

VZ = 32 V; TA = 25°C – – 10.5 mA

CC(max)

= 24 V, B < B

= 20 mA, B > B

RP

OP

– – 10 µA

– 215 400 mV

––4µs

= 820 Ω, CS = 12 pF – – 400 ns

LOAD

= 820 Ω, CS = 12 pF – – 400 ns

LOAD

OP

RP

– 4.1 7.5 mA

– 3.8 7.5 mA

= –30 V – – –10 mA

A1210

25 78 150

A1211 15 87 180

A1212 50 107 175

South pole adjacent to branded face
of device

A1213 80 – 200

A1214 140 – 300

A1210

–150 –78 –25

A1211 –180 –95 –15

A1212 –175 –117 –50

North pole adjacent to branded face
of device

A1213 –200 – –80

A1214 –300 – –140

A1210

50 155 –

A1211 80 180 –

A1212 100 225 350

– B

B

OP

RP

A1213 160 – 400

A1214 280 – 600

+ 3 mA.

G

G

G

G

G

G

G

G

G

G

G

G

G

G

G

A1210-DS

DEVICE QUALIFICATION PROGRAM

Contact Allegro for information.

EMC (Electromagnetic Compatibility) REQUIREMENTS

Contact Allegro for information.

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

3

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information

Characteristic Symbol Test Conditions Value Units

Package Thermal Resistance

Package LH, minimum-K PCB (single layer, single-sided with
copper limited to solder pads)

R

θJA

Package LH, low-K PCB (single layer, double-sided with

0.926 in

2

copper area)

Package UA, minimum-K PCB (single layer, single-sided with
copper limited to solder pads)

Power Derating Curve

T

= 165ºC; ICC=I

25
24
23
22
21

(V)

20

CC

19
18
17
16

15
14
13
12
11
10

9

Maximum Allowable V

8
7
6
5
4
3
2

20 40 60 80 100 120 140 160 180

J(max)

Low-K PCB, Package LH
(R

= 110 ºC/W)

θJA

Minimum-K PCB, Package UA
(R

= 165 ºC/W)

θJA

Minimum-K PCB, Package LH
(R

= 228 ºC/W)

θJA

CC(max)

V

CC(max)

V

CC(min)

110 ºC/W

228 ºC/W

165 ºC/W

A1210-DS

Power Dissipation versus Ambient Temperature

1900
1800
1700
1600
1500
1400
1300

(mW)

D

Power Diss ipation, P

1200
1100
1000

900
800
700
600
500
400
300
200

Low-K PCB, Package LH

(R

θJA

Minimum-K P

(R

θ

JA

=165

Minim

u

(

R

θJA

=228

= 110 ºC/W)

CB, Pac

º

C

/W)

kag

eUA

m-K PCB, Package LH

ºC/

W

)

100

0

20 40 60 80 100 120 140 160 180

Temperature (°C)

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

4

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Characteristic Data

Supply Current (On) versus Ambient Temperature

(A1210/11/12/13/14)

8.0

7.0

6.0

5.0

(mA)

4.0

CCON

I

3.0

2.0

1.0

0

–50 0 50 100 150

TA (°C)

Supply Current (Off) versus Ambient Temperature

(A1210/11/12/13/14)

8.0

7.0

6.0

5.0

(mA)

4.0

CCOFF

I

3.0

2.0

1.0

0

–50 0 50 100 150

TA (°C)

VCC (V)

24

3.8

VCC (V)

24

3.8

Supply Current (On) versus Supply Voltage

(A1210/11/12/13/14)

8.0

7.0

6.0

5.0

(mA)

4.0

CCON

I

3.0

2.0

1.0

0

0 5 10 15 20 25

VCC (V)

TA (°C)

–40

25

150

Supply Current (Off) versus Supply Voltage

(A1210/11/12/13/14)

8.0

7.0

6.0

5.0

(mA)

4.0

CCOFF

3.0

I

2.0

1.0

0

0 5 10 15 20 25

VCC (V)

TA (°C)

–40

25

150

Output Voltage (On) versus Ambient Temperature

400

350

300

250

(mV)

200

150

OUT(SAT)

V

100

50

0

–50 0 50 100 150

A1210-DS

(A1210/11/12/13/14)

TA (°C)

VCC (V)

24

3.8

Output Voltage (On) versus Supply Voltage

400

350

300

250

(mV)

200

150

OUT(SAT)

V

100

50

0

0 5 10 15 20 25

(A1210/11/12/13/14)

VCC (V)

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

TA (°C)

–40

25

150

5

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Operate Point versus Ambient Temperature

(A1210)

150

125

100

(G)

OP

B

75

50

25

–50 0 50 100 150

(°C)

T

A

Release Point versus Ambient Temperature

(A1210)

-25

-50

-75

(G)

RP

B

-100

VCC (V)

24

3.8

V

(V)

CC

24

3.8

Operate Point versus Supply Voltage

(A1210)

150

125

100

(G)B

OP

B

75

50

25

0 5 10 15 20 25

V

(V)

CC

TA (°C)

–40

25

150

Release Point versus Supply Voltage

(A1210)

-25

-50

-75

(G)B

RP

-100

TA (°C)

–40

25

150

-125

-150

–50 0 50 100 150

TA (°C)

TA (°C)

Hysteresis versus Ambient Temperature

(A1210)

225

200

175

150

(G)

HYS

125

B

100

75

50

–50 0 50 100 150

TA (°C)

A1210-DS

VCC (V)

24

3.8

-125

-150

0 5 10 15 20 25

VCC (V)

Hysteresis versus Supply Voltage

225

200

175

150

(G)

HYS

125

100

75

50

0 5 10 15 20 25

(A1210)

V

(V)

CC

TA (°C)

–40

25

150

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

6

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Operate Point versus Ambient Temperature

(A1211)

165

140

115

(G)

OP

90

B

65

40

15

–50 0 50 100 150

TA (°C)

Release Point versus Ambient Temperature

(A1211)

-30

-55

-80

(G)

RP

-105

B

-130

-155

-180

–50 0 50 100 150

TA (°C)

TA (°C)

VCC (V)

24

3.8

(V)

V

CC

24

3.8

Operate Point versus Ambient Temperature

(A1212)

175

150

125

100

75

(G)

OP

50

B

25

0

-25

-50

–50 0 50 100 15 0

TA (°C)

VCC (V)

24

3.8

Release Point versus Ambient Temperature

(A1212)

-50

-75

(V)

V

-100

(G)

RP

B

-125

-150

-175

–50 0 50 100 150

TA (°C)

TA (°C)

CC

24

3.8

Hysteresis versus Ambient Temperature

240

220

200

180

(G)

160

HYS

B

140

120

100

80

–50 0 50 100 150

A1210-DS

(A1211)

TA (°C)

VCC (V)

24

3.8

Hysteresis versus Ambient Temperature

(A1212)

350

300

250

(G)

HYS

200

B

150

100

–50 0 50 100 150

TA (°C)

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

VCC (V)

24

3.8

7

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Functional Description

OPERATION

The output of these devices switches low (turns on) when a
magnetic field perpendicular to the Hall sensor exceeds the
operate point threshold, BOP. After turn-on, the output is capable
of sinking 25 mA and the output voltage is V

OUT(SAT)

. Notice
that the device latches; that is, a south pole of sufficient strength
towards the branded surface of the device turns the device on,
and the device remains on with removal of the south pole. When
the magnetic field is reduced below the release point, B

RP

,
the device output goes high (turns off). The difference in the
magnetic operate and release points is the hysteresis, B

hys

, of
the device. This built-in hysteresis allows clean switching of the
output, even in the presence of external mechanical vibration and
electrical noise.

Powering-on the device in the hysteresis range, less than BOP
and higher than BRP, allows an indeterminate output state. The
correct state is attained after the first excursion beyond BOP or

.

B

RP

CONTINUOUS-TIME BENEFITS

Continuous-time devices, such as the A121x family, offer the
fastest available power-on settling time and frequency response.

Due to offsets generated during the IC packaging process,
continuous-time devices typically require programming after
packaging to tighten magnetic parameter distributions. In con­trast, chopper-stabilized switches employ an offset cancellation
technique on the chip that eliminates these offsets without the
need for after-packaging programming. The tradeoff is a longer
settling time and reduced frequency response as a result of the
chopper-stabilization offset cancellation algorithm.

The choice between continuous-time and chopper-stabilized
designs is solely determined by the application. Battery manage­ment is an example where continuous-time is often required. In
these applications, VCC is chopped with a very small duty cycle
in order to conserve power (refer to figure 2). The duty cycle
is controlled by the power-on time, t

, of the device. Because

PO

continuous-time devices have the shorter power-on time, they
are the clear choice for such applications.

For more information on the chopper stabilization technique,
refer to Technical Paper STP 97-10, Monolithic Magnetic Hall
Sensor Using Dynamic Quadrature Offset Cancellation and
Technical Paper STP 99-1, Chopper-Stabilized Amplifiers with a
Track-and-Hold Signal Demodulator.

(A) (B)

V

V+

Switch to Low

OUT

V

Switch to High

0

B–

Figure 1. Switching Behavior of Latches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the
B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when
using a circuit such as that shown in Panel B.

A1210-DS

B

0

OP

RP

B

B

HYS

V

V

B+

CC

OUT(SAT)

S

VCC

A121x

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

VOUT

GND

R

L

Sensor Output

8

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

ADDITIONAL APPLICATIONS INFORMATION

Extensive applications information for Hall-effect sensors is
available in:

• Hall-Effect IC Applications Guide, Application Note 27701

• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead
Welding and Lead Forming, Application Note 27703.1

• Soldering Methods for Allegro’s Products – SMT and Through-
Hole, Application Note 26009

All are provided in Allegro Electronic Data Book, AMS-702,
and the Allegro Web site, www.allegromicro.com.

1

V

CC

V

OUT

2

3

t

PO(max)

Output Sampled

5 4

t

t

Figure 2. Continuous-Time Application, B < BRP.. This figure illustrates the use of a quick cycle for chopping VCC in order to conserve battery power.
Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, t
The case shown is where the correct output state is HIGH

. Position 3, t

has elapsed. The device output is valid. Position 4, after the output is

PO(max)

PO(max)

.

valid, a control unit reads the output. Position 5, power is removed from the device.

Allegro MicroSystems, Inc.

A1210-DS

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

9

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Power Derating

Power Derating

The device must be operated below the maximum junction
temperature of the device, T
peak conditions, reliable operation may require derating sup­plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)

The Package Thermal Resistance, R
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, R
relatively small component of R
TA, and air motion are significant external factors, damped by
overmolding.

The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.

PD = VIN × I

∆T = PD × R

. Under certain combinations of

J(max)

, is a figure of merit sum-

θJA

. Ambient air temperature,

θJA

IN

(2)

θJA

(1)

θJC

, is

Example: Reliability for VCC at TA = 150°C, package UA, using
minimum-K PCB.

Observe the worst-case ratings for the device, specifically:
R

165°C/W, T

θJA =

I

CC(max) =

7.5 mA.

Calculate the maximum allowable power level, P

J(max) =

165°C, V

CC(max) =

24 V, and

D(max)

. First,

invert equation 3:

∆T

max

= T

– TA = 165 °C – 150 °C = 15 °C

J(max)

This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:

P

D(max)

= ∆T

max

÷ R

= 15°C ÷ 165 °C/W = 91 mW

θJA

Finally, invert equation 1 with respect to voltage:

V

CC(est)

= P

D(max)

÷ I

= 91 mW ÷ 7.5 mA = 12.1 V

CC(max)

The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤V

Compare V
able operation between V
R

. If V

θJA

V

is reliable under these conditions.

CC(max)

CC(est)

CC(est)

to V

≥ V

. If V

CC(max)

CC(est)

CC(max)

CC(est)

and V

CC(max)

, then operation between V

≤ V

CC(max)

requires enhanced

.

CC(est)

, then reli-

CC(est)

and

TJ = TA + ∆T (3)

For example, given common conditions such as: T

V

= 12 V, I

CC

P

= VCC × I

D

∆T = PD × R

= 4 mA, and R

CC

= 12 V × 4 mA = 48 mW

CC

= 48 mW × 140 °C/W = 7°C

θJA

θJA

= 140 °C/W, then:

TJ = TA + ∆T = 25°C + 7°C = 32°C

A worst-case estimate, P
able power level (V
at a selected R

A1210-DS

θJA

CC(max)

and TA.

, represents the maximum allow-

D(max)

, I

), without exceeding T

CC(max)

= 25°C,

A

J(max)

,

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

10

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

Package LH, 3-Pin (SOT-23W)

Package UA, 3-Pin

A1210-DS

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

11

A1210, A1211, A1212, A1213, and A1214

Continuous-Time Latch Family

A1210-DS

The products described herein are manufactured under one or more of
the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894;
5,694,038; 5,729,130; 5,917,320; and other patents pending.

Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such de par tures from the detail spec i fi ca tions as may be required
to permit improvements in the per for mance, reliability, or manufactur­ability of its products. Before placing an order, the user is cautioned to
verify that the information being relied upon is current.

Allegro products are not authorized for use as critical components in
life-support devices or sys tems without express written approval.

The in for ma tion in clud ed herein is believed to be ac cu rate and reliable.
How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its
use; nor for any in fringe ment of patents or other rights of third parties
which may result from its use.

Copyright © 2005, Allegro MicroSystems, Inc.

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

www.allegromicro.com

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