ALL INFORMATION CONTAINED HEREIN IS THE SOLE PROPERTY OF LEADTEK RESEARCH AND CANNOT BE
DISSEMINATED WITHOUT THE EXPRESS WRITTEN CONSENT OF LEADTEK RESEARCH.
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LR9548SLP Specifications Sheet Rev. 0.1
Introduction
The Leadtek LR9548SLP GPS module is a high sensitivity, low power, Surface Mount Device (SMD).
This 20-channel global positioning system (GPS) receiver is designed for a wide range of OEM
applications and is based on the GPS signal search capabilities of the SiRFstarIII™ low power single
chipset, SiRF’s newest chipset technology. The LR9548SLP is also pin-to-pin compatible with the
LR9805-III (LR9548) for easier and faster transition.
The LR9548SLP is designed to allow quick and easy integration into GPS-related applications such
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PDA, Pocket PC, and other computing devices
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Car and Marine Navigation
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Fleet Management /Asset Tracking AVL and Location-Based Services Hand-Held Device for Personal Positioning and Navi gation
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Features
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Hardware and Software
Based on the high performance features of the SiRFstarIII low power single chipset Compact module size for easy integration: 24x20x2.9 mm (0.94x0.79x0.11 in) Fully automatic assembly: reflow solder assembly re ady Hardware compatible with SiRF GSW3 v3.2.2 software Multiple I/O pins reserved for customizing special user applications RoHS compliance
Performance
Cold/Warm/Hot Start Time: 42/38/1 sec. at open sky and stationary environments. Reacquisition Time: 0.1 second RF Metal Shield for best performance in noisy environments
TTL level serial port for GPS communications interface Protocol: NMEA-0183/SiRF Binary (default NMEA) Baud Rate: 4800, 9600, 19200, 38400 or 57600 bps (default 4800)
Advantages
Ideal for high volume mass production(Taping reel package) Cost saving through elimination of RF and board to board digital connectors Flexible and cost effective hardware design for different application needs
Time to First Fix
(TTFF)
(Open Sky &
Stationary
Requirements)
Dynamic
Conditions
Power
Serial Port
Time-1PPS
Pulse
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GSC3f SiRFstarIII low power single chipset
FrequencyL1, 1575.42 MHz
C/A code1.023 MHz chip rate
Channels20
Position
Velocity 0.1 meters/second
Time 1 microsecond synchronized to GPS time
Default WGS-84
Other selectable for other Datum
Reacquisition 0.1 sec., average
Snap start 1 sec., average
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Hot start 1 sec., average typical TTFF
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Warm start 38 sec., average typical TTFF
Cold start 42 sec., average typical TTFF
Altitude 18,000 meters (60,000 feet) max.
Velocity 515 meters/second (1000 knots) max.
Acceleration 4g, max.
Jerk 20 meters/second3, max.
Main power input 3.3 ~ 5.0 VDC input
Power consumption
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Supply Current
Backup Power 1.65 ~ 5.0 VDC input.
Electrical interface Two full duplex serial TTL interface.
Protocol messages NMEA-0183@4800 bps (Default)
Level TTL
Pulse duration The 1PPS pulse width is 1 µs, this 1PPS is
Time reference At the pulse positive edge.
Measurement
The Leadtek LR9548SLP module includes GSW3.2.2, the SiRF standard GPS software for
SiRFstarIII low power single chipset receivers. Features include:
Excellent sensitivity High configurability I Hz position update rate Supports use of satellite-based augmentation systems like the US WAAS or European EGNOS
system (Option)
Real-time Operating System (RTOS) friendly Capable of outputting either NMEA(default) or SiRF proprietary binary prot ocols
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Designed to accept custom user tasks executed on the integrated ARM7TDM1
processor(Option)
Runs in full power operation (default)or optional power saving modes Default configuration is as follows:
Item Description
Core of firmware
Baud rate
Code type
Datum
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SiRF GSW3.2.2
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4800, 9600, 19200, 38400 or 57600 bps (default 4800)
1 NC I Not connected, keep floating
2 NC I/O Not connected, keep floating
3 NC I/O Not connected, keep floating
4 RXDB I TTL UART Port B input. If not used, keep floating
5 RXDA I TTL UART Port A input
6 TXDA O TTL UART Port A output
7 GPIO5 I/O Reserved, keep floating
8 TIMEMARK I/O 1 PPS timemark output
9 NC I/O Not connected
10 GPIO13 I/O Reserved, keep floating
11 GPIO0 I/O Reserved, keep floating
12 GPIO1 I/O Reserved, keep float i ng
13 GPIO14 I/O Reserved, keep floating
14 GND PWR Ground
15 VCC_IN PWR 3.2~5.0V DC supply input
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16 VSTBY PWR Apply 1.65~5.0VDC for backup RTC & SRAM.
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17 BOOTSEL I Pull high for programming mode. If not used, keep floating
18 RESETN I Reset pin, active low, If not used, keep floating
19 GPIO15 I/O Reserved, keep floating
20 GND PWR Ground
21 NC I/O Not connected
22 NC I/O Not connected
23 TXDB O TTL UART Port B output. If not used, keep floating
24 NC O Not connected
25 ANTPWR PWR Antenna power input
26 GND PWR Ground
27 RFIN I RF Signal input
28 GND PWR Ground